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mm-only debug patch...
[mmotm.git] / drivers / net / wireless / ath / ath9k / ath9k.h
blob13dd0202d6b5ffd58047cdbb3e3466166104cbd8
1 /*
2 * Copyright (c) 2008-2009 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #ifndef ATH9K_H
18 #define ATH9K_H
19
20 #include <linux/etherdevice.h>
21 #include <linux/device.h>
22 #include <net/mac80211.h>
23 #include <linux/leds.h>
24
25 #include "hw.h"
26 #include "rc.h"
27 #include "debug.h"
28 #include "../ath.h"
29 #include "../debug.h"
30
31 struct ath_node;
32
33 /* Macro to expand scalars to 64-bit objects */
34
35 #define ito64(x) (sizeof(x) == 8) ? \
36 (((unsigned long long int)(x)) & (0xff)) : \
37 (sizeof(x) == 16) ? \
38 (((unsigned long long int)(x)) & 0xffff) : \
39 ((sizeof(x) == 32) ? \
40 (((unsigned long long int)(x)) & 0xffffffff) : \
41 (unsigned long long int)(x))
42
43 /* increment with wrap-around */
44 #define INCR(_l, _sz) do { \
45 (_l)++; \
46 (_l) &= ((_sz) - 1); \
47 } while (0)
48
49 /* decrement with wrap-around */
50 #define DECR(_l, _sz) do { \
51 (_l)--; \
52 (_l) &= ((_sz) - 1); \
53 } while (0)
54
55 #define A_MAX(a, b) ((a) > (b) ? (a) : (b))
56
57 #define TSF_TO_TU(_h,_l) \
58 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
59
60 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
61
62 struct ath_config {
63 u32 ath_aggr_prot;
64 u16 txpowlimit;
65 u8 cabqReadytime;
66 };
67
68 /*************************/
69 /* Descriptor Management */
70 /*************************/
71
72 #define ATH_TXBUF_RESET(_bf) do { \
73 (_bf)->bf_stale = false; \
74 (_bf)->bf_lastbf = NULL; \
75 (_bf)->bf_next = NULL; \
76 memset(&((_bf)->bf_state), 0, \
77 sizeof(struct ath_buf_state)); \
78 } while (0)
79
80 #define ATH_RXBUF_RESET(_bf) do { \
81 (_bf)->bf_stale = false; \
82 } while (0)
83
84 /**
85 * enum buffer_type - Buffer type flags
86 *
87 * @BUF_HT: Send this buffer using HT capabilities
88 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
89 * @BUF_AGGR: Indicates whether the buffer can be aggregated
90 * (used in aggregation scheduling)
91 * @BUF_RETRY: Indicates whether the buffer is retried
92 * @BUF_XRETRY: To denote excessive retries of the buffer
93 */
94 enum buffer_type {
95 BUF_HT = BIT(1),
96 BUF_AMPDU = BIT(2),
97 BUF_AGGR = BIT(3),
98 BUF_RETRY = BIT(4),
99 BUF_XRETRY = BIT(5),
100 };
101
102 struct ath_buf_state {
103 int bfs_nframes;
104 u16 bfs_al;
105 u16 bfs_frmlen;
106 int bfs_seqno;
107 int bfs_tidno;
108 int bfs_retries;
109 u8 bf_type;
110 u32 bfs_keyix;
111 enum ath9k_key_type bfs_keytype;
112 };
113
114 #define bf_nframes bf_state.bfs_nframes
115 #define bf_al bf_state.bfs_al
116 #define bf_frmlen bf_state.bfs_frmlen
117 #define bf_retries bf_state.bfs_retries
118 #define bf_seqno bf_state.bfs_seqno
119 #define bf_tidno bf_state.bfs_tidno
120 #define bf_keyix bf_state.bfs_keyix
121 #define bf_keytype bf_state.bfs_keytype
122 #define bf_isht(bf) (bf->bf_state.bf_type & BUF_HT)
123 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
124 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
125 #define bf_isretried(bf) (bf->bf_state.bf_type & BUF_RETRY)
126 #define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY)
127
128 struct ath_buf {
129 struct list_head list;
130 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
131 an aggregate) */
132 struct ath_buf *bf_next; /* next subframe in the aggregate */
133 struct sk_buff *bf_mpdu; /* enclosing frame structure */
134 struct ath_desc *bf_desc; /* virtual addr of desc */
135 dma_addr_t bf_daddr; /* physical addr of desc */
136 dma_addr_t bf_buf_addr; /* physical addr of data buffer */
137 bool bf_stale;
138 u16 bf_flags;
139 struct ath_buf_state bf_state;
140 dma_addr_t bf_dmacontext;
141 };
142
143 struct ath_descdma {
144 struct ath_desc *dd_desc;
145 dma_addr_t dd_desc_paddr;
146 u32 dd_desc_len;
147 struct ath_buf *dd_bufptr;
148 };
149
150 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
151 struct list_head *head, const char *name,
152 int nbuf, int ndesc);
153 void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
154 struct list_head *head);
155
156 /***********/
157 /* RX / TX */
158 /***********/
159
160 #define ATH_MAX_ANTENNA 3
161 #define ATH_RXBUF 512
162 #define WME_NUM_TID 16
163 #define ATH_TXBUF 512
164 #define ATH_TXMAXTRY 13
165 #define ATH_MGT_TXMAXTRY 4
166 #define WME_BA_BMP_SIZE 64
167 #define WME_MAX_BA WME_BA_BMP_SIZE
168 #define ATH_TID_MAX_BUFS (2 * WME_MAX_BA)
169
170 #define TID_TO_WME_AC(_tid) \
171 ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \
172 (((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \
173 (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \
174 WME_AC_VO)
175
176 #define WME_AC_BE 0
177 #define WME_AC_BK 1
178 #define WME_AC_VI 2
179 #define WME_AC_VO 3
180 #define WME_NUM_AC 4
181
182 #define ADDBA_EXCHANGE_ATTEMPTS 10
183 #define ATH_AGGR_DELIM_SZ 4
184 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
185 /* number of delimiters for encryption padding */
186 #define ATH_AGGR_ENCRYPTDELIM 10
187 /* minimum h/w qdepth to be sustained to maximize aggregation */
188 #define ATH_AGGR_MIN_QDEPTH 2
189 #define ATH_AMPDU_SUBFRAME_DEFAULT 32
190
191 #define IEEE80211_SEQ_SEQ_SHIFT 4
192 #define IEEE80211_SEQ_MAX 4096
193 #define IEEE80211_WEP_IVLEN 3
194 #define IEEE80211_WEP_KIDLEN 1
195 #define IEEE80211_WEP_CRCLEN 4
196 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \
197 (IEEE80211_WEP_IVLEN + \
198 IEEE80211_WEP_KIDLEN + \
199 IEEE80211_WEP_CRCLEN))
200
201 /* return whether a bit at index _n in bitmap _bm is set
202 * _sz is the size of the bitmap */
203 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \
204 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
205
206 /* return block-ack bitmap index given sequence and starting sequence */
207 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
208
209 /* returns delimiter padding required given the packet length */
210 #define ATH_AGGR_GET_NDELIM(_len) \
211 (((((_len) + ATH_AGGR_DELIM_SZ) < ATH_AGGR_MINPLEN) ? \
212 (ATH_AGGR_MINPLEN - (_len) - ATH_AGGR_DELIM_SZ) : 0) >> 2)
213
214 #define BAW_WITHIN(_start, _bawsz, _seqno) \
215 ((((_seqno) - (_start)) & 4095) < (_bawsz))
216
217 #define ATH_DS_BA_SEQ(_ds) ((_ds)->ds_us.tx.ts_seqnum)
218 #define ATH_DS_BA_BITMAP(_ds) (&(_ds)->ds_us.tx.ba_low)
219 #define ATH_DS_TX_BA(_ds) ((_ds)->ds_us.tx.ts_flags & ATH9K_TX_BA)
220 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
221
222 #define ATH_TX_COMPLETE_POLL_INT 1000
223
224 enum ATH_AGGR_STATUS {
225 ATH_AGGR_DONE,
226 ATH_AGGR_BAW_CLOSED,
227 ATH_AGGR_LIMITED,
228 };
229
230 struct ath_txq {
231 u32 axq_qnum;
232 u32 *axq_link;
233 struct list_head axq_q;
234 spinlock_t axq_lock;
235 u32 axq_depth;
236 u8 axq_aggr_depth;
237 bool stopped;
238 bool axq_tx_inprogress;
239 struct ath_buf *axq_linkbuf;
240
241 /* first desc of the last descriptor that contains CTS */
242 struct ath_desc *axq_lastdsWithCTS;
243
244 /* final desc of the gating desc that determines whether
245 lastdsWithCTS has been DMA'ed or not */
246 struct ath_desc *axq_gatingds;
247
248 struct list_head axq_acq;
249 };
250
251 #define AGGR_CLEANUP BIT(1)
252 #define AGGR_ADDBA_COMPLETE BIT(2)
253 #define AGGR_ADDBA_PROGRESS BIT(3)
254
255 struct ath_atx_tid {
256 struct list_head list;
257 struct list_head buf_q;
258 struct ath_node *an;
259 struct ath_atx_ac *ac;
260 struct ath_buf *tx_buf[ATH_TID_MAX_BUFS];
261 u16 seq_start;
262 u16 seq_next;
263 u16 baw_size;
264 int tidno;
265 int baw_head; /* first un-acked tx buffer */
266 int baw_tail; /* next unused tx buffer slot */
267 int sched;
268 int paused;
269 u8 state;
270 };
271
272 struct ath_atx_ac {
273 int sched;
274 int qnum;
275 struct list_head list;
276 struct list_head tid_q;
277 };
278
279 struct ath_tx_control {
280 struct ath_txq *txq;
281 int if_id;
282 enum ath9k_internal_frame_type frame_type;
283 };
284
285 #define ATH_TX_ERROR 0x01
286 #define ATH_TX_XRETRY 0x02
287 #define ATH_TX_BAR 0x04
288
289 #define ATH_RSSI_LPF_LEN 10
290 #define RSSI_LPF_THRESHOLD -20
291 #define ATH_RSSI_EP_MULTIPLIER (1<<7)
292 #define ATH_EP_MUL(x, mul) ((x) * (mul))
293 #define ATH_RSSI_IN(x) (ATH_EP_MUL((x), ATH_RSSI_EP_MULTIPLIER))
294 #define ATH_LPF_RSSI(x, y, len) \
295 ((x != ATH_RSSI_DUMMY_MARKER) ? (((x) * ((len) - 1) + (y)) / (len)) : (y))
296 #define ATH_RSSI_LPF(x, y) do { \
297 if ((y) >= RSSI_LPF_THRESHOLD) \
298 x = ATH_LPF_RSSI((x), ATH_RSSI_IN((y)), ATH_RSSI_LPF_LEN); \
299 } while (0)
300 #define ATH_EP_RND(x, mul) \
301 ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul))
302
303 struct ath_node {
304 struct ath_softc *an_sc;
305 struct ath_atx_tid tid[WME_NUM_TID];
306 struct ath_atx_ac ac[WME_NUM_AC];
307 u16 maxampdu;
308 u8 mpdudensity;
309 int last_rssi;
310 };
311
312 struct ath_tx {
313 u16 seq_no;
314 u32 txqsetup;
315 int hwq_map[ATH9K_WME_AC_VO+1];
316 spinlock_t txbuflock;
317 struct list_head txbuf;
318 struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
319 struct ath_descdma txdma;
320 };
321
322 struct ath_rx {
323 u8 defant;
324 u8 rxotherant;
325 u32 *rxlink;
326 int bufsize;
327 unsigned int rxfilter;
328 spinlock_t rxflushlock;
329 spinlock_t rxbuflock;
330 struct list_head rxbuf;
331 struct ath_descdma rxdma;
332 };
333
334 int ath_startrecv(struct ath_softc *sc);
335 bool ath_stoprecv(struct ath_softc *sc);
336 void ath_flushrecv(struct ath_softc *sc);
337 u32 ath_calcrxfilter(struct ath_softc *sc);
338 int ath_rx_init(struct ath_softc *sc, int nbufs);
339 void ath_rx_cleanup(struct ath_softc *sc);
340 int ath_rx_tasklet(struct ath_softc *sc, int flush);
341 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
342 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
343 int ath_tx_setup(struct ath_softc *sc, int haltype);
344 void ath_drain_all_txq(struct ath_softc *sc, bool retry_tx);
345 void ath_draintxq(struct ath_softc *sc,
346 struct ath_txq *txq, bool retry_tx);
347 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
348 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
349 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
350 int ath_tx_init(struct ath_softc *sc, int nbufs);
351 void ath_tx_cleanup(struct ath_softc *sc);
352 struct ath_txq *ath_test_get_txq(struct ath_softc *sc, struct sk_buff *skb);
353 int ath_txq_update(struct ath_softc *sc, int qnum,
354 struct ath9k_tx_queue_info *q);
355 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
356 struct ath_tx_control *txctl);
357 void ath_tx_tasklet(struct ath_softc *sc);
358 void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb);
359 bool ath_tx_aggr_check(struct ath_softc *sc, struct ath_node *an, u8 tidno);
360 void ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
361 u16 tid, u16 *ssn);
362 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
363 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
364
365 /********/
366 /* VIFs */
367 /********/
368
369 struct ath_vif {
370 int av_bslot;
371 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
372 enum nl80211_iftype av_opmode;
373 struct ath_buf *av_bcbuf;
374 struct ath_tx_control av_btxctl;
375 u8 bssid[ETH_ALEN]; /* current BSSID from config_interface */
376 };
377
378 /*******************/
379 /* Beacon Handling */
380 /*******************/
381
382 /*
383 * Regardless of the number of beacons we stagger, (i.e. regardless of the
384 * number of BSSIDs) if a given beacon does not go out even after waiting this
385 * number of beacon intervals, the game's up.
386 */
387 #define BSTUCK_THRESH (9 * ATH_BCBUF)
388 #define ATH_BCBUF 4
389 #define ATH_DEFAULT_BINTVAL 100 /* TU */
390 #define ATH_DEFAULT_BMISS_LIMIT 10
391 #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024)
392
393 struct ath_beacon_config {
394 u16 beacon_interval;
395 u16 listen_interval;
396 u16 dtim_period;
397 u16 bmiss_timeout;
398 u8 dtim_count;
399 };
400
401 struct ath_beacon {
402 enum {
403 OK, /* no change needed */
404 UPDATE, /* update pending */
405 COMMIT /* beacon sent, commit change */
406 } updateslot; /* slot time update fsm */
407
408 u32 beaconq;
409 u32 bmisscnt;
410 u32 ast_be_xmit;
411 u64 bc_tstamp;
412 struct ieee80211_vif *bslot[ATH_BCBUF];
413 struct ath_wiphy *bslot_aphy[ATH_BCBUF];
414 int slottime;
415 int slotupdate;
416 struct ath9k_tx_queue_info beacon_qi;
417 struct ath_descdma bdma;
418 struct ath_txq *cabq;
419 struct list_head bbuf;
420 };
421
422 void ath_beacon_tasklet(unsigned long data);
423 void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
424 int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif);
425 void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp);
426
427 /*******/
428 /* ANI */
429 /*******/
430
431 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */
432 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */
433 #define ATH_ANI_POLLINTERVAL 100 /* 100 ms */
434 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
435 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
436
437 struct ath_ani {
438 bool caldone;
439 int16_t noise_floor;
440 unsigned int longcal_timer;
441 unsigned int shortcal_timer;
442 unsigned int resetcal_timer;
443 unsigned int checkani_timer;
444 struct timer_list timer;
445 };
446
447 /* Defines the BT AR_BT_COEX_WGHT used */
448 enum ath_stomp_type {
449 ATH_BTCOEX_NO_STOMP,
450 ATH_BTCOEX_STOMP_ALL,
451 ATH_BTCOEX_STOMP_LOW,
452 ATH_BTCOEX_STOMP_NONE
453 };
454
455 struct ath_btcoex {
456 bool hw_timer_enabled;
457 spinlock_t btcoex_lock;
458 struct timer_list period_timer; /* Timer for BT period */
459 u32 bt_priority_cnt;
460 unsigned long bt_priority_time;
461 int bt_stomp_type; /* Types of BT stomping */
462 u32 btcoex_no_stomp; /* in usec */
463 u32 btcoex_period; /* in usec */
464 struct ath_gen_timer *no_stomp_timer; /* Timer for no BT stomping */
465 };
466
467 /********************/
468 /* LED Control */
469 /********************/
470
471 #define ATH_LED_PIN_DEF 1
472 #define ATH_LED_PIN_9287 8
473 #define ATH_LED_ON_DURATION_IDLE 350 /* in msecs */
474 #define ATH_LED_OFF_DURATION_IDLE 250 /* in msecs */
475
476 enum ath_led_type {
477 ATH_LED_RADIO,
478 ATH_LED_ASSOC,
479 ATH_LED_TX,
480 ATH_LED_RX
481 };
482
483 struct ath_led {
484 struct ath_softc *sc;
485 struct led_classdev led_cdev;
486 enum ath_led_type led_type;
487 char name[32];
488 bool registered;
489 };
490
491 /********************/
492 /* Main driver core */
493 /********************/
494
495 /*
496 * Default cache line size, in bytes.
497 * Used when PCI device not fully initialized by bootrom/BIOS
498 */
499 #define DEFAULT_CACHELINE 32
500 #define ATH_REGCLASSIDS_MAX 10
501 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
502 #define ATH_MAX_SW_RETRIES 10
503 #define ATH_CHAN_MAX 255
504 #define IEEE80211_WEP_NKID 4 /* number of key ids */
505
506 /*
507 * The key cache is used for h/w cipher state and also for
508 * tracking station state such as the current tx antenna.
509 * We also setup a mapping table between key cache slot indices
510 * and station state to short-circuit node lookups on rx.
511 * Different parts have different size key caches. We handle
512 * up to ATH_KEYMAX entries (could dynamically allocate state).
513 */
514 #define ATH_KEYMAX 128 /* max key cache size we handle */
515
516 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */
517 #define ATH_RSSI_DUMMY_MARKER 0x127
518 #define ATH_RATE_DUMMY_MARKER 0
519
520 #define SC_OP_INVALID BIT(0)
521 #define SC_OP_BEACONS BIT(1)
522 #define SC_OP_RXAGGR BIT(2)
523 #define SC_OP_TXAGGR BIT(3)
524 #define SC_OP_FULL_RESET BIT(4)
525 #define SC_OP_PREAMBLE_SHORT BIT(5)
526 #define SC_OP_PROTECT_ENABLE BIT(6)
527 #define SC_OP_RXFLUSH BIT(7)
528 #define SC_OP_LED_ASSOCIATED BIT(8)
529 #define SC_OP_WAIT_FOR_BEACON BIT(12)
530 #define SC_OP_LED_ON BIT(13)
531 #define SC_OP_SCANNING BIT(14)
532 #define SC_OP_TSF_RESET BIT(15)
533 #define SC_OP_WAIT_FOR_CAB BIT(16)
534 #define SC_OP_WAIT_FOR_PSPOLL_DATA BIT(17)
535 #define SC_OP_WAIT_FOR_TX_ACK BIT(18)
536 #define SC_OP_BEACON_SYNC BIT(19)
537 #define SC_OP_BT_PRIORITY_DETECTED BIT(21)
538
539 struct ath_wiphy;
540
541 struct ath_softc {
542 struct ieee80211_hw *hw;
543 struct device *dev;
544
545 spinlock_t wiphy_lock; /* spinlock to protect ath_wiphy data */
546 struct ath_wiphy *pri_wiphy;
547 struct ath_wiphy **sec_wiphy; /* secondary wiphys (virtual radios); may
548 * have NULL entries */
549 int num_sec_wiphy; /* number of sec_wiphy pointers in the array */
550 int chan_idx;
551 int chan_is_ht;
552 struct ath_wiphy *next_wiphy;
553 struct work_struct chan_work;
554 int wiphy_select_failures;
555 unsigned long wiphy_select_first_fail;
556 struct delayed_work wiphy_work;
557 unsigned long wiphy_scheduler_int;
558 int wiphy_scheduler_index;
559
560 struct tasklet_struct intr_tq;
561 struct tasklet_struct bcon_tasklet;
562 struct ath_hw *sc_ah;
563 void __iomem *mem;
564 int irq;
565 spinlock_t sc_resetlock;
566 spinlock_t sc_serial_rw;
567 spinlock_t ani_lock;
568 spinlock_t sc_pm_lock;
569 struct mutex mutex;
570
571 u32 intrstatus;
572 u32 sc_flags; /* SC_OP_* */
573 u16 curtxpow;
574 u8 nbcnvifs;
575 u16 nvifs;
576 u32 keymax;
577 DECLARE_BITMAP(keymap, ATH_KEYMAX);
578 u8 splitmic;
579 bool ps_enabled;
580 unsigned long ps_usecount;
581 enum ath9k_int imask;
582
583 struct ath_config config;
584 struct ath_rx rx;
585 struct ath_tx tx;
586 struct ath_beacon beacon;
587 struct ieee80211_rate rates[IEEE80211_NUM_BANDS][ATH_RATE_MAX];
588 const struct ath_rate_table *hw_rate_table[ATH9K_MODE_MAX];
589 const struct ath_rate_table *cur_rate_table;
590 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
591
592 struct ath_led radio_led;
593 struct ath_led assoc_led;
594 struct ath_led tx_led;
595 struct ath_led rx_led;
596 struct delayed_work ath_led_blink_work;
597 int led_on_duration;
598 int led_off_duration;
599 int led_on_cnt;
600 int led_off_cnt;
601
602 int beacon_interval;
603
604 struct ath_ani ani;
605 #ifdef CONFIG_ATH9K_DEBUG
606 struct ath9k_debug debug;
607 #endif
608 struct ath_beacon_config cur_beacon_conf;
609 struct delayed_work tx_complete_work;
610 struct ath_btcoex btcoex;
611 };
612
613 struct ath_wiphy {
614 struct ath_softc *sc; /* shared for all virtual wiphys */
615 struct ieee80211_hw *hw;
616 enum ath_wiphy_state {
617 ATH_WIPHY_INACTIVE,
618 ATH_WIPHY_ACTIVE,
619 ATH_WIPHY_PAUSING,
620 ATH_WIPHY_PAUSED,
621 ATH_WIPHY_SCAN,
622 } state;
623 int chan_idx;
624 int chan_is_ht;
625 };
626
627 int ath_reset(struct ath_softc *sc, bool retry_tx);
628 int ath_get_hal_qnum(u16 queue, struct ath_softc *sc);
629 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc);
630 int ath_cabq_update(struct ath_softc *);
631
632 static inline void ath_read_cachesize(struct ath_common *common, int *csz)
633 {
634 common->bus_ops->read_cachesize(common, csz);
635 }
636
637 static inline void ath_bus_cleanup(struct ath_common *common)
638 {
639 common->bus_ops->cleanup(common);
640 }
641
642 extern struct ieee80211_ops ath9k_ops;
643
644 irqreturn_t ath_isr(int irq, void *dev);
645 void ath_cleanup(struct ath_softc *sc);
646 int ath_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
647 const struct ath_bus_ops *bus_ops);
648 void ath_detach(struct ath_softc *sc);
649 const char *ath_mac_bb_name(u32 mac_bb_version);
650 const char *ath_rf_name(u16 rf_version);
651 void ath_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
652 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
653 struct ath9k_channel *ichan);
654 void ath_update_chainmask(struct ath_softc *sc, int is_ht);
655 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
656 struct ath9k_channel *hchan);
657 void ath_radio_enable(struct ath_softc *sc);
658 void ath_radio_disable(struct ath_softc *sc);
659
660 #ifdef CONFIG_PCI
661 int ath_pci_init(void);
662 void ath_pci_exit(void);
663 #else
664 static inline int ath_pci_init(void) { return 0; };
665 static inline void ath_pci_exit(void) {};
666 #endif
667
668 #ifdef CONFIG_ATHEROS_AR71XX
669 int ath_ahb_init(void);
670 void ath_ahb_exit(void);
671 #else
672 static inline int ath_ahb_init(void) { return 0; };
673 static inline void ath_ahb_exit(void) {};
674 #endif
675
676 void ath9k_ps_wakeup(struct ath_softc *sc);
677 void ath9k_ps_restore(struct ath_softc *sc);
678
679 void ath9k_set_bssid_mask(struct ieee80211_hw *hw);
680 int ath9k_wiphy_add(struct ath_softc *sc);
681 int ath9k_wiphy_del(struct ath_wiphy *aphy);
682 void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb);
683 int ath9k_wiphy_pause(struct ath_wiphy *aphy);
684 int ath9k_wiphy_unpause(struct ath_wiphy *aphy);
685 int ath9k_wiphy_select(struct ath_wiphy *aphy);
686 void ath9k_wiphy_set_scheduler(struct ath_softc *sc, unsigned int msec_int);
687 void ath9k_wiphy_chan_work(struct work_struct *work);
688 bool ath9k_wiphy_started(struct ath_softc *sc);
689 void ath9k_wiphy_pause_all_forced(struct ath_softc *sc,
690 struct ath_wiphy *selected);
691 bool ath9k_wiphy_scanning(struct ath_softc *sc);
692 void ath9k_wiphy_work(struct work_struct *work);
693 bool ath9k_all_wiphys_idle(struct ath_softc *sc);
694
695 int ath_tx_get_qnum(struct ath_softc *sc, int qtype, int haltype);
696 #endif /* ATH9K_H */
mm of the moment repository