mm-only debug patch...
[mmotm.git] / drivers / net / wireless / ath / ath9k / debug.h
blob749e85d5755158ad81c0cc7826da66ffe2ece6fc
1 /*
2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #ifndef DEBUG_H
18 #define DEBUG_H
20 #include "hw.h"
22 struct ath_txq;
23 struct ath_buf;
25 #ifdef CONFIG_ATH9K_DEBUG
26 #define TX_STAT_INC(q, c) sc->debug.stats.txstats[q].c++
27 #else
28 #define TX_STAT_INC(q, c) do { } while (0)
29 #endif
31 #ifdef CONFIG_ATH9K_DEBUG
33 /**
34 * struct ath_interrupt_stats - Contains statistics about interrupts
35 * @total: Total no. of interrupts generated so far
36 * @rxok: RX with no errors
37 * @rxeol: RX with no more RXDESC available
38 * @rxorn: RX FIFO overrun
39 * @txok: TX completed at the requested rate
40 * @txurn: TX FIFO underrun
41 * @mib: MIB regs reaching its threshold
42 * @rxphyerr: RX with phy errors
43 * @rx_keycache_miss: RX with key cache misses
44 * @swba: Software Beacon Alert
45 * @bmiss: Beacon Miss
46 * @bnr: Beacon Not Ready
47 * @cst: Carrier Sense TImeout
48 * @gtt: Global TX Timeout
49 * @tim: RX beacon TIM occurrence
50 * @cabend: RX End of CAB traffic
51 * @dtimsync: DTIM sync lossage
52 * @dtim: RX Beacon with DTIM
54 struct ath_interrupt_stats {
55 u32 total;
56 u32 rxok;
57 u32 rxeol;
58 u32 rxorn;
59 u32 txok;
60 u32 txeol;
61 u32 txurn;
62 u32 mib;
63 u32 rxphyerr;
64 u32 rx_keycache_miss;
65 u32 swba;
66 u32 bmiss;
67 u32 bnr;
68 u32 cst;
69 u32 gtt;
70 u32 tim;
71 u32 cabend;
72 u32 dtimsync;
73 u32 dtim;
76 struct ath_rc_stats {
77 u32 success;
78 u32 retries;
79 u32 xretries;
80 u8 per;
83 /**
84 * struct ath_tx_stats - Statistics about TX
85 * @queued: Total MPDUs (non-aggr) queued
86 * @completed: Total MPDUs (non-aggr) completed
87 * @a_aggr: Total no. of aggregates queued
88 * @a_queued: Total AMPDUs queued
89 * @a_completed: Total AMPDUs completed
90 * @a_retries: No. of AMPDUs retried (SW)
91 * @a_xretries: No. of AMPDUs dropped due to xretries
92 * @fifo_underrun: FIFO underrun occurrences
93 Valid only for:
94 - non-aggregate condition.
95 - first packet of aggregate.
96 * @xtxop: No. of frames filtered because of TXOP limit
97 * @timer_exp: Transmit timer expiry
98 * @desc_cfg_err: Descriptor configuration errors
99 * @data_urn: TX data underrun errors
100 * @delim_urn: TX delimiter underrun errors
102 struct ath_tx_stats {
103 u32 queued;
104 u32 completed;
105 u32 a_aggr;
106 u32 a_queued;
107 u32 a_completed;
108 u32 a_retries;
109 u32 a_xretries;
110 u32 fifo_underrun;
111 u32 xtxop;
112 u32 timer_exp;
113 u32 desc_cfg_err;
114 u32 data_underrun;
115 u32 delim_underrun;
118 struct ath_stats {
119 struct ath_interrupt_stats istats;
120 struct ath_rc_stats rcstats[RATE_TABLE_SIZE];
121 struct ath_tx_stats txstats[ATH9K_NUM_TX_QUEUES];
124 struct ath9k_debug {
125 struct dentry *debugfs_phy;
126 struct dentry *debugfs_debug;
127 struct dentry *debugfs_dma;
128 struct dentry *debugfs_interrupt;
129 struct dentry *debugfs_rcstat;
130 struct dentry *debugfs_wiphy;
131 struct dentry *debugfs_xmit;
132 struct ath_stats stats;
135 int ath9k_init_debug(struct ath_hw *ah);
136 void ath9k_exit_debug(struct ath_hw *ah);
138 int ath9k_debug_create_root(void);
139 void ath9k_debug_remove_root(void);
140 void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status);
141 void ath_debug_stat_rc(struct ath_softc *sc, struct sk_buff *skb);
142 void ath_debug_stat_tx(struct ath_softc *sc, struct ath_txq *txq,
143 struct ath_buf *bf);
144 void ath_debug_stat_retries(struct ath_softc *sc, int rix,
145 int xretries, int retries, u8 per);
147 #else
149 static inline int ath9k_init_debug(struct ath_hw *ah)
151 return 0;
154 static inline void ath9k_exit_debug(struct ath_hw *ah)
158 static inline int ath9k_debug_create_root(void)
160 return 0;
163 static inline void ath9k_debug_remove_root(void)
167 static inline void ath_debug_stat_interrupt(struct ath_softc *sc,
168 enum ath9k_int status)
172 static inline void ath_debug_stat_rc(struct ath_softc *sc,
173 struct sk_buff *skb)
177 static inline void ath_debug_stat_tx(struct ath_softc *sc,
178 struct ath_txq *txq,
179 struct ath_buf *bf)
183 static inline void ath_debug_stat_retries(struct ath_softc *sc, int rix,
184 int xretries, int retries, u8 per)
188 #endif /* CONFIG_ATH9K_DEBUG */
190 #endif /* DEBUG_H */