drivers/scsi/hpsa_cmd.h

   1 /*
   2  *    Disk Array driver for HP Smart Array SAS controllers
   3  *    Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
   4  *
   5  *    This program is free software; you can redistribute it and/or modify
   6  *    it under the terms of the GNU General Public License as published by
   7  *    the Free Software Foundation; version 2 of the License.
   8  *
   9  *    This program is distributed in the hope that it will be useful,
  10  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
  13  *
  14  *    You should have received a copy of the GNU General Public License
  15  *    along with this program; if not, write to the Free Software
  16  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  *
  18  *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19  *
  20  */
  21 #ifndef HPSA_CMD_H
  22 #define HPSA_CMD_H
  23
  24 /* general boundary defintions */
  25 #define SENSEINFOBYTES          32 /* may vary between hbas */
  26 #define MAXSGENTRIES            31
  27 #define MAXREPLYQS              256
  28
  29 /* Command Status value */
  30 #define CMD_SUCCESS             0x0000
  31 #define CMD_TARGET_STATUS       0x0001
  32 #define CMD_DATA_UNDERRUN       0x0002
  33 #define CMD_DATA_OVERRUN        0x0003
  34 #define CMD_INVALID             0x0004
  35 #define CMD_PROTOCOL_ERR        0x0005
  36 #define CMD_HARDWARE_ERR        0x0006
  37 #define CMD_CONNECTION_LOST     0x0007
  38 #define CMD_ABORTED             0x0008
  39 #define CMD_ABORT_FAILED        0x0009
  40 #define CMD_UNSOLICITED_ABORT   0x000A
  41 #define CMD_TIMEOUT             0x000B
  42 #define CMD_UNABORTABLE         0x000C
  43
  44 /* transfer direction */
  45 #define XFER_NONE               0x00
  46 #define XFER_WRITE              0x01
  47 #define XFER_READ               0x02
  48 #define XFER_RSVD               0x03
  49
  50 /* task attribute */
  51 #define ATTR_UNTAGGED           0x00
  52 #define ATTR_SIMPLE             0x04
  53 #define ATTR_HEADOFQUEUE        0x05
  54 #define ATTR_ORDERED            0x06
  55 #define ATTR_ACA                0x07
  56
  57 /* cdb type */
  58 #define TYPE_CMD                                0x00
  59 #define TYPE_MSG                                0x01
  60
  61 /* config space register offsets */
  62 #define CFG_VENDORID            0x00
  63 #define CFG_DEVICEID            0x02
  64 #define CFG_I2OBAR              0x10
  65 #define CFG_MEM1BAR             0x14
  66
  67 /* i2o space register offsets */
  68 #define I2O_IBDB_SET            0x20
  69 #define I2O_IBDB_CLEAR          0x70
  70 #define I2O_INT_STATUS          0x30
  71 #define I2O_INT_MASK            0x34
  72 #define I2O_IBPOST_Q            0x40
  73 #define I2O_OBPOST_Q            0x44
  74 #define I2O_DMA1_CFG            0x214
  75
  76 /* Configuration Table */
  77 #define CFGTBL_ChangeReq        0x00000001l
  78 #define CFGTBL_AccCmds          0x00000001l
  79
  80 #define CFGTBL_Trans_Simple     0x00000002l
  81
  82 #define CFGTBL_BusType_Ultra2   0x00000001l
  83 #define CFGTBL_BusType_Ultra3   0x00000002l
  84 #define CFGTBL_BusType_Fibre1G  0x00000100l
  85 #define CFGTBL_BusType_Fibre2G  0x00000200l
  86 struct vals32 {
  87         __u32   lower;
  88         __u32   upper;
  89 };
  90
  91 union u64bit {
  92         struct vals32 val32;
  93         __u64 val;
  94 };
  95
  96 /* FIXME this is a per controller value (barf!) */
  97 #define HPSA_MAX_TARGETS_PER_CTLR 16
  98 #define HPSA_MAX_LUN 256
  99 #define HPSA_MAX_PHYS_LUN 1024
 100
 101 /* SCSI-3 Commands */
 102 #pragma pack(1)
 103
 104 #define HPSA_INQUIRY 0x12
 105 struct InquiryData {
 106         __u8 data_byte[36];
 107 };
 108
 109 #define HPSA_REPORT_LOG 0xc2    /* Report Logical LUNs */
 110 #define HPSA_REPORT_PHYS 0xc3   /* Report Physical LUNs */
 111 struct ReportLUNdata {
 112         __u8 LUNListLength[4];
 113         __u32 reserved;
 114         __u8 LUN[HPSA_MAX_LUN][8];
 115 };
 116
 117 struct ReportExtendedLUNdata {
 118         __u8 LUNListLength[4];
 119         __u8 extended_response_flag;
 120         __u8 reserved[3];
 121         __u8 LUN[HPSA_MAX_LUN][24];
 122 };
 123
 124 struct SenseSubsystem_info {
 125         __u8 reserved[36];
 126         __u8 portname[8];
 127         __u8 reserved1[1108];
 128 };
 129
 130 #define HPSA_READ_CAPACITY 0x25 /* Read Capacity */
 131 struct ReadCapdata {
 132         __u8 total_size[4];     /* Total size in blocks */
 133         __u8 block_size[4];     /* Size of blocks in bytes */
 134 };
 135
 136 #if 0
 137 /* 12 byte commands not implemented in firmware yet. */
 138 #define HPSA_READ       0xa8
 139 #define HPSA_WRITE      0xaa
 140 #endif
 141
 142 #define HPSA_READ   0x28    /* Read(10) */
 143 #define HPSA_WRITE  0x2a    /* Write(10) */
 144
 145 /* BMIC commands */
 146 #define BMIC_READ 0x26
 147 #define BMIC_WRITE 0x27
 148 #define BMIC_CACHE_FLUSH 0xc2
 149 #define HPSA_CACHE_FLUSH 0x01   /* C2 was already being used by HPSA */
 150
 151 /* Command List Structure */
 152 union SCSI3Addr {
 153         struct {
 154                 __u8 Dev;
 155                 __u8 Bus:6;
 156                 __u8 Mode:2;        /* b00 */
 157         } PeripDev;
 158         struct {
 159                 __u8 DevLSB;
 160                 __u8 DevMSB:6;
 161                 __u8 Mode:2;        /* b01 */
 162         } LogDev;
 163         struct {
 164                 __u8 Dev:5;
 165                 __u8 Bus:3;
 166                 __u8 Targ:6;
 167                 __u8 Mode:2;        /* b10 */
 168         } LogUnit;
 169 };
 170
 171 struct PhysDevAddr {
 172         __u32             TargetId:24;
 173         __u32             Bus:6;
 174         __u32             Mode:2;
 175         /* 2 level target device addr */
 176         union SCSI3Addr  Target[2];
 177 };
 178
 179 struct LogDevAddr {
 180         __u32            VolId:30;
 181         __u32            Mode:2;
 182         __u8             reserved[4];
 183 };
 184
 185 union LUNAddr {
 186         __u8               LunAddrBytes[8];
 187         union SCSI3Addr    SCSI3Lun[4];
 188         struct PhysDevAddr PhysDev;
 189         struct LogDevAddr  LogDev;
 190 };
 191
 192 struct CommandListHeader {
 193         __u8              ReplyQueue;
 194         __u8              SGList;
 195         __u16             SGTotal;
 196         struct vals32     Tag;
 197         union LUNAddr     LUN;
 198 };
 199
 200 struct RequestBlock {
 201         __u8   CDBLen;
 202         struct {
 203                 __u8 Type:3;
 204                 __u8 Attribute:3;
 205                 __u8 Direction:2;
 206         } Type;
 207         __u16  Timeout;
 208         __u8   CDB[16];
 209 };
 210
 211 struct ErrDescriptor {
 212         struct vals32 Addr;
 213         __u32  Len;
 214 };
 215
 216 struct SGDescriptor {
 217         struct vals32 Addr;
 218         __u32  Len;
 219         __u32  Ext;
 220 };
 221
 222 union MoreErrInfo {
 223         struct {
 224                 __u8  Reserved[3];
 225                 __u8  Type;
 226                 __u32 ErrorInfo;
 227         } Common_Info;
 228         struct {
 229                 __u8  Reserved[2];
 230                 __u8  offense_size; /* size of offending entry */
 231                 __u8  offense_num;  /* byte # of offense 0-base */
 232                 __u32 offense_value;
 233         } Invalid_Cmd;
 234 };
 235 struct ErrorInfo {
 236         __u8               ScsiStatus;
 237         __u8               SenseLen;
 238         __u16              CommandStatus;
 239         __u32              ResidualCnt;
 240         union MoreErrInfo  MoreErrInfo;
 241         __u8               SenseInfo[SENSEINFOBYTES];
 242 };
 243 /* Command types */
 244 #define CMD_IOCTL_PEND  0x01
 245 #define CMD_SCSI        0x03
 246
 247 struct ctlr_info; /* defined in hpsa.h */
 248 /* The size of this structure needs to be divisible by 8
 249  * od on all architectures, because the controller uses 2
 250  * lower bits of the address, and the driver uses 1 lower
 251  * bit (3 bits total.)
 252  */
 253 struct CommandList {
 254         struct CommandListHeader Header;
 255         struct RequestBlock      Request;
 256         struct ErrDescriptor     ErrDesc;
 257         struct SGDescriptor      SG[MAXSGENTRIES];
 258         /* information associated with the command */
 259         __u32                      busaddr; /* physical addr of this record */
 260         struct ErrorInfo *err_info; /* pointer to the allocated mem */
 261         struct ctlr_info           *h;
 262         int                        cmd_type;
 263         long                       cmdindex;
 264         struct hlist_node list;
 265         struct CommandList *prev;
 266         struct CommandList *next;
 267         struct request *rq;
 268         struct completion *waiting;
 269         int      retry_count;
 270         void   *scsi_cmd;
 271 };
 272
 273 /* Configuration Table Structure */
 274 struct HostWrite {
 275         __u32 TransportRequest;
 276         __u32 Reserved;
 277         __u32 CoalIntDelay;
 278         __u32 CoalIntCount;
 279 };
 280
 281 struct CfgTable {
 282         __u8             Signature[4];
 283         __u32            SpecValence;
 284         __u32            TransportSupport;
 285         __u32            TransportActive;
 286         struct HostWrite HostWrite;
 287         __u32            CmdsOutMax;
 288         __u32            BusTypes;
 289         __u32            Reserved;
 290         __u8             ServerName[16];
 291         __u32            HeartBeat;
 292         __u32            SCSI_Prefetch;
 293 };
 294
 295 struct hpsa_pci_info {
 296         unsigned char   bus;
 297         unsigned char   dev_fn;
 298         unsigned short  domain;
 299         __u32           board_id;
 300 };
 301
 302 #pragma pack()
 303 #endif /* HPSA_CMD_H */