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mm-only debug patch...
[mmotm.git] / sound / pci / ice1712 / ice1712.c
blobc7cff6f8168a2d0159a0df20ea2c97550dafd6db
1 /*
2 * ALSA driver for ICEnsemble ICE1712 (Envy24)
3 *
4 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22 /*
23 NOTES:
24 - spdif nonaudio consumer mode does not work (at least with my
25 Sony STR-DB830)
26 */
27
28 /*
29 * Changes:
30 *
31 * 2002.09.09 Takashi Iwai <tiwai@suse.de>
32 * split the code to several files. each low-level routine
33 * is stored in the local file and called from registration
34 * function from card_info struct.
35 *
36 * 2002.11.26 James Stafford <jstafford@ampltd.com>
37 * Added support for VT1724 (Envy24HT)
38 * I have left out support for 176.4 and 192 KHz for the moment.
39 * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
40 *
41 * 2003.02.20 Taksahi Iwai <tiwai@suse.de>
42 * Split vt1724 part to an independent driver.
43 * The GPIO is accessed through the callback functions now.
44 *
45 * 2004.03.31 Doug McLain <nostar@comcast.net>
46 * Added support for Event Electronics EZ8 card to hoontech.c.
47 */
48
49
50 #include <linux/io.h>
51 #include <linux/delay.h>
52 #include <linux/interrupt.h>
53 #include <linux/init.h>
54 #include <linux/pci.h>
55 #include <linux/dma-mapping.h>
56 #include <linux/slab.h>
57 #include <linux/moduleparam.h>
58 #include <linux/mutex.h>
59
60 #include <sound/core.h>
61 #include <sound/cs8427.h>
62 #include <sound/info.h>
63 #include <sound/initval.h>
64 #include <sound/tlv.h>
65
66 #include <sound/asoundef.h>
67
68 #include "ice1712.h"
69
70 /* lowlevel routines */
71 #include "delta.h"
72 #include "ews.h"
73 #include "hoontech.h"
74
75 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
76 MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
77 MODULE_LICENSE("GPL");
78 MODULE_SUPPORTED_DEVICE("{"
79 HOONTECH_DEVICE_DESC
80 DELTA_DEVICE_DESC
81 EWS_DEVICE_DESC
82 "{ICEnsemble,Generic ICE1712},"
83 "{ICEnsemble,Generic Envy24}}");
84
85 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
86 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
87 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
88 static char *model[SNDRV_CARDS];
89 static int omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
90 static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transciever reset timeout value in msec */
91 static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */
92
93 module_param_array(index, int, NULL, 0444);
94 MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
95 module_param_array(id, charp, NULL, 0444);
96 MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
97 module_param_array(enable, bool, NULL, 0444);
98 MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
99 module_param_array(omni, bool, NULL, 0444);
100 MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
101 module_param_array(cs8427_timeout, int, NULL, 0444);
102 MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
103 module_param_array(model, charp, NULL, 0444);
104 MODULE_PARM_DESC(model, "Use the given board model.");
105 module_param_array(dxr_enable, int, NULL, 0444);
106 MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE.");
107
108
109 static const struct pci_device_id snd_ice1712_ids[] = {
110 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_ICE_1712), 0 }, /* ICE1712 */
111 { 0, }
112 };
113
114 MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
115
116 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
117 static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
118
119 static int PRO_RATE_LOCKED;
120 static int PRO_RATE_RESET = 1;
121 static unsigned int PRO_RATE_DEFAULT = 44100;
122
123 /*
124 * Basic I/O
125 */
126
127 /* check whether the clock mode is spdif-in */
128 static inline int is_spdif_master(struct snd_ice1712 *ice)
129 {
130 return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
131 }
132
133 static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
134 {
135 return is_spdif_master(ice) || PRO_RATE_LOCKED;
136 }
137
138 static inline void snd_ice1712_ds_write(struct snd_ice1712 *ice, u8 channel, u8 addr, u32 data)
139 {
140 outb((channel << 4) | addr, ICEDS(ice, INDEX));
141 outl(data, ICEDS(ice, DATA));
142 }
143
144 static inline u32 snd_ice1712_ds_read(struct snd_ice1712 *ice, u8 channel, u8 addr)
145 {
146 outb((channel << 4) | addr, ICEDS(ice, INDEX));
147 return inl(ICEDS(ice, DATA));
148 }
149
150 static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
151 unsigned short reg,
152 unsigned short val)
153 {
154 struct snd_ice1712 *ice = ac97->private_data;
155 int tm;
156 unsigned char old_cmd = 0;
157
158 for (tm = 0; tm < 0x10000; tm++) {
159 old_cmd = inb(ICEREG(ice, AC97_CMD));
160 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
161 continue;
162 if (!(old_cmd & ICE1712_AC97_READY))
163 continue;
164 break;
165 }
166 outb(reg, ICEREG(ice, AC97_INDEX));
167 outw(val, ICEREG(ice, AC97_DATA));
168 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
169 outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
170 for (tm = 0; tm < 0x10000; tm++)
171 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
172 break;
173 }
174
175 static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
176 unsigned short reg)
177 {
178 struct snd_ice1712 *ice = ac97->private_data;
179 int tm;
180 unsigned char old_cmd = 0;
181
182 for (tm = 0; tm < 0x10000; tm++) {
183 old_cmd = inb(ICEREG(ice, AC97_CMD));
184 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
185 continue;
186 if (!(old_cmd & ICE1712_AC97_READY))
187 continue;
188 break;
189 }
190 outb(reg, ICEREG(ice, AC97_INDEX));
191 outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
192 for (tm = 0; tm < 0x10000; tm++)
193 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
194 break;
195 if (tm >= 0x10000) /* timeout */
196 return ~0;
197 return inw(ICEREG(ice, AC97_DATA));
198 }
199
200 /*
201 * pro ac97 section
202 */
203
204 static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
205 unsigned short reg,
206 unsigned short val)
207 {
208 struct snd_ice1712 *ice = ac97->private_data;
209 int tm;
210 unsigned char old_cmd = 0;
211
212 for (tm = 0; tm < 0x10000; tm++) {
213 old_cmd = inb(ICEMT(ice, AC97_CMD));
214 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
215 continue;
216 if (!(old_cmd & ICE1712_AC97_READY))
217 continue;
218 break;
219 }
220 outb(reg, ICEMT(ice, AC97_INDEX));
221 outw(val, ICEMT(ice, AC97_DATA));
222 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
223 outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
224 for (tm = 0; tm < 0x10000; tm++)
225 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
226 break;
227 }
228
229
230 static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
231 unsigned short reg)
232 {
233 struct snd_ice1712 *ice = ac97->private_data;
234 int tm;
235 unsigned char old_cmd = 0;
236
237 for (tm = 0; tm < 0x10000; tm++) {
238 old_cmd = inb(ICEMT(ice, AC97_CMD));
239 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
240 continue;
241 if (!(old_cmd & ICE1712_AC97_READY))
242 continue;
243 break;
244 }
245 outb(reg, ICEMT(ice, AC97_INDEX));
246 outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
247 for (tm = 0; tm < 0x10000; tm++)
248 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
249 break;
250 if (tm >= 0x10000) /* timeout */
251 return ~0;
252 return inw(ICEMT(ice, AC97_DATA));
253 }
254
255 /*
256 * consumer ac97 digital mix
257 */
258 #define snd_ice1712_digmix_route_ac97_info snd_ctl_boolean_mono_info
259
260 static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
261 {
262 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
263
264 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
265 return 0;
266 }
267
268 static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
269 {
270 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
271 unsigned char val, nval;
272
273 spin_lock_irq(&ice->reg_lock);
274 val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
275 nval = val & ~ICE1712_ROUTE_AC97;
276 if (ucontrol->value.integer.value[0])
277 nval |= ICE1712_ROUTE_AC97;
278 outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
279 spin_unlock_irq(&ice->reg_lock);
280 return val != nval;
281 }
282
283 static struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 __devinitdata = {
284 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
285 .name = "Digital Mixer To AC97",
286 .info = snd_ice1712_digmix_route_ac97_info,
287 .get = snd_ice1712_digmix_route_ac97_get,
288 .put = snd_ice1712_digmix_route_ac97_put,
289 };
290
291
292 /*
293 * gpio operations
294 */
295 static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
296 {
297 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
298 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
299 }
300
301 static unsigned int snd_ice1712_get_gpio_dir(struct snd_ice1712 *ice)
302 {
303 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION);
304 }
305
306 static unsigned int snd_ice1712_get_gpio_mask(struct snd_ice1712 *ice)
307 {
308 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK);
309 }
310
311 static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
312 {
313 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
314 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
315 }
316
317 static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
318 {
319 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
320 }
321
322 static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
323 {
324 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
325 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
326 }
327
328 /*
329 *
330 * CS8427 interface
331 *
332 */
333
334 /*
335 * change the input clock selection
336 * spdif_clock = 1 - IEC958 input, 0 - Envy24
337 */
338 static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
339 {
340 unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */
341 unsigned char val, nval;
342 int res = 0;
343
344 snd_i2c_lock(ice->i2c);
345 if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
346 snd_i2c_unlock(ice->i2c);
347 return -EIO;
348 }
349 if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
350 snd_i2c_unlock(ice->i2c);
351 return -EIO;
352 }
353 nval = val & 0xf0;
354 if (spdif_clock)
355 nval |= 0x01;
356 else
357 nval |= 0x04;
358 if (val != nval) {
359 reg[1] = nval;
360 if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
361 res = -EIO;
362 } else {
363 res++;
364 }
365 }
366 snd_i2c_unlock(ice->i2c);
367 return res;
368 }
369
370 /*
371 * spdif callbacks
372 */
373 static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
374 {
375 snd_cs8427_iec958_active(ice->cs8427, 1);
376 }
377
378 static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
379 {
380 snd_cs8427_iec958_active(ice->cs8427, 0);
381 }
382
383 static void setup_cs8427(struct snd_ice1712 *ice, int rate)
384 {
385 snd_cs8427_iec958_pcm(ice->cs8427, rate);
386 }
387
388 /*
389 * create and initialize callbacks for cs8427 interface
390 */
391 int __devinit snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
392 {
393 int err;
394
395 err = snd_cs8427_create(ice->i2c, addr,
396 (ice->cs8427_timeout * HZ) / 1000, &ice->cs8427);
397 if (err < 0) {
398 snd_printk(KERN_ERR "CS8427 initialization failed\n");
399 return err;
400 }
401 ice->spdif.ops.open = open_cs8427;
402 ice->spdif.ops.close = close_cs8427;
403 ice->spdif.ops.setup_rate = setup_cs8427;
404 return 0;
405 }
406
407 static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
408 {
409 /* change CS8427 clock source too */
410 if (ice->cs8427)
411 snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
412 /* notify ak4524 chip as well */
413 if (spdif_is_master) {
414 unsigned int i;
415 for (i = 0; i < ice->akm_codecs; i++) {
416 if (ice->akm[i].ops.set_rate_val)
417 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
418 }
419 }
420 }
421
422 /*
423 * Interrupt handler
424 */
425
426 static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id)
427 {
428 struct snd_ice1712 *ice = dev_id;
429 unsigned char status;
430 int handled = 0;
431
432 while (1) {
433 status = inb(ICEREG(ice, IRQSTAT));
434 if (status == 0)
435 break;
436 handled = 1;
437 if (status & ICE1712_IRQ_MPU1) {
438 if (ice->rmidi[0])
439 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
440 outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
441 status &= ~ICE1712_IRQ_MPU1;
442 }
443 if (status & ICE1712_IRQ_TIMER)
444 outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
445 if (status & ICE1712_IRQ_MPU2) {
446 if (ice->rmidi[1])
447 snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data);
448 outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
449 status &= ~ICE1712_IRQ_MPU2;
450 }
451 if (status & ICE1712_IRQ_PROPCM) {
452 unsigned char mtstat = inb(ICEMT(ice, IRQ));
453 if (mtstat & ICE1712_MULTI_PBKSTATUS) {
454 if (ice->playback_pro_substream)
455 snd_pcm_period_elapsed(ice->playback_pro_substream);
456 outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
457 }
458 if (mtstat & ICE1712_MULTI_CAPSTATUS) {
459 if (ice->capture_pro_substream)
460 snd_pcm_period_elapsed(ice->capture_pro_substream);
461 outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
462 }
463 }
464 if (status & ICE1712_IRQ_FM)
465 outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
466 if (status & ICE1712_IRQ_PBKDS) {
467 u32 idx;
468 u16 pbkstatus;
469 struct snd_pcm_substream *substream;
470 pbkstatus = inw(ICEDS(ice, INTSTAT));
471 /* printk(KERN_DEBUG "pbkstatus = 0x%x\n", pbkstatus); */
472 for (idx = 0; idx < 6; idx++) {
473 if ((pbkstatus & (3 << (idx * 2))) == 0)
474 continue;
475 substream = ice->playback_con_substream_ds[idx];
476 if (substream != NULL)
477 snd_pcm_period_elapsed(substream);
478 outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
479 }
480 outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
481 }
482 if (status & ICE1712_IRQ_CONCAP) {
483 if (ice->capture_con_substream)
484 snd_pcm_period_elapsed(ice->capture_con_substream);
485 outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
486 }
487 if (status & ICE1712_IRQ_CONPBK) {
488 if (ice->playback_con_substream)
489 snd_pcm_period_elapsed(ice->playback_con_substream);
490 outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
491 }
492 }
493 return IRQ_RETVAL(handled);
494 }
495
496
497 /*
498 * PCM part - misc
499 */
500
501 static int snd_ice1712_hw_params(struct snd_pcm_substream *substream,
502 struct snd_pcm_hw_params *hw_params)
503 {
504 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
505 }
506
507 static int snd_ice1712_hw_free(struct snd_pcm_substream *substream)
508 {
509 return snd_pcm_lib_free_pages(substream);
510 }
511
512 /*
513 * PCM part - consumer I/O
514 */
515
516 static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
517 int cmd)
518 {
519 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
520 int result = 0;
521 u32 tmp;
522
523 spin_lock(&ice->reg_lock);
524 tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
525 if (cmd == SNDRV_PCM_TRIGGER_START) {
526 tmp |= 1;
527 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
528 tmp &= ~1;
529 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
530 tmp |= 2;
531 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
532 tmp &= ~2;
533 } else {
534 result = -EINVAL;
535 }
536 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
537 spin_unlock(&ice->reg_lock);
538 return result;
539 }
540
541 static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
542 int cmd)
543 {
544 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
545 int result = 0;
546 u32 tmp;
547
548 spin_lock(&ice->reg_lock);
549 tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
550 if (cmd == SNDRV_PCM_TRIGGER_START) {
551 tmp |= 1;
552 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
553 tmp &= ~1;
554 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
555 tmp |= 2;
556 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
557 tmp &= ~2;
558 } else {
559 result = -EINVAL;
560 }
561 snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
562 spin_unlock(&ice->reg_lock);
563 return result;
564 }
565
566 static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
567 int cmd)
568 {
569 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
570 int result = 0;
571 u8 tmp;
572
573 spin_lock(&ice->reg_lock);
574 tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
575 if (cmd == SNDRV_PCM_TRIGGER_START) {
576 tmp |= 1;
577 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
578 tmp &= ~1;
579 } else {
580 result = -EINVAL;
581 }
582 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
583 spin_unlock(&ice->reg_lock);
584 return result;
585 }
586
587 static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
588 {
589 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
590 struct snd_pcm_runtime *runtime = substream->runtime;
591 u32 period_size, buf_size, rate, tmp;
592
593 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
594 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
595 tmp = 0x0000;
596 if (snd_pcm_format_width(runtime->format) == 16)
597 tmp |= 0x10;
598 if (runtime->channels == 2)
599 tmp |= 0x08;
600 rate = (runtime->rate * 8192) / 375;
601 if (rate > 0x000fffff)
602 rate = 0x000fffff;
603 spin_lock_irq(&ice->reg_lock);
604 outb(0, ice->ddma_port + 15);
605 outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
606 outl(runtime->dma_addr, ice->ddma_port + 0);
607 outw(buf_size, ice->ddma_port + 4);
608 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
609 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
610 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
611 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
612 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
613 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
614 snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
615 snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
616 spin_unlock_irq(&ice->reg_lock);
617 return 0;
618 }
619
620 static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
621 {
622 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
623 struct snd_pcm_runtime *runtime = substream->runtime;
624 u32 period_size, buf_size, rate, tmp, chn;
625
626 period_size = snd_pcm_lib_period_bytes(substream) - 1;
627 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
628 tmp = 0x0064;
629 if (snd_pcm_format_width(runtime->format) == 16)
630 tmp &= ~0x04;
631 if (runtime->channels == 2)
632 tmp |= 0x08;
633 rate = (runtime->rate * 8192) / 375;
634 if (rate > 0x000fffff)
635 rate = 0x000fffff;
636 ice->playback_con_active_buf[substream->number] = 0;
637 ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
638 chn = substream->number * 2;
639 spin_lock_irq(&ice->reg_lock);
640 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
641 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
642 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
643 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
644 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
645 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
646 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
647 if (runtime->channels == 2) {
648 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
649 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
650 }
651 spin_unlock_irq(&ice->reg_lock);
652 return 0;
653 }
654
655 static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
656 {
657 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
658 struct snd_pcm_runtime *runtime = substream->runtime;
659 u32 period_size, buf_size;
660 u8 tmp;
661
662 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
663 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
664 tmp = 0x06;
665 if (snd_pcm_format_width(runtime->format) == 16)
666 tmp &= ~0x04;
667 if (runtime->channels == 2)
668 tmp &= ~0x02;
669 spin_lock_irq(&ice->reg_lock);
670 outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
671 outw(buf_size, ICEREG(ice, CONCAP_COUNT));
672 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
673 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
674 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
675 spin_unlock_irq(&ice->reg_lock);
676 snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
677 return 0;
678 }
679
680 static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
681 {
682 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
683 struct snd_pcm_runtime *runtime = substream->runtime;
684 size_t ptr;
685
686 if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
687 return 0;
688 ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
689 if (ptr == runtime->buffer_size)
690 ptr = 0;
691 return bytes_to_frames(substream->runtime, ptr);
692 }
693
694 static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
695 {
696 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
697 u8 addr;
698 size_t ptr;
699
700 if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
701 return 0;
702 if (ice->playback_con_active_buf[substream->number])
703 addr = ICE1712_DSC_ADDR1;
704 else
705 addr = ICE1712_DSC_ADDR0;
706 ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
707 ice->playback_con_virt_addr[substream->number];
708 if (ptr == substream->runtime->buffer_size)
709 ptr = 0;
710 return bytes_to_frames(substream->runtime, ptr);
711 }
712
713 static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
714 {
715 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
716 size_t ptr;
717
718 if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
719 return 0;
720 ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
721 if (ptr == substream->runtime->buffer_size)
722 ptr = 0;
723 return bytes_to_frames(substream->runtime, ptr);
724 }
725
726 static const struct snd_pcm_hardware snd_ice1712_playback = {
727 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
728 SNDRV_PCM_INFO_BLOCK_TRANSFER |
729 SNDRV_PCM_INFO_MMAP_VALID |
730 SNDRV_PCM_INFO_PAUSE),
731 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
732 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
733 .rate_min = 4000,
734 .rate_max = 48000,
735 .channels_min = 1,
736 .channels_max = 2,
737 .buffer_bytes_max = (64*1024),
738 .period_bytes_min = 64,
739 .period_bytes_max = (64*1024),
740 .periods_min = 1,
741 .periods_max = 1024,
742 .fifo_size = 0,
743 };
744
745 static const struct snd_pcm_hardware snd_ice1712_playback_ds = {
746 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
747 SNDRV_PCM_INFO_BLOCK_TRANSFER |
748 SNDRV_PCM_INFO_MMAP_VALID |
749 SNDRV_PCM_INFO_PAUSE),
750 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
751 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
752 .rate_min = 4000,
753 .rate_max = 48000,
754 .channels_min = 1,
755 .channels_max = 2,
756 .buffer_bytes_max = (128*1024),
757 .period_bytes_min = 64,
758 .period_bytes_max = (128*1024),
759 .periods_min = 2,
760 .periods_max = 2,
761 .fifo_size = 0,
762 };
763
764 static const struct snd_pcm_hardware snd_ice1712_capture = {
765 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
766 SNDRV_PCM_INFO_BLOCK_TRANSFER |
767 SNDRV_PCM_INFO_MMAP_VALID),
768 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
769 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
770 .rate_min = 4000,
771 .rate_max = 48000,
772 .channels_min = 1,
773 .channels_max = 2,
774 .buffer_bytes_max = (64*1024),
775 .period_bytes_min = 64,
776 .period_bytes_max = (64*1024),
777 .periods_min = 1,
778 .periods_max = 1024,
779 .fifo_size = 0,
780 };
781
782 static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
783 {
784 struct snd_pcm_runtime *runtime = substream->runtime;
785 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
786
787 ice->playback_con_substream = substream;
788 runtime->hw = snd_ice1712_playback;
789 return 0;
790 }
791
792 static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
793 {
794 struct snd_pcm_runtime *runtime = substream->runtime;
795 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
796 u32 tmp;
797
798 ice->playback_con_substream_ds[substream->number] = substream;
799 runtime->hw = snd_ice1712_playback_ds;
800 spin_lock_irq(&ice->reg_lock);
801 tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
802 outw(tmp, ICEDS(ice, INTMASK));
803 spin_unlock_irq(&ice->reg_lock);
804 return 0;
805 }
806
807 static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
808 {
809 struct snd_pcm_runtime *runtime = substream->runtime;
810 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
811
812 ice->capture_con_substream = substream;
813 runtime->hw = snd_ice1712_capture;
814 runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
815 if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
816 runtime->hw.rate_min = 48000;
817 return 0;
818 }
819
820 static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
821 {
822 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
823
824 ice->playback_con_substream = NULL;
825 return 0;
826 }
827
828 static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
829 {
830 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
831 u32 tmp;
832
833 spin_lock_irq(&ice->reg_lock);
834 tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
835 outw(tmp, ICEDS(ice, INTMASK));
836 spin_unlock_irq(&ice->reg_lock);
837 ice->playback_con_substream_ds[substream->number] = NULL;
838 return 0;
839 }
840
841 static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
842 {
843 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
844
845 ice->capture_con_substream = NULL;
846 return 0;
847 }
848
849 static struct snd_pcm_ops snd_ice1712_playback_ops = {
850 .open = snd_ice1712_playback_open,
851 .close = snd_ice1712_playback_close,
852 .ioctl = snd_pcm_lib_ioctl,
853 .hw_params = snd_ice1712_hw_params,
854 .hw_free = snd_ice1712_hw_free,
855 .prepare = snd_ice1712_playback_prepare,
856 .trigger = snd_ice1712_playback_trigger,
857 .pointer = snd_ice1712_playback_pointer,
858 };
859
860 static struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
861 .open = snd_ice1712_playback_ds_open,
862 .close = snd_ice1712_playback_ds_close,
863 .ioctl = snd_pcm_lib_ioctl,
864 .hw_params = snd_ice1712_hw_params,
865 .hw_free = snd_ice1712_hw_free,
866 .prepare = snd_ice1712_playback_ds_prepare,
867 .trigger = snd_ice1712_playback_ds_trigger,
868 .pointer = snd_ice1712_playback_ds_pointer,
869 };
870
871 static struct snd_pcm_ops snd_ice1712_capture_ops = {
872 .open = snd_ice1712_capture_open,
873 .close = snd_ice1712_capture_close,
874 .ioctl = snd_pcm_lib_ioctl,
875 .hw_params = snd_ice1712_hw_params,
876 .hw_free = snd_ice1712_hw_free,
877 .prepare = snd_ice1712_capture_prepare,
878 .trigger = snd_ice1712_capture_trigger,
879 .pointer = snd_ice1712_capture_pointer,
880 };
881
882 static int __devinit snd_ice1712_pcm(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
883 {
884 struct snd_pcm *pcm;
885 int err;
886
887 if (rpcm)
888 *rpcm = NULL;
889 err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
890 if (err < 0)
891 return err;
892
893 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
894 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
895
896 pcm->private_data = ice;
897 pcm->info_flags = 0;
898 strcpy(pcm->name, "ICE1712 consumer");
899 ice->pcm = pcm;
900
901 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
902 snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
903
904 if (rpcm)
905 *rpcm = pcm;
906
907 printk(KERN_WARNING "Consumer PCM code does not work well at the moment --jk\n");
908
909 return 0;
910 }
911
912 static int __devinit snd_ice1712_pcm_ds(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
913 {
914 struct snd_pcm *pcm;
915 int err;
916
917 if (rpcm)
918 *rpcm = NULL;
919 err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
920 if (err < 0)
921 return err;
922
923 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
924
925 pcm->private_data = ice;
926 pcm->info_flags = 0;
927 strcpy(pcm->name, "ICE1712 consumer (DS)");
928 ice->pcm_ds = pcm;
929
930 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
931 snd_dma_pci_data(ice->pci), 64*1024, 128*1024);
932
933 if (rpcm)
934 *rpcm = pcm;
935
936 return 0;
937 }
938
939 /*
940 * PCM code - professional part (multitrack)
941 */
942
943 static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
944 32000, 44100, 48000, 64000, 88200, 96000 };
945
946 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
947 .count = ARRAY_SIZE(rates),
948 .list = rates,
949 .mask = 0,
950 };
951
952 static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
953 int cmd)
954 {
955 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
956 switch (cmd) {
957 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
958 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
959 {
960 unsigned int what;
961 unsigned int old;
962 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
963 return -EINVAL;
964 what = ICE1712_PLAYBACK_PAUSE;
965 snd_pcm_trigger_done(substream, substream);
966 spin_lock(&ice->reg_lock);
967 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
968 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
969 old |= what;
970 else
971 old &= ~what;
972 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
973 spin_unlock(&ice->reg_lock);
974 break;
975 }
976 case SNDRV_PCM_TRIGGER_START:
977 case SNDRV_PCM_TRIGGER_STOP:
978 {
979 unsigned int what = 0;
980 unsigned int old;
981 struct snd_pcm_substream *s;
982
983 snd_pcm_group_for_each_entry(s, substream) {
984 if (s == ice->playback_pro_substream) {
985 what |= ICE1712_PLAYBACK_START;
986 snd_pcm_trigger_done(s, substream);
987 } else if (s == ice->capture_pro_substream) {
988 what |= ICE1712_CAPTURE_START_SHADOW;
989 snd_pcm_trigger_done(s, substream);
990 }
991 }
992 spin_lock(&ice->reg_lock);
993 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
994 if (cmd == SNDRV_PCM_TRIGGER_START)
995 old |= what;
996 else
997 old &= ~what;
998 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
999 spin_unlock(&ice->reg_lock);
1000 break;
1001 }
1002 default:
1003 return -EINVAL;
1004 }
1005 return 0;
1006 }
1007
1008 /*
1009 */
1010 static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
1011 {
1012 unsigned long flags;
1013 unsigned char val, old;
1014 unsigned int i;
1015
1016 switch (rate) {
1017 case 8000: val = 6; break;
1018 case 9600: val = 3; break;
1019 case 11025: val = 10; break;
1020 case 12000: val = 2; break;
1021 case 16000: val = 5; break;
1022 case 22050: val = 9; break;
1023 case 24000: val = 1; break;
1024 case 32000: val = 4; break;
1025 case 44100: val = 8; break;
1026 case 48000: val = 0; break;
1027 case 64000: val = 15; break;
1028 case 88200: val = 11; break;
1029 case 96000: val = 7; break;
1030 default:
1031 snd_BUG();
1032 val = 0;
1033 rate = 48000;
1034 break;
1035 }
1036
1037 spin_lock_irqsave(&ice->reg_lock, flags);
1038 if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
1039 ICE1712_PLAYBACK_PAUSE|
1040 ICE1712_PLAYBACK_START)) {
1041 __out:
1042 spin_unlock_irqrestore(&ice->reg_lock, flags);
1043 return;
1044 }
1045 if (!force && is_pro_rate_locked(ice))
1046 goto __out;
1047
1048 old = inb(ICEMT(ice, RATE));
1049 if (!force && old == val)
1050 goto __out;
1051 outb(val, ICEMT(ice, RATE));
1052 spin_unlock_irqrestore(&ice->reg_lock, flags);
1053
1054 if (ice->gpio.set_pro_rate)
1055 ice->gpio.set_pro_rate(ice, rate);
1056 for (i = 0; i < ice->akm_codecs; i++) {
1057 if (ice->akm[i].ops.set_rate_val)
1058 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
1059 }
1060 if (ice->spdif.ops.setup_rate)
1061 ice->spdif.ops.setup_rate(ice, rate);
1062 }
1063
1064 static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
1065 {
1066 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1067
1068 ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
1069 spin_lock_irq(&ice->reg_lock);
1070 outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
1071 outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
1072 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
1073 spin_unlock_irq(&ice->reg_lock);
1074
1075 return 0;
1076 }
1077
1078 static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
1079 struct snd_pcm_hw_params *hw_params)
1080 {
1081 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1082
1083 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1084 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1085 }
1086
1087 static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
1088 {
1089 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1090
1091 ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
1092 spin_lock_irq(&ice->reg_lock);
1093 outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
1094 outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
1095 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
1096 spin_unlock_irq(&ice->reg_lock);
1097 return 0;
1098 }
1099
1100 static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
1101 struct snd_pcm_hw_params *hw_params)
1102 {
1103 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1104
1105 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1106 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1107 }
1108
1109 static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
1110 {
1111 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1112 size_t ptr;
1113
1114 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
1115 return 0;
1116 ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
1117 if (ptr == substream->runtime->buffer_size)
1118 ptr = 0;
1119 return bytes_to_frames(substream->runtime, ptr);
1120 }
1121
1122 static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
1123 {
1124 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1125 size_t ptr;
1126
1127 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
1128 return 0;
1129 ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
1130 if (ptr == substream->runtime->buffer_size)
1131 ptr = 0;
1132 return bytes_to_frames(substream->runtime, ptr);
1133 }
1134
1135 static const struct snd_pcm_hardware snd_ice1712_playback_pro = {
1136 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1137 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1138 SNDRV_PCM_INFO_MMAP_VALID |
1139 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1140 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1141 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1142 .rate_min = 4000,
1143 .rate_max = 96000,
1144 .channels_min = 10,
1145 .channels_max = 10,
1146 .buffer_bytes_max = (256*1024),
1147 .period_bytes_min = 10 * 4 * 2,
1148 .period_bytes_max = 131040,
1149 .periods_min = 1,
1150 .periods_max = 1024,
1151 .fifo_size = 0,
1152 };
1153
1154 static const struct snd_pcm_hardware snd_ice1712_capture_pro = {
1155 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1156 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1157 SNDRV_PCM_INFO_MMAP_VALID |
1158 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1159 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1160 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1161 .rate_min = 4000,
1162 .rate_max = 96000,
1163 .channels_min = 12,
1164 .channels_max = 12,
1165 .buffer_bytes_max = (256*1024),
1166 .period_bytes_min = 12 * 4 * 2,
1167 .period_bytes_max = 131040,
1168 .periods_min = 1,
1169 .periods_max = 1024,
1170 .fifo_size = 0,
1171 };
1172
1173 static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
1174 {
1175 struct snd_pcm_runtime *runtime = substream->runtime;
1176 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1177
1178 ice->playback_pro_substream = substream;
1179 runtime->hw = snd_ice1712_playback_pro;
1180 snd_pcm_set_sync(substream);
1181 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1182 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1183
1184 if (ice->spdif.ops.open)
1185 ice->spdif.ops.open(ice, substream);
1186
1187 return 0;
1188 }
1189
1190 static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
1191 {
1192 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1193 struct snd_pcm_runtime *runtime = substream->runtime;
1194
1195 ice->capture_pro_substream = substream;
1196 runtime->hw = snd_ice1712_capture_pro;
1197 snd_pcm_set_sync(substream);
1198 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1199 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1200 return 0;
1201 }
1202
1203 static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
1204 {
1205 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1206
1207 if (PRO_RATE_RESET)
1208 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1209 ice->playback_pro_substream = NULL;
1210 if (ice->spdif.ops.close)
1211 ice->spdif.ops.close(ice, substream);
1212
1213 return 0;
1214 }
1215
1216 static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
1217 {
1218 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1219
1220 if (PRO_RATE_RESET)
1221 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1222 ice->capture_pro_substream = NULL;
1223 return 0;
1224 }
1225
1226 static struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
1227 .open = snd_ice1712_playback_pro_open,
1228 .close = snd_ice1712_playback_pro_close,
1229 .ioctl = snd_pcm_lib_ioctl,
1230 .hw_params = snd_ice1712_playback_pro_hw_params,
1231 .hw_free = snd_ice1712_hw_free,
1232 .prepare = snd_ice1712_playback_pro_prepare,
1233 .trigger = snd_ice1712_pro_trigger,
1234 .pointer = snd_ice1712_playback_pro_pointer,
1235 };
1236
1237 static struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
1238 .open = snd_ice1712_capture_pro_open,
1239 .close = snd_ice1712_capture_pro_close,
1240 .ioctl = snd_pcm_lib_ioctl,
1241 .hw_params = snd_ice1712_capture_pro_hw_params,
1242 .hw_free = snd_ice1712_hw_free,
1243 .prepare = snd_ice1712_capture_pro_prepare,
1244 .trigger = snd_ice1712_pro_trigger,
1245 .pointer = snd_ice1712_capture_pro_pointer,
1246 };
1247
1248 static int __devinit snd_ice1712_pcm_profi(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
1249 {
1250 struct snd_pcm *pcm;
1251 int err;
1252
1253 if (rpcm)
1254 *rpcm = NULL;
1255 err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
1256 if (err < 0)
1257 return err;
1258
1259 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
1260 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
1261
1262 pcm->private_data = ice;
1263 pcm->info_flags = 0;
1264 strcpy(pcm->name, "ICE1712 multi");
1265
1266 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1267 snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
1268
1269 ice->pcm_pro = pcm;
1270 if (rpcm)
1271 *rpcm = pcm;
1272
1273 if (ice->cs8427) {
1274 /* assign channels to iec958 */
1275 err = snd_cs8427_iec958_build(ice->cs8427,
1276 pcm->streams[0].substream,
1277 pcm->streams[1].substream);
1278 if (err < 0)
1279 return err;
1280 }
1281
1282 err = snd_ice1712_build_pro_mixer(ice);
1283 if (err < 0)
1284 return err;
1285 return 0;
1286 }
1287
1288 /*
1289 * Mixer section
1290 */
1291
1292 static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
1293 {
1294 unsigned int vol = ice->pro_volumes[index];
1295 unsigned short val = 0;
1296
1297 val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
1298 val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
1299 outb(index, ICEMT(ice, MONITOR_INDEX));
1300 outw(val, ICEMT(ice, MONITOR_VOLUME));
1301 }
1302
1303 #define snd_ice1712_pro_mixer_switch_info snd_ctl_boolean_stereo_info
1304
1305 static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1306 {
1307 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1308 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1309 kcontrol->private_value;
1310
1311 spin_lock_irq(&ice->reg_lock);
1312 ucontrol->value.integer.value[0] =
1313 !((ice->pro_volumes[priv_idx] >> 15) & 1);
1314 ucontrol->value.integer.value[1] =
1315 !((ice->pro_volumes[priv_idx] >> 31) & 1);
1316 spin_unlock_irq(&ice->reg_lock);
1317 return 0;
1318 }
1319
1320 static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1321 {
1322 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1323 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1324 kcontrol->private_value;
1325 unsigned int nval, change;
1326
1327 nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
1328 (ucontrol->value.integer.value[1] ? 0 : 0x80000000);
1329 spin_lock_irq(&ice->reg_lock);
1330 nval |= ice->pro_volumes[priv_idx] & ~0x80008000;
1331 change = nval != ice->pro_volumes[priv_idx];
1332 ice->pro_volumes[priv_idx] = nval;
1333 snd_ice1712_update_volume(ice, priv_idx);
1334 spin_unlock_irq(&ice->reg_lock);
1335 return change;
1336 }
1337
1338 static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1339 {
1340 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1341 uinfo->count = 2;
1342 uinfo->value.integer.min = 0;
1343 uinfo->value.integer.max = 96;
1344 return 0;
1345 }
1346
1347 static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1348 {
1349 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1350 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1351 kcontrol->private_value;
1352
1353 spin_lock_irq(&ice->reg_lock);
1354 ucontrol->value.integer.value[0] =
1355 (ice->pro_volumes[priv_idx] >> 0) & 127;
1356 ucontrol->value.integer.value[1] =
1357 (ice->pro_volumes[priv_idx] >> 16) & 127;
1358 spin_unlock_irq(&ice->reg_lock);
1359 return 0;
1360 }
1361
1362 static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1363 {
1364 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1365 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1366 kcontrol->private_value;
1367 unsigned int nval, change;
1368
1369 nval = (ucontrol->value.integer.value[0] & 127) |
1370 ((ucontrol->value.integer.value[1] & 127) << 16);
1371 spin_lock_irq(&ice->reg_lock);
1372 nval |= ice->pro_volumes[priv_idx] & ~0x007f007f;
1373 change = nval != ice->pro_volumes[priv_idx];
1374 ice->pro_volumes[priv_idx] = nval;
1375 snd_ice1712_update_volume(ice, priv_idx);
1376 spin_unlock_irq(&ice->reg_lock);
1377 return change;
1378 }
1379
1380 static const DECLARE_TLV_DB_SCALE(db_scale_playback, -14400, 150, 0);
1381
1382 static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] __devinitdata = {
1383 {
1384 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1385 .name = "Multi Playback Switch",
1386 .info = snd_ice1712_pro_mixer_switch_info,
1387 .get = snd_ice1712_pro_mixer_switch_get,
1388 .put = snd_ice1712_pro_mixer_switch_put,
1389 .private_value = 0,
1390 .count = 10,
1391 },
1392 {
1393 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1394 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1395 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1396 .name = "Multi Playback Volume",
1397 .info = snd_ice1712_pro_mixer_volume_info,
1398 .get = snd_ice1712_pro_mixer_volume_get,
1399 .put = snd_ice1712_pro_mixer_volume_put,
1400 .private_value = 0,
1401 .count = 10,
1402 .tlv = { .p = db_scale_playback }
1403 },
1404 };
1405
1406 static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch __devinitdata = {
1407 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1408 .name = "H/W Multi Capture Switch",
1409 .info = snd_ice1712_pro_mixer_switch_info,
1410 .get = snd_ice1712_pro_mixer_switch_get,
1411 .put = snd_ice1712_pro_mixer_switch_put,
1412 .private_value = 10,
1413 };
1414
1415 static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch __devinitdata = {
1416 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1417 .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, SWITCH),
1418 .info = snd_ice1712_pro_mixer_switch_info,
1419 .get = snd_ice1712_pro_mixer_switch_get,
1420 .put = snd_ice1712_pro_mixer_switch_put,
1421 .private_value = 18,
1422 .count = 2,
1423 };
1424
1425 static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume __devinitdata = {
1426 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1427 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1428 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1429 .name = "H/W Multi Capture Volume",
1430 .info = snd_ice1712_pro_mixer_volume_info,
1431 .get = snd_ice1712_pro_mixer_volume_get,
1432 .put = snd_ice1712_pro_mixer_volume_put,
1433 .private_value = 10,
1434 .tlv = { .p = db_scale_playback }
1435 };
1436
1437 static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume __devinitdata = {
1438 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1439 .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, VOLUME),
1440 .info = snd_ice1712_pro_mixer_volume_info,
1441 .get = snd_ice1712_pro_mixer_volume_get,
1442 .put = snd_ice1712_pro_mixer_volume_put,
1443 .private_value = 18,
1444 .count = 2,
1445 };
1446
1447 static int __devinit snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
1448 {
1449 struct snd_card *card = ice->card;
1450 unsigned int idx;
1451 int err;
1452
1453 /* multi-channel mixer */
1454 for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
1455 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
1456 if (err < 0)
1457 return err;
1458 }
1459
1460 if (ice->num_total_adcs > 0) {
1461 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
1462 tmp.count = ice->num_total_adcs;
1463 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1464 if (err < 0)
1465 return err;
1466 }
1467
1468 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
1469 if (err < 0)
1470 return err;
1471
1472 if (ice->num_total_adcs > 0) {
1473 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
1474 tmp.count = ice->num_total_adcs;
1475 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1476 if (err < 0)
1477 return err;
1478 }
1479
1480 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
1481 if (err < 0)
1482 return err;
1483
1484 /* initialize volumes */
1485 for (idx = 0; idx < 10; idx++) {
1486 ice->pro_volumes[idx] = 0x80008000; /* mute */
1487 snd_ice1712_update_volume(ice, idx);
1488 }
1489 for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
1490 ice->pro_volumes[idx] = 0x80008000; /* mute */
1491 snd_ice1712_update_volume(ice, idx);
1492 }
1493 for (idx = 18; idx < 20; idx++) {
1494 ice->pro_volumes[idx] = 0x80008000; /* mute */
1495 snd_ice1712_update_volume(ice, idx);
1496 }
1497 return 0;
1498 }
1499
1500 static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
1501 {
1502 struct snd_ice1712 *ice = ac97->private_data;
1503 ice->ac97 = NULL;
1504 }
1505
1506 static int __devinit snd_ice1712_ac97_mixer(struct snd_ice1712 *ice)
1507 {
1508 int err, bus_num = 0;
1509 struct snd_ac97_template ac97;
1510 struct snd_ac97_bus *pbus;
1511 static struct snd_ac97_bus_ops con_ops = {
1512 .write = snd_ice1712_ac97_write,
1513 .read = snd_ice1712_ac97_read,
1514 };
1515 static struct snd_ac97_bus_ops pro_ops = {
1516 .write = snd_ice1712_pro_ac97_write,
1517 .read = snd_ice1712_pro_ac97_read,
1518 };
1519
1520 if (ice_has_con_ac97(ice)) {
1521 err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus);
1522 if (err < 0)
1523 return err;
1524 memset(&ac97, 0, sizeof(ac97));
1525 ac97.private_data = ice;
1526 ac97.private_free = snd_ice1712_mixer_free_ac97;
1527 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1528 if (err < 0)
1529 printk(KERN_WARNING "ice1712: cannot initialize ac97 for consumer, skipped\n");
1530 else {
1531 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice));
1532 if (err < 0)
1533 return err;
1534 return 0;
1535 }
1536 }
1537
1538 if (!(ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
1539 err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus);
1540 if (err < 0)
1541 return err;
1542 memset(&ac97, 0, sizeof(ac97));
1543 ac97.private_data = ice;
1544 ac97.private_free = snd_ice1712_mixer_free_ac97;
1545 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1546 if (err < 0)
1547 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
1548 else
1549 return 0;
1550 }
1551 /* I2S mixer only */
1552 strcat(ice->card->mixername, "ICE1712 - multitrack");
1553 return 0;
1554 }
1555
1556 /*
1557 *
1558 */
1559
1560 static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
1561 {
1562 return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
1563 }
1564
1565 static void snd_ice1712_proc_read(struct snd_info_entry *entry,
1566 struct snd_info_buffer *buffer)
1567 {
1568 struct snd_ice1712 *ice = entry->private_data;
1569 unsigned int idx;
1570
1571 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1572 snd_iprintf(buffer, "EEPROM:\n");
1573
1574 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1575 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1576 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1577 snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
1578 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
1579 snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
1580 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
1581 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
1582 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
1583 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
1584 snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
1585 snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
1586 snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
1587 snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
1588 for (idx = 0; idx < 4; idx++)
1589 snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
1590 for (idx = 0; idx < 4; idx++)
1591 snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
1592 for (idx = 0x1c; idx < ice->eeprom.size; idx++)
1593 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
1594
1595 snd_iprintf(buffer, "\nRegisters:\n");
1596 snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
1597 snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
1598 snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
1599 snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
1600 snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice));
1601 snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK));
1602 snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION));
1603 }
1604
1605 static void __devinit snd_ice1712_proc_init(struct snd_ice1712 *ice)
1606 {
1607 struct snd_info_entry *entry;
1608
1609 if (!snd_card_proc_new(ice->card, "ice1712", &entry))
1610 snd_info_set_text_ops(entry, ice, snd_ice1712_proc_read);
1611 }
1612
1613 /*
1614 *
1615 */
1616
1617 static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
1618 struct snd_ctl_elem_info *uinfo)
1619 {
1620 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
1621 uinfo->count = sizeof(struct snd_ice1712_eeprom);
1622 return 0;
1623 }
1624
1625 static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
1626 struct snd_ctl_elem_value *ucontrol)
1627 {
1628 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1629
1630 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1631 return 0;
1632 }
1633
1634 static struct snd_kcontrol_new snd_ice1712_eeprom __devinitdata = {
1635 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1636 .name = "ICE1712 EEPROM",
1637 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1638 .info = snd_ice1712_eeprom_info,
1639 .get = snd_ice1712_eeprom_get
1640 };
1641
1642 /*
1643 */
1644 static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
1645 struct snd_ctl_elem_info *uinfo)
1646 {
1647 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1648 uinfo->count = 1;
1649 return 0;
1650 }
1651
1652 static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
1653 struct snd_ctl_elem_value *ucontrol)
1654 {
1655 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1656 if (ice->spdif.ops.default_get)
1657 ice->spdif.ops.default_get(ice, ucontrol);
1658 return 0;
1659 }
1660
1661 static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
1662 struct snd_ctl_elem_value *ucontrol)
1663 {
1664 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1665 if (ice->spdif.ops.default_put)
1666 return ice->spdif.ops.default_put(ice, ucontrol);
1667 return 0;
1668 }
1669
1670 static struct snd_kcontrol_new snd_ice1712_spdif_default __devinitdata =
1671 {
1672 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1673 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1674 .info = snd_ice1712_spdif_info,
1675 .get = snd_ice1712_spdif_default_get,
1676 .put = snd_ice1712_spdif_default_put
1677 };
1678
1679 static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1680 struct snd_ctl_elem_value *ucontrol)
1681 {
1682 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1683 if (ice->spdif.ops.default_get) {
1684 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1685 IEC958_AES0_PROFESSIONAL |
1686 IEC958_AES0_CON_NOT_COPYRIGHT |
1687 IEC958_AES0_CON_EMPHASIS;
1688 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1689 IEC958_AES1_CON_CATEGORY;
1690 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1691 } else {
1692 ucontrol->value.iec958.status[0] = 0xff;
1693 ucontrol->value.iec958.status[1] = 0xff;
1694 ucontrol->value.iec958.status[2] = 0xff;
1695 ucontrol->value.iec958.status[3] = 0xff;
1696 ucontrol->value.iec958.status[4] = 0xff;
1697 }
1698 return 0;
1699 }
1700
1701 static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1702 struct snd_ctl_elem_value *ucontrol)
1703 {
1704 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1705 if (ice->spdif.ops.default_get) {
1706 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1707 IEC958_AES0_PROFESSIONAL |
1708 IEC958_AES0_PRO_FS |
1709 IEC958_AES0_PRO_EMPHASIS;
1710 ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
1711 } else {
1712 ucontrol->value.iec958.status[0] = 0xff;
1713 ucontrol->value.iec958.status[1] = 0xff;
1714 ucontrol->value.iec958.status[2] = 0xff;
1715 ucontrol->value.iec958.status[3] = 0xff;
1716 ucontrol->value.iec958.status[4] = 0xff;
1717 }
1718 return 0;
1719 }
1720
1721 static struct snd_kcontrol_new snd_ice1712_spdif_maskc __devinitdata =
1722 {
1723 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1724 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1725 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1726 .info = snd_ice1712_spdif_info,
1727 .get = snd_ice1712_spdif_maskc_get,
1728 };
1729
1730 static struct snd_kcontrol_new snd_ice1712_spdif_maskp __devinitdata =
1731 {
1732 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1733 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1734 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1735 .info = snd_ice1712_spdif_info,
1736 .get = snd_ice1712_spdif_maskp_get,
1737 };
1738
1739 static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
1740 struct snd_ctl_elem_value *ucontrol)
1741 {
1742 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1743 if (ice->spdif.ops.stream_get)
1744 ice->spdif.ops.stream_get(ice, ucontrol);
1745 return 0;
1746 }
1747
1748 static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
1749 struct snd_ctl_elem_value *ucontrol)
1750 {
1751 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1752 if (ice->spdif.ops.stream_put)
1753 return ice->spdif.ops.stream_put(ice, ucontrol);
1754 return 0;
1755 }
1756
1757 static struct snd_kcontrol_new snd_ice1712_spdif_stream __devinitdata =
1758 {
1759 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1760 SNDRV_CTL_ELEM_ACCESS_INACTIVE),
1761 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1762 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
1763 .info = snd_ice1712_spdif_info,
1764 .get = snd_ice1712_spdif_stream_get,
1765 .put = snd_ice1712_spdif_stream_put
1766 };
1767
1768 int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
1769 struct snd_ctl_elem_value *ucontrol)
1770 {
1771 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1772 unsigned char mask = kcontrol->private_value & 0xff;
1773 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1774
1775 snd_ice1712_save_gpio_status(ice);
1776 ucontrol->value.integer.value[0] =
1777 (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
1778 snd_ice1712_restore_gpio_status(ice);
1779 return 0;
1780 }
1781
1782 int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1783 struct snd_ctl_elem_value *ucontrol)
1784 {
1785 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1786 unsigned char mask = kcontrol->private_value & 0xff;
1787 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1788 unsigned int val, nval;
1789
1790 if (kcontrol->private_value & (1 << 31))
1791 return -EPERM;
1792 nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
1793 snd_ice1712_save_gpio_status(ice);
1794 val = snd_ice1712_gpio_read(ice);
1795 nval |= val & ~mask;
1796 if (val != nval)
1797 snd_ice1712_gpio_write(ice, nval);
1798 snd_ice1712_restore_gpio_status(ice);
1799 return val != nval;
1800 }
1801
1802 /*
1803 * rate
1804 */
1805 static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1806 struct snd_ctl_elem_info *uinfo)
1807 {
1808 static const char * const texts[] = {
1809 "8000", /* 0: 6 */
1810 "9600", /* 1: 3 */
1811 "11025", /* 2: 10 */
1812 "12000", /* 3: 2 */
1813 "16000", /* 4: 5 */
1814 "22050", /* 5: 9 */
1815 "24000", /* 6: 1 */
1816 "32000", /* 7: 4 */
1817 "44100", /* 8: 8 */
1818 "48000", /* 9: 0 */
1819 "64000", /* 10: 15 */
1820 "88200", /* 11: 11 */
1821 "96000", /* 12: 7 */
1822 "IEC958 Input", /* 13: -- */
1823 };
1824 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1825 uinfo->count = 1;
1826 uinfo->value.enumerated.items = 14;
1827 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1828 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1829 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1830 return 0;
1831 }
1832
1833 static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1834 struct snd_ctl_elem_value *ucontrol)
1835 {
1836 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1837 static const unsigned char xlate[16] = {
1838 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
1839 };
1840 unsigned char val;
1841
1842 spin_lock_irq(&ice->reg_lock);
1843 if (is_spdif_master(ice)) {
1844 ucontrol->value.enumerated.item[0] = 13;
1845 } else {
1846 val = xlate[inb(ICEMT(ice, RATE)) & 15];
1847 if (val == 255) {
1848 snd_BUG();
1849 val = 0;
1850 }
1851 ucontrol->value.enumerated.item[0] = val;
1852 }
1853 spin_unlock_irq(&ice->reg_lock);
1854 return 0;
1855 }
1856
1857 static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1858 struct snd_ctl_elem_value *ucontrol)
1859 {
1860 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1861 static const unsigned int xrate[13] = {
1862 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1863 32000, 44100, 48000, 64000, 88200, 96000
1864 };
1865 unsigned char oval;
1866 int change = 0;
1867
1868 spin_lock_irq(&ice->reg_lock);
1869 oval = inb(ICEMT(ice, RATE));
1870 if (ucontrol->value.enumerated.item[0] == 13) {
1871 outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
1872 } else {
1873 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1874 spin_unlock_irq(&ice->reg_lock);
1875 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
1876 spin_lock_irq(&ice->reg_lock);
1877 }
1878 change = inb(ICEMT(ice, RATE)) != oval;
1879 spin_unlock_irq(&ice->reg_lock);
1880
1881 if ((oval & ICE1712_SPDIF_MASTER) !=
1882 (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
1883 snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
1884
1885 return change;
1886 }
1887
1888 static struct snd_kcontrol_new snd_ice1712_pro_internal_clock __devinitdata = {
1889 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1890 .name = "Multi Track Internal Clock",
1891 .info = snd_ice1712_pro_internal_clock_info,
1892 .get = snd_ice1712_pro_internal_clock_get,
1893 .put = snd_ice1712_pro_internal_clock_put
1894 };
1895
1896 static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
1897 struct snd_ctl_elem_info *uinfo)
1898 {
1899 static const char * const texts[] = {
1900 "8000", /* 0: 6 */
1901 "9600", /* 1: 3 */
1902 "11025", /* 2: 10 */
1903 "12000", /* 3: 2 */
1904 "16000", /* 4: 5 */
1905 "22050", /* 5: 9 */
1906 "24000", /* 6: 1 */
1907 "32000", /* 7: 4 */
1908 "44100", /* 8: 8 */
1909 "48000", /* 9: 0 */
1910 "64000", /* 10: 15 */
1911 "88200", /* 11: 11 */
1912 "96000", /* 12: 7 */
1913 /* "IEC958 Input", 13: -- */
1914 };
1915 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1916 uinfo->count = 1;
1917 uinfo->value.enumerated.items = 13;
1918 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1919 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1920 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1921 return 0;
1922 }
1923
1924 static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
1925 struct snd_ctl_elem_value *ucontrol)
1926 {
1927 int val;
1928 static const unsigned int xrate[13] = {
1929 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1930 32000, 44100, 48000, 64000, 88200, 96000
1931 };
1932
1933 for (val = 0; val < 13; val++) {
1934 if (xrate[val] == PRO_RATE_DEFAULT)
1935 break;
1936 }
1937
1938 ucontrol->value.enumerated.item[0] = val;
1939 return 0;
1940 }
1941
1942 static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
1943 struct snd_ctl_elem_value *ucontrol)
1944 {
1945 static const unsigned int xrate[13] = {
1946 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1947 32000, 44100, 48000, 64000, 88200, 96000
1948 };
1949 unsigned char oval;
1950 int change = 0;
1951
1952 oval = PRO_RATE_DEFAULT;
1953 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1954 change = PRO_RATE_DEFAULT != oval;
1955
1956 return change;
1957 }
1958
1959 static struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default __devinitdata = {
1960 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1961 .name = "Multi Track Internal Clock Default",
1962 .info = snd_ice1712_pro_internal_clock_default_info,
1963 .get = snd_ice1712_pro_internal_clock_default_get,
1964 .put = snd_ice1712_pro_internal_clock_default_put
1965 };
1966
1967 #define snd_ice1712_pro_rate_locking_info snd_ctl_boolean_mono_info
1968
1969 static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1970 struct snd_ctl_elem_value *ucontrol)
1971 {
1972 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1973 return 0;
1974 }
1975
1976 static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1977 struct snd_ctl_elem_value *ucontrol)
1978 {
1979 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1980 int change = 0, nval;
1981
1982 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1983 spin_lock_irq(&ice->reg_lock);
1984 change = PRO_RATE_LOCKED != nval;
1985 PRO_RATE_LOCKED = nval;
1986 spin_unlock_irq(&ice->reg_lock);
1987 return change;
1988 }
1989
1990 static struct snd_kcontrol_new snd_ice1712_pro_rate_locking __devinitdata = {
1991 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1992 .name = "Multi Track Rate Locking",
1993 .info = snd_ice1712_pro_rate_locking_info,
1994 .get = snd_ice1712_pro_rate_locking_get,
1995 .put = snd_ice1712_pro_rate_locking_put
1996 };
1997
1998 #define snd_ice1712_pro_rate_reset_info snd_ctl_boolean_mono_info
1999
2000 static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
2001 struct snd_ctl_elem_value *ucontrol)
2002 {
2003 ucontrol->value.integer.value[0] = PRO_RATE_RESET;
2004 return 0;
2005 }
2006
2007 static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
2008 struct snd_ctl_elem_value *ucontrol)
2009 {
2010 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2011 int change = 0, nval;
2012
2013 nval = ucontrol->value.integer.value[0] ? 1 : 0;
2014 spin_lock_irq(&ice->reg_lock);
2015 change = PRO_RATE_RESET != nval;
2016 PRO_RATE_RESET = nval;
2017 spin_unlock_irq(&ice->reg_lock);
2018 return change;
2019 }
2020
2021 static struct snd_kcontrol_new snd_ice1712_pro_rate_reset __devinitdata = {
2022 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2023 .name = "Multi Track Rate Reset",
2024 .info = snd_ice1712_pro_rate_reset_info,
2025 .get = snd_ice1712_pro_rate_reset_get,
2026 .put = snd_ice1712_pro_rate_reset_put
2027 };
2028
2029 /*
2030 * routing
2031 */
2032 static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
2033 struct snd_ctl_elem_info *uinfo)
2034 {
2035 static const char * const texts[] = {
2036 "PCM Out", /* 0 */
2037 "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
2038 "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
2039 "IEC958 In L", "IEC958 In R", /* 9-10 */
2040 "Digital Mixer", /* 11 - optional */
2041 };
2042
2043 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2044 uinfo->count = 1;
2045 uinfo->value.enumerated.items =
2046 snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
2047 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2048 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2049 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2050 return 0;
2051 }
2052
2053 static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
2054 struct snd_ctl_elem_value *ucontrol)
2055 {
2056 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2057 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2058 unsigned int val, cval;
2059
2060 spin_lock_irq(&ice->reg_lock);
2061 val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2062 cval = inl(ICEMT(ice, ROUTE_CAPTURE));
2063 spin_unlock_irq(&ice->reg_lock);
2064
2065 val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
2066 val &= 3;
2067 cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
2068 if (val == 1 && idx < 2)
2069 ucontrol->value.enumerated.item[0] = 11;
2070 else if (val == 2)
2071 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2072 else if (val == 3)
2073 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2074 else
2075 ucontrol->value.enumerated.item[0] = 0;
2076 return 0;
2077 }
2078
2079 static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
2080 struct snd_ctl_elem_value *ucontrol)
2081 {
2082 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2083 int change, shift;
2084 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2085 unsigned int val, old_val, nval;
2086
2087 /* update PSDOUT */
2088 if (ucontrol->value.enumerated.item[0] >= 11)
2089 nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
2090 else if (ucontrol->value.enumerated.item[0] >= 9)
2091 nval = 3; /* spdif in */
2092 else if (ucontrol->value.enumerated.item[0] >= 1)
2093 nval = 2; /* analog in */
2094 else
2095 nval = 0; /* pcm */
2096 shift = ((idx % 2) * 8) + ((idx / 2) * 2);
2097 spin_lock_irq(&ice->reg_lock);
2098 val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2099 val &= ~(0x03 << shift);
2100 val |= nval << shift;
2101 change = val != old_val;
2102 if (change)
2103 outw(val, ICEMT(ice, ROUTE_PSDOUT03));
2104 spin_unlock_irq(&ice->reg_lock);
2105 if (nval < 2) /* dig mixer of pcm */
2106 return change;
2107
2108 /* update CAPTURE */
2109 spin_lock_irq(&ice->reg_lock);
2110 val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
2111 shift = ((idx / 2) * 8) + ((idx % 2) * 4);
2112 if (nval == 2) { /* analog in */
2113 nval = ucontrol->value.enumerated.item[0] - 1;
2114 val &= ~(0x07 << shift);
2115 val |= nval << shift;
2116 } else { /* spdif in */
2117 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2118 val &= ~(0x08 << shift);
2119 val |= nval << shift;
2120 }
2121 if (val != old_val) {
2122 change = 1;
2123 outl(val, ICEMT(ice, ROUTE_CAPTURE));
2124 }
2125 spin_unlock_irq(&ice->reg_lock);
2126 return change;
2127 }
2128
2129 static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2130 struct snd_ctl_elem_value *ucontrol)
2131 {
2132 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2133 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2134 unsigned int val, cval;
2135 val = inw(ICEMT(ice, ROUTE_SPDOUT));
2136 cval = (val >> (idx * 4 + 8)) & 0x0f;
2137 val = (val >> (idx * 2)) & 0x03;
2138 if (val == 1)
2139 ucontrol->value.enumerated.item[0] = 11;
2140 else if (val == 2)
2141 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2142 else if (val == 3)
2143 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2144 else
2145 ucontrol->value.enumerated.item[0] = 0;
2146 return 0;
2147 }
2148
2149 static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2150 struct snd_ctl_elem_value *ucontrol)
2151 {
2152 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2153 int change, shift;
2154 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2155 unsigned int val, old_val, nval;
2156
2157 /* update SPDOUT */
2158 spin_lock_irq(&ice->reg_lock);
2159 val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
2160 if (ucontrol->value.enumerated.item[0] >= 11)
2161 nval = 1;
2162 else if (ucontrol->value.enumerated.item[0] >= 9)
2163 nval = 3;
2164 else if (ucontrol->value.enumerated.item[0] >= 1)
2165 nval = 2;
2166 else
2167 nval = 0;
2168 shift = idx * 2;
2169 val &= ~(0x03 << shift);
2170 val |= nval << shift;
2171 shift = idx * 4 + 8;
2172 if (nval == 2) {
2173 nval = ucontrol->value.enumerated.item[0] - 1;
2174 val &= ~(0x07 << shift);
2175 val |= nval << shift;
2176 } else if (nval == 3) {
2177 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2178 val &= ~(0x08 << shift);
2179 val |= nval << shift;
2180 }
2181 change = val != old_val;
2182 if (change)
2183 outw(val, ICEMT(ice, ROUTE_SPDOUT));
2184 spin_unlock_irq(&ice->reg_lock);
2185 return change;
2186 }
2187
2188 static struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route __devinitdata = {
2189 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2190 .name = "H/W Playback Route",
2191 .info = snd_ice1712_pro_route_info,
2192 .get = snd_ice1712_pro_route_analog_get,
2193 .put = snd_ice1712_pro_route_analog_put,
2194 };
2195
2196 static struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route __devinitdata = {
2197 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2198 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
2199 .info = snd_ice1712_pro_route_info,
2200 .get = snd_ice1712_pro_route_spdif_get,
2201 .put = snd_ice1712_pro_route_spdif_put,
2202 .count = 2,
2203 };
2204
2205
2206 static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
2207 struct snd_ctl_elem_info *uinfo)
2208 {
2209 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2210 uinfo->count = 1;
2211 uinfo->value.integer.min = 0;
2212 uinfo->value.integer.max = 255;
2213 return 0;
2214 }
2215
2216 static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
2217 struct snd_ctl_elem_value *ucontrol)
2218 {
2219 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2220
2221 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
2222 return 0;
2223 }
2224
2225 static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
2226 struct snd_ctl_elem_value *ucontrol)
2227 {
2228 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2229 int change;
2230
2231 spin_lock_irq(&ice->reg_lock);
2232 change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
2233 outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
2234 spin_unlock_irq(&ice->reg_lock);
2235 return change;
2236 }
2237
2238 static struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate __devinitdata = {
2239 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2240 .name = "Multi Track Volume Rate",
2241 .info = snd_ice1712_pro_volume_rate_info,
2242 .get = snd_ice1712_pro_volume_rate_get,
2243 .put = snd_ice1712_pro_volume_rate_put
2244 };
2245
2246 static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
2247 struct snd_ctl_elem_info *uinfo)
2248 {
2249 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2250 uinfo->count = 22;
2251 uinfo->value.integer.min = 0;
2252 uinfo->value.integer.max = 255;
2253 return 0;
2254 }
2255
2256 static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
2257 struct snd_ctl_elem_value *ucontrol)
2258 {
2259 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2260 int idx;
2261
2262 spin_lock_irq(&ice->reg_lock);
2263 for (idx = 0; idx < 22; idx++) {
2264 outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
2265 ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
2266 }
2267 spin_unlock_irq(&ice->reg_lock);
2268 return 0;
2269 }
2270
2271 static struct snd_kcontrol_new snd_ice1712_mixer_pro_peak __devinitdata = {
2272 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
2273 .name = "Multi Track Peak",
2274 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2275 .info = snd_ice1712_pro_peak_info,
2276 .get = snd_ice1712_pro_peak_get
2277 };
2278
2279 /*
2280 *
2281 */
2282
2283 /*
2284 * list of available boards
2285 */
2286 static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
2287 snd_ice1712_hoontech_cards,
2288 snd_ice1712_delta_cards,
2289 snd_ice1712_ews_cards,
2290 NULL,
2291 };
2292
2293 static unsigned char __devinit snd_ice1712_read_i2c(struct snd_ice1712 *ice,
2294 unsigned char dev,
2295 unsigned char addr)
2296 {
2297 long t = 0x10000;
2298
2299 outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
2300 outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
2301 while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
2302 return inb(ICEREG(ice, I2C_DATA));
2303 }
2304
2305 static int __devinit snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
2306 const char *modelname)
2307 {
2308 int dev = 0xa0; /* EEPROM device address */
2309 unsigned int i, size;
2310 struct snd_ice1712_card_info * const *tbl, *c;
2311
2312 if (!modelname || !*modelname) {
2313 ice->eeprom.subvendor = 0;
2314 if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
2315 ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
2316 (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
2317 (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
2318 (snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
2319 if (ice->eeprom.subvendor == 0 ||
2320 ice->eeprom.subvendor == (unsigned int)-1) {
2321 /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
2322 u16 vendor, device;
2323 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
2324 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
2325 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
2326 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
2327 printk(KERN_ERR "ice1712: No valid ID is found\n");
2328 return -ENXIO;
2329 }
2330 }
2331 }
2332 for (tbl = card_tables; *tbl; tbl++) {
2333 for (c = *tbl; c->subvendor; c++) {
2334 if (modelname && c->model && !strcmp(modelname, c->model)) {
2335 printk(KERN_INFO "ice1712: Using board model %s\n", c->name);
2336 ice->eeprom.subvendor = c->subvendor;
2337 } else if (c->subvendor != ice->eeprom.subvendor)
2338 continue;
2339 if (!c->eeprom_size || !c->eeprom_data)
2340 goto found;
2341 /* if the EEPROM is given by the driver, use it */
2342 snd_printdd("using the defined eeprom..\n");
2343 ice->eeprom.version = 1;
2344 ice->eeprom.size = c->eeprom_size + 6;
2345 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2346 goto read_skipped;
2347 }
2348 }
2349 printk(KERN_WARNING "ice1712: No matching model found for ID 0x%x\n",
2350 ice->eeprom.subvendor);
2351
2352 found:
2353 ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
2354 if (ice->eeprom.size < 6)
2355 ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
2356 else if (ice->eeprom.size > 32) {
2357 snd_printk(KERN_ERR "invalid EEPROM (size = %i)\n", ice->eeprom.size);
2358 return -EIO;
2359 }
2360 ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
2361 if (ice->eeprom.version != 1) {
2362 snd_printk(KERN_ERR "invalid EEPROM version %i\n",
2363 ice->eeprom.version);
2364 /* return -EIO; */
2365 }
2366 size = ice->eeprom.size - 6;
2367 for (i = 0; i < size; i++)
2368 ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
2369
2370 read_skipped:
2371 ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
2372 ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
2373 ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
2374
2375 return 0;
2376 }
2377
2378
2379
2380 static int __devinit snd_ice1712_chip_init(struct snd_ice1712 *ice)
2381 {
2382 outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
2383 udelay(200);
2384 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
2385 udelay(200);
2386 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE &&
2387 !ice->dxr_enable)
2388 /* Set eeprom value to limit active ADCs and DACs to 6;
2389 * Also disable AC97 as no hardware in standard 6fire card/box
2390 * Note: DXR extensions are not currently supported
2391 */
2392 ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a;
2393 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
2394 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
2395 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
2396 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
2397 if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) {
2398 ice->gpio.write_mask = ice->eeprom.gpiomask;
2399 ice->gpio.direction = ice->eeprom.gpiodir;
2400 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
2401 ice->eeprom.gpiomask);
2402 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
2403 ice->eeprom.gpiodir);
2404 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2405 ice->eeprom.gpiostate);
2406 } else {
2407 ice->gpio.write_mask = 0xc0;
2408 ice->gpio.direction = 0xff;
2409 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
2410 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
2411 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2412 ICE1712_STDSP24_CLOCK_BIT);
2413 }
2414 snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
2415 if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
2416 outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
2417 udelay(100);
2418 outb(0, ICEREG(ice, AC97_CMD));
2419 udelay(200);
2420 snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
2421 }
2422 snd_ice1712_set_pro_rate(ice, 48000, 1);
2423
2424 return 0;
2425 }
2426
2427 int __devinit snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
2428 {
2429 int err;
2430 struct snd_kcontrol *kctl;
2431
2432 if (snd_BUG_ON(!ice->pcm_pro))
2433 return -EIO;
2434 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice));
2435 if (err < 0)
2436 return err;
2437 kctl->id.device = ice->pcm_pro->device;
2438 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice));
2439 if (err < 0)
2440 return err;
2441 kctl->id.device = ice->pcm_pro->device;
2442 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice));
2443 if (err < 0)
2444 return err;
2445 kctl->id.device = ice->pcm_pro->device;
2446 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice));
2447 if (err < 0)
2448 return err;
2449 kctl->id.device = ice->pcm_pro->device;
2450 ice->spdif.stream_ctl = kctl;
2451 return 0;
2452 }
2453
2454
2455 static int __devinit snd_ice1712_build_controls(struct snd_ice1712 *ice)
2456 {
2457 int err;
2458
2459 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
2460 if (err < 0)
2461 return err;
2462 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
2463 if (err < 0)
2464 return err;
2465 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
2466 if (err < 0)
2467 return err;
2468
2469 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
2470 if (err < 0)
2471 return err;
2472 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
2473 if (err < 0)
2474 return err;
2475
2476 if (ice->num_total_dacs > 0) {
2477 struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
2478 tmp.count = ice->num_total_dacs;
2479 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2480 if (err < 0)
2481 return err;
2482 }
2483
2484 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
2485 if (err < 0)
2486 return err;
2487
2488 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
2489 if (err < 0)
2490 return err;
2491 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
2492 if (err < 0)
2493 return err;
2494
2495 return 0;
2496 }
2497
2498 static int snd_ice1712_free(struct snd_ice1712 *ice)
2499 {
2500 if (!ice->port)
2501 goto __hw_end;
2502 /* mask all interrupts */
2503 outb(0xc0, ICEMT(ice, IRQ));
2504 outb(0xff, ICEREG(ice, IRQMASK));
2505 /* --- */
2506 __hw_end:
2507 if (ice->irq >= 0)
2508 free_irq(ice->irq, ice);
2509
2510 if (ice->port)
2511 pci_release_regions(ice->pci);
2512 snd_ice1712_akm4xxx_free(ice);
2513 pci_disable_device(ice->pci);
2514 kfree(ice->spec);
2515 kfree(ice);
2516 return 0;
2517 }
2518
2519 static int snd_ice1712_dev_free(struct snd_device *device)
2520 {
2521 struct snd_ice1712 *ice = device->device_data;
2522 return snd_ice1712_free(ice);
2523 }
2524
2525 static int __devinit snd_ice1712_create(struct snd_card *card,
2526 struct pci_dev *pci,
2527 const char *modelname,
2528 int omni,
2529 int cs8427_timeout,
2530 int dxr_enable,
2531 struct snd_ice1712 **r_ice1712)
2532 {
2533 struct snd_ice1712 *ice;
2534 int err;
2535 static struct snd_device_ops ops = {
2536 .dev_free = snd_ice1712_dev_free,
2537 };
2538
2539 *r_ice1712 = NULL;
2540
2541 /* enable PCI device */
2542 err = pci_enable_device(pci);
2543 if (err < 0)
2544 return err;
2545 /* check, if we can restrict PCI DMA transfers to 28 bits */
2546 if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 ||
2547 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) {
2548 snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n");
2549 pci_disable_device(pci);
2550 return -ENXIO;
2551 }
2552
2553 ice = kzalloc(sizeof(*ice), GFP_KERNEL);
2554 if (ice == NULL) {
2555 pci_disable_device(pci);
2556 return -ENOMEM;
2557 }
2558 ice->omni = omni ? 1 : 0;
2559 if (cs8427_timeout < 1)
2560 cs8427_timeout = 1;
2561 else if (cs8427_timeout > 1000)
2562 cs8427_timeout = 1000;
2563 ice->cs8427_timeout = cs8427_timeout;
2564 ice->dxr_enable = dxr_enable;
2565 spin_lock_init(&ice->reg_lock);
2566 mutex_init(&ice->gpio_mutex);
2567 mutex_init(&ice->i2c_mutex);
2568 mutex_init(&ice->open_mutex);
2569 ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
2570 ice->gpio.get_mask = snd_ice1712_get_gpio_mask;
2571 ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
2572 ice->gpio.get_dir = snd_ice1712_get_gpio_dir;
2573 ice->gpio.set_data = snd_ice1712_set_gpio_data;
2574 ice->gpio.get_data = snd_ice1712_get_gpio_data;
2575
2576 ice->spdif.cs8403_bits =
2577 ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */
2578 0x10 | /* no emphasis */
2579 0x20); /* PCM encoder/decoder */
2580 ice->card = card;
2581 ice->pci = pci;
2582 ice->irq = -1;
2583 pci_set_master(pci);
2584 pci_write_config_word(ice->pci, 0x40, 0x807f);
2585 pci_write_config_word(ice->pci, 0x42, 0x0006);
2586 snd_ice1712_proc_init(ice);
2587 synchronize_irq(pci->irq);
2588
2589 err = pci_request_regions(pci, "ICE1712");
2590 if (err < 0) {
2591 kfree(ice);
2592 pci_disable_device(pci);
2593 return err;
2594 }
2595 ice->port = pci_resource_start(pci, 0);
2596 ice->ddma_port = pci_resource_start(pci, 1);
2597 ice->dmapath_port = pci_resource_start(pci, 2);
2598 ice->profi_port = pci_resource_start(pci, 3);
2599
2600 if (request_irq(pci->irq, snd_ice1712_interrupt, IRQF_SHARED,
2601 "ICE1712", ice)) {
2602 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
2603 snd_ice1712_free(ice);
2604 return -EIO;
2605 }
2606
2607 ice->irq = pci->irq;
2608
2609 if (snd_ice1712_read_eeprom(ice, modelname) < 0) {
2610 snd_ice1712_free(ice);
2611 return -EIO;
2612 }
2613 if (snd_ice1712_chip_init(ice) < 0) {
2614 snd_ice1712_free(ice);
2615 return -EIO;
2616 }
2617
2618 /* unmask used interrupts */
2619 outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
2620 ICE1712_IRQ_MPU2 : 0) |
2621 ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
2622 ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
2623 ICEREG(ice, IRQMASK));
2624 outb(0x00, ICEMT(ice, IRQ));
2625
2626 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
2627 if (err < 0) {
2628 snd_ice1712_free(ice);
2629 return err;
2630 }
2631
2632 snd_card_set_dev(card, &pci->dev);
2633
2634 *r_ice1712 = ice;
2635 return 0;
2636 }
2637
2638
2639 /*
2640 *
2641 * Registration
2642 *
2643 */
2644
2645 static struct snd_ice1712_card_info no_matched __devinitdata;
2646
2647 static int __devinit snd_ice1712_probe(struct pci_dev *pci,
2648 const struct pci_device_id *pci_id)
2649 {
2650 static int dev;
2651 struct snd_card *card;
2652 struct snd_ice1712 *ice;
2653 int pcm_dev = 0, err;
2654 struct snd_ice1712_card_info * const *tbl, *c;
2655
2656 if (dev >= SNDRV_CARDS)
2657 return -ENODEV;
2658 if (!enable[dev]) {
2659 dev++;
2660 return -ENOENT;
2661 }
2662
2663 err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
2664 if (err < 0)
2665 return err;
2666
2667 strcpy(card->driver, "ICE1712");
2668 strcpy(card->shortname, "ICEnsemble ICE1712");
2669
2670 err = snd_ice1712_create(card, pci, model[dev], omni[dev],
2671 cs8427_timeout[dev], dxr_enable[dev], &ice);
2672 if (err < 0) {
2673 snd_card_free(card);
2674 return err;
2675 }
2676
2677 for (tbl = card_tables; *tbl; tbl++) {
2678 for (c = *tbl; c->subvendor; c++) {
2679 if (c->subvendor == ice->eeprom.subvendor) {
2680 strcpy(card->shortname, c->name);
2681 if (c->driver) /* specific driver? */
2682 strcpy(card->driver, c->driver);
2683 if (c->chip_init) {
2684 err = c->chip_init(ice);
2685 if (err < 0) {
2686 snd_card_free(card);
2687 return err;
2688 }
2689 }
2690 goto __found;
2691 }
2692 }
2693 }
2694 c = &no_matched;
2695 __found:
2696
2697 err = snd_ice1712_pcm_profi(ice, pcm_dev++, NULL);
2698 if (err < 0) {
2699 snd_card_free(card);
2700 return err;
2701 }
2702
2703 if (ice_has_con_ac97(ice)) {
2704 err = snd_ice1712_pcm(ice, pcm_dev++, NULL);
2705 if (err < 0) {
2706 snd_card_free(card);
2707 return err;
2708 }
2709 }
2710
2711 err = snd_ice1712_ac97_mixer(ice);
2712 if (err < 0) {
2713 snd_card_free(card);
2714 return err;
2715 }
2716
2717 err = snd_ice1712_build_controls(ice);
2718 if (err < 0) {
2719 snd_card_free(card);
2720 return err;
2721 }
2722
2723 if (c->build_controls) {
2724 err = c->build_controls(ice);
2725 if (err < 0) {
2726 snd_card_free(card);
2727 return err;
2728 }
2729 }
2730
2731 if (ice_has_con_ac97(ice)) {
2732 err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL);
2733 if (err < 0) {
2734 snd_card_free(card);
2735 return err;
2736 }
2737 }
2738
2739 if (!c->no_mpu401) {
2740 err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
2741 ICEREG(ice, MPU1_CTRL),
2742 (c->mpu401_1_info_flags | MPU401_INFO_INTEGRATED),
2743 ice->irq, 0, &ice->rmidi[0]);
2744 if (err < 0) {
2745 snd_card_free(card);
2746 return err;
2747 }
2748 if (c->mpu401_1_name)
2749 /* Prefered name available in card_info */
2750 snprintf(ice->rmidi[0]->name,
2751 sizeof(ice->rmidi[0]->name),
2752 "%s %d", c->mpu401_1_name, card->number);
2753
2754 if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) {
2755 /* 2nd port used */
2756 err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
2757 ICEREG(ice, MPU2_CTRL),
2758 (c->mpu401_2_info_flags | MPU401_INFO_INTEGRATED),
2759 ice->irq, 0, &ice->rmidi[1]);
2760
2761 if (err < 0) {
2762 snd_card_free(card);
2763 return err;
2764 }
2765 if (c->mpu401_2_name)
2766 /* Prefered name available in card_info */
2767 snprintf(ice->rmidi[1]->name,
2768 sizeof(ice->rmidi[1]->name),
2769 "%s %d", c->mpu401_2_name,
2770 card->number);
2771 }
2772 }
2773
2774 snd_ice1712_set_input_clock_source(ice, 0);
2775
2776 sprintf(card->longname, "%s at 0x%lx, irq %i",
2777 card->shortname, ice->port, ice->irq);
2778
2779 err = snd_card_register(card);
2780 if (err < 0) {
2781 snd_card_free(card);
2782 return err;
2783 }
2784 pci_set_drvdata(pci, card);
2785 dev++;
2786 return 0;
2787 }
2788
2789 static void __devexit snd_ice1712_remove(struct pci_dev *pci)
2790 {
2791 snd_card_free(pci_get_drvdata(pci));
2792 pci_set_drvdata(pci, NULL);
2793 }
2794
2795 static struct pci_driver driver = {
2796 .name = "ICE1712",
2797 .id_table = snd_ice1712_ids,
2798 .probe = snd_ice1712_probe,
2799 .remove = __devexit_p(snd_ice1712_remove),
2800 };
2801
2802 static int __init alsa_card_ice1712_init(void)
2803 {
2804 return pci_register_driver(&driver);
2805 }
2806
2807 static void __exit alsa_card_ice1712_exit(void)
2808 {
2809 pci_unregister_driver(&driver);
2810 }
2811
2812 module_init(alsa_card_ice1712_init)
2813 module_exit(alsa_card_ice1712_exit)
mm of the moment repository