2 * C-Media CMI8788 driver - main driver module
4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
7 * This driver is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License, version 2.
10 * This driver is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this driver; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/delay.h>
21 #include <linux/interrupt.h>
22 #include <linux/mutex.h>
23 #include <linux/pci.h>
24 #include <sound/ac97_codec.h>
25 #include <sound/asoundef.h>
26 #include <sound/core.h>
27 #include <sound/info.h>
28 #include <sound/mpu401.h>
29 #include <sound/pcm.h>
33 MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
34 MODULE_DESCRIPTION("C-Media CMI8788 helper library");
35 MODULE_LICENSE("GPL v2");
37 #define DRIVER "oxygen"
39 static inline int oxygen_uart_input_ready(struct oxygen
*chip
)
41 return !(oxygen_read8(chip
, OXYGEN_MPU401
+ 1) & MPU401_RX_EMPTY
);
44 static void oxygen_read_uart(struct oxygen
*chip
)
46 if (unlikely(!oxygen_uart_input_ready(chip
))) {
47 /* no data, but read it anyway to clear the interrupt */
48 oxygen_read8(chip
, OXYGEN_MPU401
);
52 u8 data
= oxygen_read8(chip
, OXYGEN_MPU401
);
53 if (data
== MPU401_ACK
)
55 if (chip
->uart_input_count
>= ARRAY_SIZE(chip
->uart_input
))
56 chip
->uart_input_count
= 0;
57 chip
->uart_input
[chip
->uart_input_count
++] = data
;
58 } while (oxygen_uart_input_ready(chip
));
59 if (chip
->model
.uart_input
)
60 chip
->model
.uart_input(chip
);
63 static irqreturn_t
oxygen_interrupt(int dummy
, void *dev_id
)
65 struct oxygen
*chip
= dev_id
;
66 unsigned int status
, clear
, elapsed_streams
, i
;
68 status
= oxygen_read16(chip
, OXYGEN_INTERRUPT_STATUS
);
72 spin_lock(&chip
->reg_lock
);
74 clear
= status
& (OXYGEN_CHANNEL_A
|
77 OXYGEN_CHANNEL_SPDIF
|
78 OXYGEN_CHANNEL_MULTICH
|
80 OXYGEN_INT_SPDIF_IN_DETECT
|
84 if (clear
& OXYGEN_INT_SPDIF_IN_DETECT
)
85 chip
->interrupt_mask
&= ~OXYGEN_INT_SPDIF_IN_DETECT
;
86 oxygen_write16(chip
, OXYGEN_INTERRUPT_MASK
,
87 chip
->interrupt_mask
& ~clear
);
88 oxygen_write16(chip
, OXYGEN_INTERRUPT_MASK
,
89 chip
->interrupt_mask
);
92 elapsed_streams
= status
& chip
->pcm_running
;
94 spin_unlock(&chip
->reg_lock
);
96 for (i
= 0; i
< PCM_COUNT
; ++i
)
97 if ((elapsed_streams
& (1 << i
)) && chip
->streams
[i
])
98 snd_pcm_period_elapsed(chip
->streams
[i
]);
100 if (status
& OXYGEN_INT_SPDIF_IN_DETECT
) {
101 spin_lock(&chip
->reg_lock
);
102 i
= oxygen_read32(chip
, OXYGEN_SPDIF_CONTROL
);
103 if (i
& (OXYGEN_SPDIF_SENSE_INT
| OXYGEN_SPDIF_LOCK_INT
|
104 OXYGEN_SPDIF_RATE_INT
)) {
105 /* write the interrupt bit(s) to clear */
106 oxygen_write32(chip
, OXYGEN_SPDIF_CONTROL
, i
);
107 schedule_work(&chip
->spdif_input_bits_work
);
109 spin_unlock(&chip
->reg_lock
);
112 if (status
& OXYGEN_INT_GPIO
)
113 schedule_work(&chip
->gpio_work
);
115 if (status
& OXYGEN_INT_MIDI
) {
117 snd_mpu401_uart_interrupt(0, chip
->midi
->private_data
);
119 oxygen_read_uart(chip
);
122 if (status
& OXYGEN_INT_AC97
)
123 wake_up(&chip
->ac97_waitqueue
);
128 static void oxygen_spdif_input_bits_changed(struct work_struct
*work
)
130 struct oxygen
*chip
= container_of(work
, struct oxygen
,
131 spdif_input_bits_work
);
135 * This function gets called when there is new activity on the SPDIF
136 * input, or when we lose lock on the input signal, or when the rate
140 spin_lock_irq(&chip
->reg_lock
);
141 reg
= oxygen_read32(chip
, OXYGEN_SPDIF_CONTROL
);
142 if ((reg
& (OXYGEN_SPDIF_SENSE_STATUS
|
143 OXYGEN_SPDIF_LOCK_STATUS
))
144 == OXYGEN_SPDIF_SENSE_STATUS
) {
146 * If we detect activity on the SPDIF input but cannot lock to
147 * a signal, the clock bit is likely to be wrong.
149 reg
^= OXYGEN_SPDIF_IN_CLOCK_MASK
;
150 oxygen_write32(chip
, OXYGEN_SPDIF_CONTROL
, reg
);
151 spin_unlock_irq(&chip
->reg_lock
);
153 spin_lock_irq(&chip
->reg_lock
);
154 reg
= oxygen_read32(chip
, OXYGEN_SPDIF_CONTROL
);
155 if ((reg
& (OXYGEN_SPDIF_SENSE_STATUS
|
156 OXYGEN_SPDIF_LOCK_STATUS
))
157 == OXYGEN_SPDIF_SENSE_STATUS
) {
158 /* nothing detected with either clock; give up */
159 if ((reg
& OXYGEN_SPDIF_IN_CLOCK_MASK
)
160 == OXYGEN_SPDIF_IN_CLOCK_192
) {
162 * Reset clock to <= 96 kHz because this is
163 * more likely to be received next time.
165 reg
&= ~OXYGEN_SPDIF_IN_CLOCK_MASK
;
166 reg
|= OXYGEN_SPDIF_IN_CLOCK_96
;
167 oxygen_write32(chip
, OXYGEN_SPDIF_CONTROL
, reg
);
171 spin_unlock_irq(&chip
->reg_lock
);
173 if (chip
->controls
[CONTROL_SPDIF_INPUT_BITS
]) {
174 spin_lock_irq(&chip
->reg_lock
);
175 chip
->interrupt_mask
|= OXYGEN_INT_SPDIF_IN_DETECT
;
176 oxygen_write16(chip
, OXYGEN_INTERRUPT_MASK
,
177 chip
->interrupt_mask
);
178 spin_unlock_irq(&chip
->reg_lock
);
181 * We don't actually know that any channel status bits have
182 * changed, but let's send a notification just to be sure.
184 snd_ctl_notify(chip
->card
, SNDRV_CTL_EVENT_MASK_VALUE
,
185 &chip
->controls
[CONTROL_SPDIF_INPUT_BITS
]->id
);
189 static void oxygen_gpio_changed(struct work_struct
*work
)
191 struct oxygen
*chip
= container_of(work
, struct oxygen
, gpio_work
);
193 if (chip
->model
.gpio_changed
)
194 chip
->model
.gpio_changed(chip
);
197 #ifdef CONFIG_PROC_FS
198 static void oxygen_proc_read(struct snd_info_entry
*entry
,
199 struct snd_info_buffer
*buffer
)
201 struct oxygen
*chip
= entry
->private_data
;
204 snd_iprintf(buffer
, "CMI8788\n\n");
205 for (i
= 0; i
< OXYGEN_IO_SIZE
; i
+= 0x10) {
206 snd_iprintf(buffer
, "%02x:", i
);
207 for (j
= 0; j
< 0x10; ++j
)
208 snd_iprintf(buffer
, " %02x", oxygen_read8(chip
, i
+ j
));
209 snd_iprintf(buffer
, "\n");
211 if (mutex_lock_interruptible(&chip
->mutex
) < 0)
213 if (chip
->has_ac97_0
) {
214 snd_iprintf(buffer
, "\nAC97\n");
215 for (i
= 0; i
< 0x80; i
+= 0x10) {
216 snd_iprintf(buffer
, "%02x:", i
);
217 for (j
= 0; j
< 0x10; j
+= 2)
218 snd_iprintf(buffer
, " %04x",
219 oxygen_read_ac97(chip
, 0, i
+ j
));
220 snd_iprintf(buffer
, "\n");
223 if (chip
->has_ac97_1
) {
224 snd_iprintf(buffer
, "\nAC97 2\n");
225 for (i
= 0; i
< 0x80; i
+= 0x10) {
226 snd_iprintf(buffer
, "%02x:", i
);
227 for (j
= 0; j
< 0x10; j
+= 2)
228 snd_iprintf(buffer
, " %04x",
229 oxygen_read_ac97(chip
, 1, i
+ j
));
230 snd_iprintf(buffer
, "\n");
233 mutex_unlock(&chip
->mutex
);
236 static void oxygen_proc_init(struct oxygen
*chip
)
238 struct snd_info_entry
*entry
;
240 if (!snd_card_proc_new(chip
->card
, "cmi8788", &entry
))
241 snd_info_set_text_ops(entry
, chip
, oxygen_proc_read
);
244 #define oxygen_proc_init(chip)
247 static const struct pci_device_id
*
248 oxygen_search_pci_id(struct oxygen
*chip
, const struct pci_device_id ids
[])
253 * Make sure the EEPROM pins are available, i.e., not used for SPI.
254 * (This function is called before we initialize or use SPI.)
256 oxygen_clear_bits8(chip
, OXYGEN_FUNCTION
,
257 OXYGEN_FUNCTION_ENABLE_SPI_4_5
);
259 * Read the subsystem device ID directly from the EEPROM, because the
260 * chip didn't if the first EEPROM word was overwritten.
262 subdevice
= oxygen_read_eeprom(chip
, 2);
263 /* use default ID if EEPROM is missing */
264 if (subdevice
== 0xffff)
267 * We use only the subsystem device ID for searching because it is
268 * unique even without the subsystem vendor ID, which may have been
269 * overwritten in the EEPROM.
271 for (; ids
->vendor
; ++ids
)
272 if (ids
->subdevice
== subdevice
&&
273 ids
->driver_data
!= BROKEN_EEPROM_DRIVER_DATA
)
278 static void oxygen_restore_eeprom(struct oxygen
*chip
,
279 const struct pci_device_id
*id
)
283 eeprom_id
= oxygen_read_eeprom(chip
, 0);
284 if (eeprom_id
!= OXYGEN_EEPROM_ID
&&
285 (eeprom_id
!= 0xffff || id
->subdevice
!= 0x8788)) {
287 * This function gets called only when a known card model has
288 * been detected, i.e., we know there is a valid subsystem
289 * product ID at index 2 in the EEPROM. Therefore, we have
290 * been able to deduce the correct subsystem vendor ID, and
291 * this is enough information to restore the original EEPROM
294 oxygen_write_eeprom(chip
, 1, id
->subvendor
);
295 oxygen_write_eeprom(chip
, 0, OXYGEN_EEPROM_ID
);
297 oxygen_set_bits8(chip
, OXYGEN_MISC
,
298 OXYGEN_MISC_WRITE_PCI_SUBID
);
299 pci_write_config_word(chip
->pci
, PCI_SUBSYSTEM_VENDOR_ID
,
301 pci_write_config_word(chip
->pci
, PCI_SUBSYSTEM_ID
,
303 oxygen_clear_bits8(chip
, OXYGEN_MISC
,
304 OXYGEN_MISC_WRITE_PCI_SUBID
);
306 snd_printk(KERN_INFO
"EEPROM ID restored\n");
310 static void pci_bridge_magic(void)
312 struct pci_dev
*pci
= NULL
;
316 /* If there is any Pericom PI7C9X110 PCI-E/PCI bridge ... */
317 pci
= pci_get_device(0x12d8, 0xe110, pci
);
321 * ... configure its secondary internal arbiter to park to
322 * the secondary port, instead of to the last master.
324 if (!pci_read_config_dword(pci
, 0x40, &tmp
)) {
326 pci_write_config_dword(pci
, 0x40, tmp
);
328 /* Why? Try asking C-Media. */
332 static void oxygen_init(struct oxygen
*chip
)
336 chip
->dac_routing
= 1;
337 for (i
= 0; i
< 8; ++i
)
338 chip
->dac_volume
[i
] = chip
->model
.dac_volume_min
;
340 chip
->spdif_playback_enable
= 1;
341 chip
->spdif_bits
= OXYGEN_SPDIF_C
| OXYGEN_SPDIF_ORIGINAL
|
342 (IEC958_AES1_CON_PCM_CODER
<< OXYGEN_SPDIF_CATEGORY_SHIFT
);
343 chip
->spdif_pcm_bits
= chip
->spdif_bits
;
345 if (oxygen_read8(chip
, OXYGEN_REVISION
) & OXYGEN_REVISION_2
)
350 if (chip
->revision
== 1)
351 oxygen_set_bits8(chip
, OXYGEN_MISC
,
352 OXYGEN_MISC_PCI_MEM_W_1_CLOCK
);
354 i
= oxygen_read16(chip
, OXYGEN_AC97_CONTROL
);
355 chip
->has_ac97_0
= (i
& OXYGEN_AC97_CODEC_0
) != 0;
356 chip
->has_ac97_1
= (i
& OXYGEN_AC97_CODEC_1
) != 0;
358 oxygen_write8_masked(chip
, OXYGEN_FUNCTION
,
359 OXYGEN_FUNCTION_RESET_CODEC
|
360 chip
->model
.function_flags
,
361 OXYGEN_FUNCTION_RESET_CODEC
|
362 OXYGEN_FUNCTION_2WIRE_SPI_MASK
|
363 OXYGEN_FUNCTION_ENABLE_SPI_4_5
);
364 oxygen_write8(chip
, OXYGEN_DMA_STATUS
, 0);
365 oxygen_write8(chip
, OXYGEN_DMA_PAUSE
, 0);
366 oxygen_write8(chip
, OXYGEN_PLAY_CHANNELS
,
367 OXYGEN_PLAY_CHANNELS_2
|
368 OXYGEN_DMA_A_BURST_8
|
369 OXYGEN_DMA_MULTICH_BURST_8
);
370 oxygen_write16(chip
, OXYGEN_INTERRUPT_MASK
, 0);
371 oxygen_write8_masked(chip
, OXYGEN_MISC
,
372 chip
->model
.misc_flags
,
373 OXYGEN_MISC_WRITE_PCI_SUBID
|
374 OXYGEN_MISC_REC_C_FROM_SPDIF
|
375 OXYGEN_MISC_REC_B_FROM_AC97
|
376 OXYGEN_MISC_REC_A_FROM_MULTICH
|
378 oxygen_write8(chip
, OXYGEN_REC_FORMAT
,
379 (OXYGEN_FORMAT_16
<< OXYGEN_REC_FORMAT_A_SHIFT
) |
380 (OXYGEN_FORMAT_16
<< OXYGEN_REC_FORMAT_B_SHIFT
) |
381 (OXYGEN_FORMAT_16
<< OXYGEN_REC_FORMAT_C_SHIFT
));
382 oxygen_write8(chip
, OXYGEN_PLAY_FORMAT
,
383 (OXYGEN_FORMAT_16
<< OXYGEN_SPDIF_FORMAT_SHIFT
) |
384 (OXYGEN_FORMAT_16
<< OXYGEN_MULTICH_FORMAT_SHIFT
));
385 oxygen_write8(chip
, OXYGEN_REC_CHANNELS
, OXYGEN_REC_CHANNELS_2_2_2
);
386 oxygen_write16(chip
, OXYGEN_I2S_MULTICH_FORMAT
,
387 OXYGEN_RATE_48000
| chip
->model
.dac_i2s_format
|
388 OXYGEN_I2S_MCLK_256
| OXYGEN_I2S_BITS_16
|
389 OXYGEN_I2S_MASTER
| OXYGEN_I2S_BCLK_64
);
390 if (chip
->model
.device_config
& CAPTURE_0_FROM_I2S_1
)
391 oxygen_write16(chip
, OXYGEN_I2S_A_FORMAT
,
392 OXYGEN_RATE_48000
| chip
->model
.adc_i2s_format
|
393 OXYGEN_I2S_MCLK_256
| OXYGEN_I2S_BITS_16
|
394 OXYGEN_I2S_MASTER
| OXYGEN_I2S_BCLK_64
);
396 oxygen_write16(chip
, OXYGEN_I2S_A_FORMAT
,
397 OXYGEN_I2S_MASTER
| OXYGEN_I2S_MUTE_MCLK
);
398 if (chip
->model
.device_config
& (CAPTURE_0_FROM_I2S_2
|
399 CAPTURE_2_FROM_I2S_2
))
400 oxygen_write16(chip
, OXYGEN_I2S_B_FORMAT
,
401 OXYGEN_RATE_48000
| chip
->model
.adc_i2s_format
|
402 OXYGEN_I2S_MCLK_256
| OXYGEN_I2S_BITS_16
|
403 OXYGEN_I2S_MASTER
| OXYGEN_I2S_BCLK_64
);
405 oxygen_write16(chip
, OXYGEN_I2S_B_FORMAT
,
406 OXYGEN_I2S_MASTER
| OXYGEN_I2S_MUTE_MCLK
);
407 oxygen_write16(chip
, OXYGEN_I2S_C_FORMAT
,
408 OXYGEN_I2S_MASTER
| OXYGEN_I2S_MUTE_MCLK
);
409 oxygen_clear_bits32(chip
, OXYGEN_SPDIF_CONTROL
,
410 OXYGEN_SPDIF_OUT_ENABLE
|
411 OXYGEN_SPDIF_LOOPBACK
);
412 if (chip
->model
.device_config
& CAPTURE_1_FROM_SPDIF
)
413 oxygen_write32_masked(chip
, OXYGEN_SPDIF_CONTROL
,
414 OXYGEN_SPDIF_SENSE_MASK
|
415 OXYGEN_SPDIF_LOCK_MASK
|
416 OXYGEN_SPDIF_RATE_MASK
|
417 OXYGEN_SPDIF_LOCK_PAR
|
418 OXYGEN_SPDIF_IN_CLOCK_96
,
419 OXYGEN_SPDIF_SENSE_MASK
|
420 OXYGEN_SPDIF_LOCK_MASK
|
421 OXYGEN_SPDIF_RATE_MASK
|
422 OXYGEN_SPDIF_SENSE_PAR
|
423 OXYGEN_SPDIF_LOCK_PAR
|
424 OXYGEN_SPDIF_IN_CLOCK_MASK
);
426 oxygen_clear_bits32(chip
, OXYGEN_SPDIF_CONTROL
,
427 OXYGEN_SPDIF_SENSE_MASK
|
428 OXYGEN_SPDIF_LOCK_MASK
|
429 OXYGEN_SPDIF_RATE_MASK
);
430 oxygen_write32(chip
, OXYGEN_SPDIF_OUTPUT_BITS
, chip
->spdif_bits
);
431 oxygen_write16(chip
, OXYGEN_2WIRE_BUS_STATUS
,
432 OXYGEN_2WIRE_LENGTH_8
|
433 OXYGEN_2WIRE_INTERRUPT_MASK
|
434 OXYGEN_2WIRE_SPEED_STANDARD
);
435 oxygen_clear_bits8(chip
, OXYGEN_MPU401_CONTROL
, OXYGEN_MPU401_LOOPBACK
);
436 oxygen_write8(chip
, OXYGEN_GPI_INTERRUPT_MASK
, 0);
437 oxygen_write16(chip
, OXYGEN_GPIO_INTERRUPT_MASK
, 0);
438 oxygen_write16(chip
, OXYGEN_PLAY_ROUTING
,
439 OXYGEN_PLAY_MULTICH_I2S_DAC
|
440 OXYGEN_PLAY_SPDIF_SPDIF
|
441 (0 << OXYGEN_PLAY_DAC0_SOURCE_SHIFT
) |
442 (1 << OXYGEN_PLAY_DAC1_SOURCE_SHIFT
) |
443 (2 << OXYGEN_PLAY_DAC2_SOURCE_SHIFT
) |
444 (3 << OXYGEN_PLAY_DAC3_SOURCE_SHIFT
));
445 oxygen_write8(chip
, OXYGEN_REC_ROUTING
,
446 OXYGEN_REC_A_ROUTE_I2S_ADC_1
|
447 OXYGEN_REC_B_ROUTE_I2S_ADC_2
|
448 OXYGEN_REC_C_ROUTE_SPDIF
);
449 oxygen_write8(chip
, OXYGEN_ADC_MONITOR
, 0);
450 oxygen_write8(chip
, OXYGEN_A_MONITOR_ROUTING
,
451 (0 << OXYGEN_A_MONITOR_ROUTE_0_SHIFT
) |
452 (1 << OXYGEN_A_MONITOR_ROUTE_1_SHIFT
) |
453 (2 << OXYGEN_A_MONITOR_ROUTE_2_SHIFT
) |
454 (3 << OXYGEN_A_MONITOR_ROUTE_3_SHIFT
));
456 if (chip
->has_ac97_0
| chip
->has_ac97_1
)
457 oxygen_write8(chip
, OXYGEN_AC97_INTERRUPT_MASK
,
458 OXYGEN_AC97_INT_READ_DONE
|
459 OXYGEN_AC97_INT_WRITE_DONE
);
461 oxygen_write8(chip
, OXYGEN_AC97_INTERRUPT_MASK
, 0);
462 oxygen_write32(chip
, OXYGEN_AC97_OUT_CONFIG
, 0);
463 oxygen_write32(chip
, OXYGEN_AC97_IN_CONFIG
, 0);
464 if (!(chip
->has_ac97_0
| chip
->has_ac97_1
))
465 oxygen_set_bits16(chip
, OXYGEN_AC97_CONTROL
,
466 OXYGEN_AC97_CLOCK_DISABLE
);
467 if (!chip
->has_ac97_0
) {
468 oxygen_set_bits16(chip
, OXYGEN_AC97_CONTROL
,
469 OXYGEN_AC97_NO_CODEC_0
);
471 oxygen_write_ac97(chip
, 0, AC97_RESET
, 0);
473 oxygen_ac97_set_bits(chip
, 0, CM9780_GPIO_SETUP
,
474 CM9780_GPIO0IO
| CM9780_GPIO1IO
);
475 oxygen_ac97_set_bits(chip
, 0, CM9780_MIXER
,
476 CM9780_BSTSEL
| CM9780_STRO_MIC
|
477 CM9780_MIX2FR
| CM9780_PCBSW
);
478 oxygen_ac97_set_bits(chip
, 0, CM9780_JACK
,
479 CM9780_RSOE
| CM9780_CBOE
|
480 CM9780_SSOE
| CM9780_FROE
|
481 CM9780_MIC2MIC
| CM9780_LI2LI
);
482 oxygen_write_ac97(chip
, 0, AC97_MASTER
, 0x0000);
483 oxygen_write_ac97(chip
, 0, AC97_PC_BEEP
, 0x8000);
484 oxygen_write_ac97(chip
, 0, AC97_MIC
, 0x8808);
485 oxygen_write_ac97(chip
, 0, AC97_LINE
, 0x0808);
486 oxygen_write_ac97(chip
, 0, AC97_CD
, 0x8808);
487 oxygen_write_ac97(chip
, 0, AC97_VIDEO
, 0x8808);
488 oxygen_write_ac97(chip
, 0, AC97_AUX
, 0x8808);
489 oxygen_write_ac97(chip
, 0, AC97_REC_GAIN
, 0x8000);
490 oxygen_write_ac97(chip
, 0, AC97_CENTER_LFE_MASTER
, 0x8080);
491 oxygen_write_ac97(chip
, 0, AC97_SURROUND_MASTER
, 0x8080);
492 oxygen_ac97_clear_bits(chip
, 0, CM9780_GPIO_STATUS
,
494 /* power down unused ADCs and DACs */
495 oxygen_ac97_set_bits(chip
, 0, AC97_POWERDOWN
,
496 AC97_PD_PR0
| AC97_PD_PR1
);
497 oxygen_ac97_set_bits(chip
, 0, AC97_EXTENDED_STATUS
,
498 AC97_EA_PRI
| AC97_EA_PRJ
| AC97_EA_PRK
);
500 if (chip
->has_ac97_1
) {
501 oxygen_set_bits32(chip
, OXYGEN_AC97_OUT_CONFIG
,
502 OXYGEN_AC97_CODEC1_SLOT3
|
503 OXYGEN_AC97_CODEC1_SLOT4
);
504 oxygen_write_ac97(chip
, 1, AC97_RESET
, 0);
506 oxygen_write_ac97(chip
, 1, AC97_MASTER
, 0x0000);
507 oxygen_write_ac97(chip
, 1, AC97_HEADPHONE
, 0x8000);
508 oxygen_write_ac97(chip
, 1, AC97_PC_BEEP
, 0x8000);
509 oxygen_write_ac97(chip
, 1, AC97_MIC
, 0x8808);
510 oxygen_write_ac97(chip
, 1, AC97_LINE
, 0x8808);
511 oxygen_write_ac97(chip
, 1, AC97_CD
, 0x8808);
512 oxygen_write_ac97(chip
, 1, AC97_VIDEO
, 0x8808);
513 oxygen_write_ac97(chip
, 1, AC97_AUX
, 0x8808);
514 oxygen_write_ac97(chip
, 1, AC97_PCM
, 0x0808);
515 oxygen_write_ac97(chip
, 1, AC97_REC_SEL
, 0x0000);
516 oxygen_write_ac97(chip
, 1, AC97_REC_GAIN
, 0x0000);
517 oxygen_ac97_set_bits(chip
, 1, 0x6a, 0x0040);
521 static void oxygen_card_free(struct snd_card
*card
)
523 struct oxygen
*chip
= card
->private_data
;
525 spin_lock_irq(&chip
->reg_lock
);
526 chip
->interrupt_mask
= 0;
527 chip
->pcm_running
= 0;
528 oxygen_write16(chip
, OXYGEN_DMA_STATUS
, 0);
529 oxygen_write16(chip
, OXYGEN_INTERRUPT_MASK
, 0);
530 spin_unlock_irq(&chip
->reg_lock
);
532 free_irq(chip
->irq
, chip
);
533 flush_scheduled_work();
534 chip
->model
.cleanup(chip
);
535 kfree(chip
->model_data
);
536 mutex_destroy(&chip
->mutex
);
537 pci_release_regions(chip
->pci
);
538 pci_disable_device(chip
->pci
);
541 int oxygen_pci_probe(struct pci_dev
*pci
, int index
, char *id
,
542 struct module
*owner
,
543 const struct pci_device_id
*ids
,
544 int (*get_model
)(struct oxygen
*chip
,
545 const struct pci_device_id
*id
549 struct snd_card
*card
;
551 const struct pci_device_id
*pci_id
;
554 err
= snd_card_create(index
, id
, owner
, sizeof(*chip
), &card
);
558 chip
= card
->private_data
;
562 spin_lock_init(&chip
->reg_lock
);
563 mutex_init(&chip
->mutex
);
564 INIT_WORK(&chip
->spdif_input_bits_work
,
565 oxygen_spdif_input_bits_changed
);
566 INIT_WORK(&chip
->gpio_work
, oxygen_gpio_changed
);
567 init_waitqueue_head(&chip
->ac97_waitqueue
);
569 err
= pci_enable_device(pci
);
573 err
= pci_request_regions(pci
, DRIVER
);
575 snd_printk(KERN_ERR
"cannot reserve PCI resources\n");
579 if (!(pci_resource_flags(pci
, 0) & IORESOURCE_IO
) ||
580 pci_resource_len(pci
, 0) < OXYGEN_IO_SIZE
) {
581 snd_printk(KERN_ERR
"invalid PCI I/O range\n");
583 goto err_pci_regions
;
585 chip
->addr
= pci_resource_start(pci
, 0);
587 pci_id
= oxygen_search_pci_id(chip
, ids
);
590 goto err_pci_regions
;
592 oxygen_restore_eeprom(chip
, pci_id
);
593 err
= get_model(chip
, pci_id
);
595 goto err_pci_regions
;
597 if (chip
->model
.model_data_size
) {
598 chip
->model_data
= kzalloc(chip
->model
.model_data_size
,
600 if (!chip
->model_data
) {
602 goto err_pci_regions
;
607 snd_card_set_dev(card
, &pci
->dev
);
608 card
->private_free
= oxygen_card_free
;
612 chip
->model
.init(chip
);
614 err
= request_irq(pci
->irq
, oxygen_interrupt
, IRQF_SHARED
,
617 snd_printk(KERN_ERR
"cannot grab interrupt %d\n", pci
->irq
);
620 chip
->irq
= pci
->irq
;
622 strcpy(card
->driver
, chip
->model
.chip
);
623 strcpy(card
->shortname
, chip
->model
.shortname
);
624 sprintf(card
->longname
, "%s (rev %u) at %#lx, irq %i",
625 chip
->model
.longname
, chip
->revision
, chip
->addr
, chip
->irq
);
626 strcpy(card
->mixername
, chip
->model
.chip
);
627 snd_component_add(card
, chip
->model
.chip
);
629 err
= oxygen_pcm_init(chip
);
633 err
= oxygen_mixer_init(chip
);
637 if (chip
->model
.device_config
& (MIDI_OUTPUT
| MIDI_INPUT
)) {
638 unsigned int info_flags
= MPU401_INFO_INTEGRATED
;
639 if (chip
->model
.device_config
& MIDI_OUTPUT
)
640 info_flags
|= MPU401_INFO_OUTPUT
;
641 if (chip
->model
.device_config
& MIDI_INPUT
)
642 info_flags
|= MPU401_INFO_INPUT
;
643 err
= snd_mpu401_uart_new(card
, 0, MPU401_HW_CMIPCI
,
644 chip
->addr
+ OXYGEN_MPU401
,
651 oxygen_proc_init(chip
);
653 spin_lock_irq(&chip
->reg_lock
);
654 if (chip
->model
.device_config
& CAPTURE_1_FROM_SPDIF
)
655 chip
->interrupt_mask
|= OXYGEN_INT_SPDIF_IN_DETECT
;
656 if (chip
->has_ac97_0
| chip
->has_ac97_1
)
657 chip
->interrupt_mask
|= OXYGEN_INT_AC97
;
658 oxygen_write16(chip
, OXYGEN_INTERRUPT_MASK
, chip
->interrupt_mask
);
659 spin_unlock_irq(&chip
->reg_lock
);
661 err
= snd_card_register(card
);
665 pci_set_drvdata(pci
, card
);
669 pci_release_regions(pci
);
671 pci_disable_device(pci
);
676 EXPORT_SYMBOL(oxygen_pci_probe
);
678 void oxygen_pci_remove(struct pci_dev
*pci
)
680 snd_card_free(pci_get_drvdata(pci
));
681 pci_set_drvdata(pci
, NULL
);
683 EXPORT_SYMBOL(oxygen_pci_remove
);
686 int oxygen_pci_suspend(struct pci_dev
*pci
, pm_message_t state
)
688 struct snd_card
*card
= pci_get_drvdata(pci
);
689 struct oxygen
*chip
= card
->private_data
;
690 unsigned int i
, saved_interrupt_mask
;
692 snd_power_change_state(card
, SNDRV_CTL_POWER_D3hot
);
694 for (i
= 0; i
< PCM_COUNT
; ++i
)
695 if (chip
->streams
[i
])
696 snd_pcm_suspend(chip
->streams
[i
]);
698 if (chip
->model
.suspend
)
699 chip
->model
.suspend(chip
);
701 spin_lock_irq(&chip
->reg_lock
);
702 saved_interrupt_mask
= chip
->interrupt_mask
;
703 chip
->interrupt_mask
= 0;
704 oxygen_write16(chip
, OXYGEN_DMA_STATUS
, 0);
705 oxygen_write16(chip
, OXYGEN_INTERRUPT_MASK
, 0);
706 spin_unlock_irq(&chip
->reg_lock
);
708 synchronize_irq(chip
->irq
);
709 flush_scheduled_work();
710 chip
->interrupt_mask
= saved_interrupt_mask
;
712 pci_disable_device(pci
);
714 pci_set_power_state(pci
, pci_choose_state(pci
, state
));
717 EXPORT_SYMBOL(oxygen_pci_suspend
);
719 static const u32 registers_to_restore
[OXYGEN_IO_SIZE
/ 32] = {
720 0xffffffff, 0x00ff077f, 0x00011d08, 0x007f00ff,
721 0x00300000, 0x00000fe4, 0x0ff7001f, 0x00000000
723 static const u32 ac97_registers_to_restore
[2][0x40 / 32] = {
724 { 0x18284fa2, 0x03060000 },
725 { 0x00007fa6, 0x00200000 }
728 static inline int is_bit_set(const u32
*bitmap
, unsigned int bit
)
730 return bitmap
[bit
/ 32] & (1 << (bit
& 31));
733 static void oxygen_restore_ac97(struct oxygen
*chip
, unsigned int codec
)
737 oxygen_write_ac97(chip
, codec
, AC97_RESET
, 0);
739 for (i
= 1; i
< 0x40; ++i
)
740 if (is_bit_set(ac97_registers_to_restore
[codec
], i
))
741 oxygen_write_ac97(chip
, codec
, i
* 2,
742 chip
->saved_ac97_registers
[codec
][i
]);
745 int oxygen_pci_resume(struct pci_dev
*pci
)
747 struct snd_card
*card
= pci_get_drvdata(pci
);
748 struct oxygen
*chip
= card
->private_data
;
751 pci_set_power_state(pci
, PCI_D0
);
752 pci_restore_state(pci
);
753 if (pci_enable_device(pci
) < 0) {
754 snd_printk(KERN_ERR
"cannot reenable device");
755 snd_card_disconnect(card
);
760 oxygen_write16(chip
, OXYGEN_DMA_STATUS
, 0);
761 oxygen_write16(chip
, OXYGEN_INTERRUPT_MASK
, 0);
762 for (i
= 0; i
< OXYGEN_IO_SIZE
; ++i
)
763 if (is_bit_set(registers_to_restore
, i
))
764 oxygen_write8(chip
, i
, chip
->saved_registers
._8
[i
]);
765 if (chip
->has_ac97_0
)
766 oxygen_restore_ac97(chip
, 0);
767 if (chip
->has_ac97_1
)
768 oxygen_restore_ac97(chip
, 1);
770 if (chip
->model
.resume
)
771 chip
->model
.resume(chip
);
773 oxygen_write16(chip
, OXYGEN_INTERRUPT_MASK
, chip
->interrupt_mask
);
775 snd_power_change_state(card
, SNDRV_CTL_POWER_D0
);
778 EXPORT_SYMBOL(oxygen_pci_resume
);
779 #endif /* CONFIG_PM */