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fed up with those stupid warnings
[mmotm.git] / arch / blackfin / kernel / bfin_gpio.c
blob22705eeff34f5b64c4f510cc4a781a18d6afc0f8
1 /*
2 * GPIO Abstraction Layer
3 *
4 * Copyright 2006-2009 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later
7 */
8
9 #include <linux/delay.h>
10 #include <linux/module.h>
11 #include <linux/err.h>
12 #include <linux/proc_fs.h>
13 #include <asm/blackfin.h>
14 #include <asm/gpio.h>
15 #include <asm/portmux.h>
16 #include <linux/irq.h>
17
18 #if ANOMALY_05000311 || ANOMALY_05000323
19 enum {
20 AWA_data = SYSCR,
21 AWA_data_clear = SYSCR,
22 AWA_data_set = SYSCR,
23 AWA_toggle = SYSCR,
24 AWA_maska = BFIN_UART_SCR,
25 AWA_maska_clear = BFIN_UART_SCR,
26 AWA_maska_set = BFIN_UART_SCR,
27 AWA_maska_toggle = BFIN_UART_SCR,
28 AWA_maskb = BFIN_UART_GCTL,
29 AWA_maskb_clear = BFIN_UART_GCTL,
30 AWA_maskb_set = BFIN_UART_GCTL,
31 AWA_maskb_toggle = BFIN_UART_GCTL,
32 AWA_dir = SPORT1_STAT,
33 AWA_polar = SPORT1_STAT,
34 AWA_edge = SPORT1_STAT,
35 AWA_both = SPORT1_STAT,
36 #if ANOMALY_05000311
37 AWA_inen = TIMER_ENABLE,
38 #elif ANOMALY_05000323
39 AWA_inen = DMA1_1_CONFIG,
40 #endif
41 };
42 /* Anomaly Workaround */
43 #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
44 #else
45 #define AWA_DUMMY_READ(...) do { } while (0)
46 #endif
47
48 static struct gpio_port_t * const gpio_array[] = {
49 #if defined(BF533_FAMILY) || defined(BF538_FAMILY)
50 (struct gpio_port_t *) FIO_FLAG_D,
51 #elif defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
52 (struct gpio_port_t *) PORTFIO,
53 (struct gpio_port_t *) PORTGIO,
54 (struct gpio_port_t *) PORTHIO,
55 #elif defined(BF561_FAMILY)
56 (struct gpio_port_t *) FIO0_FLAG_D,
57 (struct gpio_port_t *) FIO1_FLAG_D,
58 (struct gpio_port_t *) FIO2_FLAG_D,
59 #elif defined(CONFIG_BF54x)
60 (struct gpio_port_t *)PORTA_FER,
61 (struct gpio_port_t *)PORTB_FER,
62 (struct gpio_port_t *)PORTC_FER,
63 (struct gpio_port_t *)PORTD_FER,
64 (struct gpio_port_t *)PORTE_FER,
65 (struct gpio_port_t *)PORTF_FER,
66 (struct gpio_port_t *)PORTG_FER,
67 (struct gpio_port_t *)PORTH_FER,
68 (struct gpio_port_t *)PORTI_FER,
69 (struct gpio_port_t *)PORTJ_FER,
70 #else
71 # error no gpio arrays defined
72 #endif
73 };
74
75 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
76 static unsigned short * const port_fer[] = {
77 (unsigned short *) PORTF_FER,
78 (unsigned short *) PORTG_FER,
79 (unsigned short *) PORTH_FER,
80 };
81
82 # if !defined(BF537_FAMILY)
83 static unsigned short * const port_mux[] = {
84 (unsigned short *) PORTF_MUX,
85 (unsigned short *) PORTG_MUX,
86 (unsigned short *) PORTH_MUX,
87 };
88
89 static const
90 u8 pmux_offset[][16] = {
91 # if defined(CONFIG_BF52x)
92 { 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
93 { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
94 { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
95 # elif defined(CONFIG_BF51x)
96 { 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 }, /* PORTF */
97 { 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 }, /* PORTG */
98 { 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 }, /* PORTH */
99 # endif
100 };
101 # endif
102
103 #endif
104
105 static unsigned short reserved_gpio_map[GPIO_BANK_NUM];
106 static unsigned short reserved_peri_map[gpio_bank(MAX_RESOURCES)];
107 static unsigned short reserved_gpio_irq_map[GPIO_BANK_NUM];
108
109 #define RESOURCE_LABEL_SIZE 16
110
111 static struct str_ident {
112 char name[RESOURCE_LABEL_SIZE];
113 } str_ident[MAX_RESOURCES];
114
115 #if defined(CONFIG_PM)
116 static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
117 #endif
118
119 inline int check_gpio(unsigned gpio)
120 {
121 #if defined(CONFIG_BF54x)
122 if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
123 || gpio == GPIO_PH14 || gpio == GPIO_PH15
124 || gpio == GPIO_PJ14 || gpio == GPIO_PJ15)
125 return -EINVAL;
126 #endif
127 if (gpio >= MAX_BLACKFIN_GPIOS)
128 return -EINVAL;
129 return 0;
130 }
131
132 static void gpio_error(unsigned gpio)
133 {
134 printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio);
135 }
136
137 static void set_label(unsigned short ident, const char *label)
138 {
139 if (label) {
140 strncpy(str_ident[ident].name, label,
141 RESOURCE_LABEL_SIZE);
142 str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
143 }
144 }
145
146 static char *get_label(unsigned short ident)
147 {
148 return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
149 }
150
151 static int cmp_label(unsigned short ident, const char *label)
152 {
153 if (label == NULL) {
154 dump_stack();
155 printk(KERN_ERR "Please provide none-null label\n");
156 }
157
158 if (label)
159 return strcmp(str_ident[ident].name, label);
160 else
161 return -EINVAL;
162 }
163
164 static void port_setup(unsigned gpio, unsigned short usage)
165 {
166 if (check_gpio(gpio))
167 return;
168
169 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
170 if (usage == GPIO_USAGE)
171 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
172 else
173 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
174 SSYNC();
175 #elif defined(CONFIG_BF54x)
176 if (usage == GPIO_USAGE)
177 gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
178 else
179 gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
180 SSYNC();
181 #endif
182 }
183
184 #ifdef BF537_FAMILY
185 static struct {
186 unsigned short res;
187 unsigned short offset;
188 } port_mux_lut[] = {
189 {.res = P_PPI0_D13, .offset = 11},
190 {.res = P_PPI0_D14, .offset = 11},
191 {.res = P_PPI0_D15, .offset = 11},
192 {.res = P_SPORT1_TFS, .offset = 11},
193 {.res = P_SPORT1_TSCLK, .offset = 11},
194 {.res = P_SPORT1_DTPRI, .offset = 11},
195 {.res = P_PPI0_D10, .offset = 10},
196 {.res = P_PPI0_D11, .offset = 10},
197 {.res = P_PPI0_D12, .offset = 10},
198 {.res = P_SPORT1_RSCLK, .offset = 10},
199 {.res = P_SPORT1_RFS, .offset = 10},
200 {.res = P_SPORT1_DRPRI, .offset = 10},
201 {.res = P_PPI0_D8, .offset = 9},
202 {.res = P_PPI0_D9, .offset = 9},
203 {.res = P_SPORT1_DRSEC, .offset = 9},
204 {.res = P_SPORT1_DTSEC, .offset = 9},
205 {.res = P_TMR2, .offset = 8},
206 {.res = P_PPI0_FS3, .offset = 8},
207 {.res = P_TMR3, .offset = 7},
208 {.res = P_SPI0_SSEL4, .offset = 7},
209 {.res = P_TMR4, .offset = 6},
210 {.res = P_SPI0_SSEL5, .offset = 6},
211 {.res = P_TMR5, .offset = 5},
212 {.res = P_SPI0_SSEL6, .offset = 5},
213 {.res = P_UART1_RX, .offset = 4},
214 {.res = P_UART1_TX, .offset = 4},
215 {.res = P_TMR6, .offset = 4},
216 {.res = P_TMR7, .offset = 4},
217 {.res = P_UART0_RX, .offset = 3},
218 {.res = P_UART0_TX, .offset = 3},
219 {.res = P_DMAR0, .offset = 3},
220 {.res = P_DMAR1, .offset = 3},
221 {.res = P_SPORT0_DTSEC, .offset = 1},
222 {.res = P_SPORT0_DRSEC, .offset = 1},
223 {.res = P_CAN0_RX, .offset = 1},
224 {.res = P_CAN0_TX, .offset = 1},
225 {.res = P_SPI0_SSEL7, .offset = 1},
226 {.res = P_SPORT0_TFS, .offset = 0},
227 {.res = P_SPORT0_DTPRI, .offset = 0},
228 {.res = P_SPI0_SSEL2, .offset = 0},
229 {.res = P_SPI0_SSEL3, .offset = 0},
230 };
231
232 static void portmux_setup(unsigned short per)
233 {
234 u16 y, offset, muxreg;
235 u16 function = P_FUNCT2MUX(per);
236
237 for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
238 if (port_mux_lut[y].res == per) {
239
240 /* SET PORTMUX REG */
241
242 offset = port_mux_lut[y].offset;
243 muxreg = bfin_read_PORT_MUX();
244
245 if (offset != 1)
246 muxreg &= ~(1 << offset);
247 else
248 muxreg &= ~(3 << 1);
249
250 muxreg |= (function << offset);
251 bfin_write_PORT_MUX(muxreg);
252 }
253 }
254 }
255 #elif defined(CONFIG_BF54x)
256 inline void portmux_setup(unsigned short per)
257 {
258 u32 pmux;
259 u16 ident = P_IDENT(per);
260 u16 function = P_FUNCT2MUX(per);
261
262 pmux = gpio_array[gpio_bank(ident)]->port_mux;
263
264 pmux &= ~(0x3 << (2 * gpio_sub_n(ident)));
265 pmux |= (function & 0x3) << (2 * gpio_sub_n(ident));
266
267 gpio_array[gpio_bank(ident)]->port_mux = pmux;
268 }
269
270 inline u16 get_portmux(unsigned short per)
271 {
272 u32 pmux;
273 u16 ident = P_IDENT(per);
274
275 pmux = gpio_array[gpio_bank(ident)]->port_mux;
276
277 return (pmux >> (2 * gpio_sub_n(ident)) & 0x3);
278 }
279 #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
280 inline void portmux_setup(unsigned short per)
281 {
282 u16 pmux, ident = P_IDENT(per), function = P_FUNCT2MUX(per);
283 u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
284
285 pmux = *port_mux[gpio_bank(ident)];
286 pmux &= ~(3 << offset);
287 pmux |= (function & 3) << offset;
288 *port_mux[gpio_bank(ident)] = pmux;
289 SSYNC();
290 }
291 #else
292 # define portmux_setup(...) do { } while (0)
293 #endif
294
295 #ifndef CONFIG_BF54x
296 /***********************************************************
297 *
298 * FUNCTIONS: Blackfin General Purpose Ports Access Functions
299 *
300 * INPUTS/OUTPUTS:
301 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
302 *
303 *
304 * DESCRIPTION: These functions abstract direct register access
305 * to Blackfin processor General Purpose
306 * Ports Regsiters
307 *
308 * CAUTION: These functions do not belong to the GPIO Driver API
309 *************************************************************
310 * MODIFICATION HISTORY :
311 **************************************************************/
312
313 /* Set a specific bit */
314
315 #define SET_GPIO(name) \
316 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
317 { \
318 unsigned long flags; \
319 local_irq_save_hw(flags); \
320 if (arg) \
321 gpio_array[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
322 else \
323 gpio_array[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
324 AWA_DUMMY_READ(name); \
325 local_irq_restore_hw(flags); \
326 } \
327 EXPORT_SYMBOL(set_gpio_ ## name);
328
329 SET_GPIO(dir) /* set_gpio_dir() */
330 SET_GPIO(inen) /* set_gpio_inen() */
331 SET_GPIO(polar) /* set_gpio_polar() */
332 SET_GPIO(edge) /* set_gpio_edge() */
333 SET_GPIO(both) /* set_gpio_both() */
334
335
336 #define SET_GPIO_SC(name) \
337 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
338 { \
339 unsigned long flags; \
340 if (ANOMALY_05000311 || ANOMALY_05000323) \
341 local_irq_save_hw(flags); \
342 if (arg) \
343 gpio_array[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
344 else \
345 gpio_array[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
346 if (ANOMALY_05000311 || ANOMALY_05000323) { \
347 AWA_DUMMY_READ(name); \
348 local_irq_restore_hw(flags); \
349 } \
350 } \
351 EXPORT_SYMBOL(set_gpio_ ## name);
352
353 SET_GPIO_SC(maska)
354 SET_GPIO_SC(maskb)
355 SET_GPIO_SC(data)
356
357 void set_gpio_toggle(unsigned gpio)
358 {
359 unsigned long flags;
360 if (ANOMALY_05000311 || ANOMALY_05000323)
361 local_irq_save_hw(flags);
362 gpio_array[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
363 if (ANOMALY_05000311 || ANOMALY_05000323) {
364 AWA_DUMMY_READ(toggle);
365 local_irq_restore_hw(flags);
366 }
367 }
368 EXPORT_SYMBOL(set_gpio_toggle);
369
370
371 /*Set current PORT date (16-bit word)*/
372
373 #define SET_GPIO_P(name) \
374 void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
375 { \
376 unsigned long flags; \
377 if (ANOMALY_05000311 || ANOMALY_05000323) \
378 local_irq_save_hw(flags); \
379 gpio_array[gpio_bank(gpio)]->name = arg; \
380 if (ANOMALY_05000311 || ANOMALY_05000323) { \
381 AWA_DUMMY_READ(name); \
382 local_irq_restore_hw(flags); \
383 } \
384 } \
385 EXPORT_SYMBOL(set_gpiop_ ## name);
386
387 SET_GPIO_P(data)
388 SET_GPIO_P(dir)
389 SET_GPIO_P(inen)
390 SET_GPIO_P(polar)
391 SET_GPIO_P(edge)
392 SET_GPIO_P(both)
393 SET_GPIO_P(maska)
394 SET_GPIO_P(maskb)
395
396 /* Get a specific bit */
397 #define GET_GPIO(name) \
398 unsigned short get_gpio_ ## name(unsigned gpio) \
399 { \
400 unsigned long flags; \
401 unsigned short ret; \
402 if (ANOMALY_05000311 || ANOMALY_05000323) \
403 local_irq_save_hw(flags); \
404 ret = 0x01 & (gpio_array[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
405 if (ANOMALY_05000311 || ANOMALY_05000323) { \
406 AWA_DUMMY_READ(name); \
407 local_irq_restore_hw(flags); \
408 } \
409 return ret; \
410 } \
411 EXPORT_SYMBOL(get_gpio_ ## name);
412
413 GET_GPIO(data)
414 GET_GPIO(dir)
415 GET_GPIO(inen)
416 GET_GPIO(polar)
417 GET_GPIO(edge)
418 GET_GPIO(both)
419 GET_GPIO(maska)
420 GET_GPIO(maskb)
421
422 /*Get current PORT date (16-bit word)*/
423
424 #define GET_GPIO_P(name) \
425 unsigned short get_gpiop_ ## name(unsigned gpio) \
426 { \
427 unsigned long flags; \
428 unsigned short ret; \
429 if (ANOMALY_05000311 || ANOMALY_05000323) \
430 local_irq_save_hw(flags); \
431 ret = (gpio_array[gpio_bank(gpio)]->name); \
432 if (ANOMALY_05000311 || ANOMALY_05000323) { \
433 AWA_DUMMY_READ(name); \
434 local_irq_restore_hw(flags); \
435 } \
436 return ret; \
437 } \
438 EXPORT_SYMBOL(get_gpiop_ ## name);
439
440 GET_GPIO_P(data)
441 GET_GPIO_P(dir)
442 GET_GPIO_P(inen)
443 GET_GPIO_P(polar)
444 GET_GPIO_P(edge)
445 GET_GPIO_P(both)
446 GET_GPIO_P(maska)
447 GET_GPIO_P(maskb)
448
449
450 #ifdef CONFIG_PM
451
452 static unsigned short wakeup_map[GPIO_BANK_NUM];
453 static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
454
455 static const unsigned int sic_iwr_irqs[] = {
456 #if defined(BF533_FAMILY)
457 IRQ_PROG_INTB
458 #elif defined(BF537_FAMILY)
459 IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX
460 #elif defined(BF538_FAMILY)
461 IRQ_PORTF_INTB
462 #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
463 IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB
464 #elif defined(BF561_FAMILY)
465 IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB
466 #else
467 # error no SIC_IWR defined
468 #endif
469 };
470
471 /***********************************************************
472 *
473 * FUNCTIONS: Blackfin PM Setup API
474 *
475 * INPUTS/OUTPUTS:
476 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
477 * type -
478 * PM_WAKE_RISING
479 * PM_WAKE_FALLING
480 * PM_WAKE_HIGH
481 * PM_WAKE_LOW
482 * PM_WAKE_BOTH_EDGES
483 *
484 * DESCRIPTION: Blackfin PM Driver API
485 *
486 * CAUTION:
487 *************************************************************
488 * MODIFICATION HISTORY :
489 **************************************************************/
490 int gpio_pm_wakeup_request(unsigned gpio, unsigned char type)
491 {
492 unsigned long flags;
493
494 if ((check_gpio(gpio) < 0) || !type)
495 return -EINVAL;
496
497 local_irq_save_hw(flags);
498 wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
499 wakeup_flags_map[gpio] = type;
500 local_irq_restore_hw(flags);
501
502 return 0;
503 }
504 EXPORT_SYMBOL(gpio_pm_wakeup_request);
505
506 void gpio_pm_wakeup_free(unsigned gpio)
507 {
508 unsigned long flags;
509
510 if (check_gpio(gpio) < 0)
511 return;
512
513 local_irq_save_hw(flags);
514
515 wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
516
517 local_irq_restore_hw(flags);
518 }
519 EXPORT_SYMBOL(gpio_pm_wakeup_free);
520
521 static int bfin_gpio_wakeup_type(unsigned gpio, unsigned char type)
522 {
523 port_setup(gpio, GPIO_USAGE);
524 set_gpio_dir(gpio, 0);
525 set_gpio_inen(gpio, 1);
526
527 if (type & (PM_WAKE_RISING | PM_WAKE_FALLING))
528 set_gpio_edge(gpio, 1);
529 else
530 set_gpio_edge(gpio, 0);
531
532 if ((type & (PM_WAKE_BOTH_EDGES)) == (PM_WAKE_BOTH_EDGES))
533 set_gpio_both(gpio, 1);
534 else
535 set_gpio_both(gpio, 0);
536
537 if ((type & (PM_WAKE_FALLING | PM_WAKE_LOW)))
538 set_gpio_polar(gpio, 1);
539 else
540 set_gpio_polar(gpio, 0);
541
542 SSYNC();
543
544 return 0;
545 }
546
547 u32 bfin_pm_standby_setup(void)
548 {
549 u16 bank, mask, i, gpio;
550
551 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
552 mask = wakeup_map[gpio_bank(i)];
553 bank = gpio_bank(i);
554
555 gpio_bank_saved[bank].maskb = gpio_array[bank]->maskb;
556 gpio_array[bank]->maskb = 0;
557
558 if (mask) {
559 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
560 gpio_bank_saved[bank].fer = *port_fer[bank];
561 #endif
562 gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
563 gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
564 gpio_bank_saved[bank].dir = gpio_array[bank]->dir;
565 gpio_bank_saved[bank].edge = gpio_array[bank]->edge;
566 gpio_bank_saved[bank].both = gpio_array[bank]->both;
567 gpio_bank_saved[bank].reserved =
568 reserved_gpio_map[bank];
569
570 gpio = i;
571
572 while (mask) {
573 if ((mask & 1) && (wakeup_flags_map[gpio] !=
574 PM_WAKE_IGNORE)) {
575 reserved_gpio_map[gpio_bank(gpio)] |=
576 gpio_bit(gpio);
577 bfin_gpio_wakeup_type(gpio,
578 wakeup_flags_map[gpio]);
579 set_gpio_data(gpio, 0); /*Clear*/
580 }
581 gpio++;
582 mask >>= 1;
583 }
584
585 bfin_internal_set_wake(sic_iwr_irqs[bank], 1);
586 gpio_array[bank]->maskb_set = wakeup_map[gpio_bank(i)];
587 }
588 }
589
590 AWA_DUMMY_READ(maskb_set);
591
592 return 0;
593 }
594
595 void bfin_pm_standby_restore(void)
596 {
597 u16 bank, mask, i;
598
599 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
600 mask = wakeup_map[gpio_bank(i)];
601 bank = gpio_bank(i);
602
603 if (mask) {
604 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
605 *port_fer[bank] = gpio_bank_saved[bank].fer;
606 #endif
607 gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
608 gpio_array[bank]->dir = gpio_bank_saved[bank].dir;
609 gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
610 gpio_array[bank]->edge = gpio_bank_saved[bank].edge;
611 gpio_array[bank]->both = gpio_bank_saved[bank].both;
612
613 reserved_gpio_map[bank] =
614 gpio_bank_saved[bank].reserved;
615 bfin_internal_set_wake(sic_iwr_irqs[bank], 0);
616 }
617
618 gpio_array[bank]->maskb = gpio_bank_saved[bank].maskb;
619 }
620 AWA_DUMMY_READ(maskb);
621 }
622
623 void bfin_gpio_pm_hibernate_suspend(void)
624 {
625 int i, bank;
626
627 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
628 bank = gpio_bank(i);
629
630 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
631 gpio_bank_saved[bank].fer = *port_fer[bank];
632 #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
633 gpio_bank_saved[bank].mux = *port_mux[bank];
634 #else
635 if (bank == 0)
636 gpio_bank_saved[bank].mux = bfin_read_PORT_MUX();
637 #endif
638 #endif
639 gpio_bank_saved[bank].data = gpio_array[bank]->data;
640 gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
641 gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
642 gpio_bank_saved[bank].dir = gpio_array[bank]->dir;
643 gpio_bank_saved[bank].edge = gpio_array[bank]->edge;
644 gpio_bank_saved[bank].both = gpio_array[bank]->both;
645 gpio_bank_saved[bank].maska = gpio_array[bank]->maska;
646 }
647
648 AWA_DUMMY_READ(maska);
649 }
650
651 void bfin_gpio_pm_hibernate_restore(void)
652 {
653 int i, bank;
654
655 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
656 bank = gpio_bank(i);
657
658 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
659 #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
660 *port_mux[bank] = gpio_bank_saved[bank].mux;
661 #else
662 if (bank == 0)
663 bfin_write_PORT_MUX(gpio_bank_saved[bank].mux);
664 #endif
665 *port_fer[bank] = gpio_bank_saved[bank].fer;
666 #endif
667 gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
668 gpio_array[bank]->data_set = gpio_bank_saved[bank].data
669 & gpio_bank_saved[bank].dir;
670 gpio_array[bank]->dir = gpio_bank_saved[bank].dir;
671 gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
672 gpio_array[bank]->edge = gpio_bank_saved[bank].edge;
673 gpio_array[bank]->both = gpio_bank_saved[bank].both;
674 gpio_array[bank]->maska = gpio_bank_saved[bank].maska;
675 }
676 AWA_DUMMY_READ(maska);
677 }
678
679
680 #endif
681 #else /* CONFIG_BF54x */
682 #ifdef CONFIG_PM
683
684 u32 bfin_pm_standby_setup(void)
685 {
686 return 0;
687 }
688
689 void bfin_pm_standby_restore(void)
690 {
691
692 }
693
694 void bfin_gpio_pm_hibernate_suspend(void)
695 {
696 int i, bank;
697
698 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
699 bank = gpio_bank(i);
700
701 gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer;
702 gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux;
703 gpio_bank_saved[bank].data = gpio_array[bank]->data;
704 gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
705 gpio_bank_saved[bank].dir = gpio_array[bank]->dir_set;
706 }
707 }
708
709 void bfin_gpio_pm_hibernate_restore(void)
710 {
711 int i, bank;
712
713 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
714 bank = gpio_bank(i);
715
716 gpio_array[bank]->port_mux = gpio_bank_saved[bank].mux;
717 gpio_array[bank]->port_fer = gpio_bank_saved[bank].fer;
718 gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
719 gpio_array[bank]->dir_set = gpio_bank_saved[bank].dir;
720 gpio_array[bank]->data_set = gpio_bank_saved[bank].data
721 | gpio_bank_saved[bank].dir;
722 }
723 }
724 #endif
725
726 unsigned short get_gpio_dir(unsigned gpio)
727 {
728 return (0x01 & (gpio_array[gpio_bank(gpio)]->dir_clear >> gpio_sub_n(gpio)));
729 }
730 EXPORT_SYMBOL(get_gpio_dir);
731
732 #endif /* CONFIG_BF54x */
733
734 /***********************************************************
735 *
736 * FUNCTIONS: Blackfin Peripheral Resource Allocation
737 * and PortMux Setup
738 *
739 * INPUTS/OUTPUTS:
740 * per Peripheral Identifier
741 * label String
742 *
743 * DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
744 *
745 * CAUTION:
746 *************************************************************
747 * MODIFICATION HISTORY :
748 **************************************************************/
749
750 int peripheral_request(unsigned short per, const char *label)
751 {
752 unsigned long flags;
753 unsigned short ident = P_IDENT(per);
754
755 /*
756 * Don't cares are pins with only one dedicated function
757 */
758
759 if (per & P_DONTCARE)
760 return 0;
761
762 if (!(per & P_DEFINED))
763 return -ENODEV;
764
765 local_irq_save_hw(flags);
766
767 /* If a pin can be muxed as either GPIO or peripheral, make
768 * sure it is not already a GPIO pin when we request it.
769 */
770 if (unlikely(!check_gpio(ident) &&
771 reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
772 if (system_state == SYSTEM_BOOTING)
773 dump_stack();
774 printk(KERN_ERR
775 "%s: Peripheral %d is already reserved as GPIO by %s !\n",
776 __func__, ident, get_label(ident));
777 local_irq_restore_hw(flags);
778 return -EBUSY;
779 }
780
781 if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
782
783 /*
784 * Pin functions like AMC address strobes my
785 * be requested and used by several drivers
786 */
787
788 #ifdef CONFIG_BF54x
789 if (!((per & P_MAYSHARE) && get_portmux(per) == P_FUNCT2MUX(per))) {
790 #else
791 if (!(per & P_MAYSHARE)) {
792 #endif
793 /*
794 * Allow that the identical pin function can
795 * be requested from the same driver twice
796 */
797
798 if (cmp_label(ident, label) == 0)
799 goto anyway;
800
801 if (system_state == SYSTEM_BOOTING)
802 dump_stack();
803 printk(KERN_ERR
804 "%s: Peripheral %d function %d is already reserved by %s !\n",
805 __func__, ident, P_FUNCT2MUX(per), get_label(ident));
806 local_irq_restore_hw(flags);
807 return -EBUSY;
808 }
809 }
810
811 anyway:
812 reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
813
814 portmux_setup(per);
815 port_setup(ident, PERIPHERAL_USAGE);
816
817 local_irq_restore_hw(flags);
818 set_label(ident, label);
819
820 return 0;
821 }
822 EXPORT_SYMBOL(peripheral_request);
823
824 int peripheral_request_list(const unsigned short per[], const char *label)
825 {
826 u16 cnt;
827 int ret;
828
829 for (cnt = 0; per[cnt] != 0; cnt++) {
830
831 ret = peripheral_request(per[cnt], label);
832
833 if (ret < 0) {
834 for ( ; cnt > 0; cnt--)
835 peripheral_free(per[cnt - 1]);
836
837 return ret;
838 }
839 }
840
841 return 0;
842 }
843 EXPORT_SYMBOL(peripheral_request_list);
844
845 void peripheral_free(unsigned short per)
846 {
847 unsigned long flags;
848 unsigned short ident = P_IDENT(per);
849
850 if (per & P_DONTCARE)
851 return;
852
853 if (!(per & P_DEFINED))
854 return;
855
856 local_irq_save_hw(flags);
857
858 if (unlikely(!(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident)))) {
859 local_irq_restore_hw(flags);
860 return;
861 }
862
863 if (!(per & P_MAYSHARE))
864 port_setup(ident, GPIO_USAGE);
865
866 reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
867
868 set_label(ident, "free");
869
870 local_irq_restore_hw(flags);
871 }
872 EXPORT_SYMBOL(peripheral_free);
873
874 void peripheral_free_list(const unsigned short per[])
875 {
876 u16 cnt;
877 for (cnt = 0; per[cnt] != 0; cnt++)
878 peripheral_free(per[cnt]);
879 }
880 EXPORT_SYMBOL(peripheral_free_list);
881
882 /***********************************************************
883 *
884 * FUNCTIONS: Blackfin GPIO Driver
885 *
886 * INPUTS/OUTPUTS:
887 * gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS
888 * label String
889 *
890 * DESCRIPTION: Blackfin GPIO Driver API
891 *
892 * CAUTION:
893 *************************************************************
894 * MODIFICATION HISTORY :
895 **************************************************************/
896
897 int bfin_gpio_request(unsigned gpio, const char *label)
898 {
899 unsigned long flags;
900
901 if (check_gpio(gpio) < 0)
902 return -EINVAL;
903
904 local_irq_save_hw(flags);
905
906 /*
907 * Allow that the identical GPIO can
908 * be requested from the same driver twice
909 * Do nothing and return -
910 */
911
912 if (cmp_label(gpio, label) == 0) {
913 local_irq_restore_hw(flags);
914 return 0;
915 }
916
917 if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
918 if (system_state == SYSTEM_BOOTING)
919 dump_stack();
920 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
921 gpio, get_label(gpio));
922 local_irq_restore_hw(flags);
923 return -EBUSY;
924 }
925 if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
926 if (system_state == SYSTEM_BOOTING)
927 dump_stack();
928 printk(KERN_ERR
929 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
930 gpio, get_label(gpio));
931 local_irq_restore_hw(flags);
932 return -EBUSY;
933 }
934 if (unlikely(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
935 printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!"
936 " (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio);
937 }
938 #ifndef CONFIG_BF54x
939 else { /* Reset POLAR setting when acquiring a gpio for the first time */
940 set_gpio_polar(gpio, 0);
941 }
942 #endif
943
944 reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
945 set_label(gpio, label);
946
947 local_irq_restore_hw(flags);
948
949 port_setup(gpio, GPIO_USAGE);
950
951 return 0;
952 }
953 EXPORT_SYMBOL(bfin_gpio_request);
954
955 void bfin_gpio_free(unsigned gpio)
956 {
957 unsigned long flags;
958
959 if (check_gpio(gpio) < 0)
960 return;
961
962 might_sleep();
963
964 local_irq_save_hw(flags);
965
966 if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
967 if (system_state == SYSTEM_BOOTING)
968 dump_stack();
969 gpio_error(gpio);
970 local_irq_restore_hw(flags);
971 return;
972 }
973
974 reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
975
976 set_label(gpio, "free");
977
978 local_irq_restore_hw(flags);
979 }
980 EXPORT_SYMBOL(bfin_gpio_free);
981
982 int bfin_gpio_irq_request(unsigned gpio, const char *label)
983 {
984 unsigned long flags;
985
986 if (check_gpio(gpio) < 0)
987 return -EINVAL;
988
989 local_irq_save_hw(flags);
990
991 if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
992 if (system_state == SYSTEM_BOOTING)
993 dump_stack();
994 printk(KERN_ERR
995 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
996 gpio, get_label(gpio));
997 local_irq_restore_hw(flags);
998 return -EBUSY;
999 }
1000 if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))
1001 printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved by %s! "
1002 "(Documentation/blackfin/bfin-gpio-notes.txt)\n",
1003 gpio, get_label(gpio));
1004
1005 reserved_gpio_irq_map[gpio_bank(gpio)] |= gpio_bit(gpio);
1006 set_label(gpio, label);
1007
1008 local_irq_restore_hw(flags);
1009
1010 port_setup(gpio, GPIO_USAGE);
1011
1012 return 0;
1013 }
1014
1015 void bfin_gpio_irq_free(unsigned gpio)
1016 {
1017 unsigned long flags;
1018
1019 if (check_gpio(gpio) < 0)
1020 return;
1021
1022 local_irq_save_hw(flags);
1023
1024 if (unlikely(!(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
1025 if (system_state == SYSTEM_BOOTING)
1026 dump_stack();
1027 gpio_error(gpio);
1028 local_irq_restore_hw(flags);
1029 return;
1030 }
1031
1032 reserved_gpio_irq_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
1033
1034 set_label(gpio, "free");
1035
1036 local_irq_restore_hw(flags);
1037 }
1038
1039 static inline void __bfin_gpio_direction_input(unsigned gpio)
1040 {
1041 #ifdef CONFIG_BF54x
1042 gpio_array[gpio_bank(gpio)]->dir_clear = gpio_bit(gpio);
1043 #else
1044 gpio_array[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
1045 #endif
1046 gpio_array[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
1047 }
1048
1049 int bfin_gpio_direction_input(unsigned gpio)
1050 {
1051 unsigned long flags;
1052
1053 if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1054 gpio_error(gpio);
1055 return -EINVAL;
1056 }
1057
1058 local_irq_save_hw(flags);
1059 __bfin_gpio_direction_input(gpio);
1060 AWA_DUMMY_READ(inen);
1061 local_irq_restore_hw(flags);
1062
1063 return 0;
1064 }
1065 EXPORT_SYMBOL(bfin_gpio_direction_input);
1066
1067 void bfin_gpio_irq_prepare(unsigned gpio)
1068 {
1069 #ifdef CONFIG_BF54x
1070 unsigned long flags;
1071 #endif
1072
1073 port_setup(gpio, GPIO_USAGE);
1074
1075 #ifdef CONFIG_BF54x
1076 local_irq_save_hw(flags);
1077 __bfin_gpio_direction_input(gpio);
1078 local_irq_restore_hw(flags);
1079 #endif
1080 }
1081
1082 void bfin_gpio_set_value(unsigned gpio, int arg)
1083 {
1084 if (arg)
1085 gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1086 else
1087 gpio_array[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
1088 }
1089 EXPORT_SYMBOL(bfin_gpio_set_value);
1090
1091 int bfin_gpio_direction_output(unsigned gpio, int value)
1092 {
1093 unsigned long flags;
1094
1095 if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1096 gpio_error(gpio);
1097 return -EINVAL;
1098 }
1099
1100 local_irq_save_hw(flags);
1101
1102 gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
1103 gpio_set_value(gpio, value);
1104 #ifdef CONFIG_BF54x
1105 gpio_array[gpio_bank(gpio)]->dir_set = gpio_bit(gpio);
1106 #else
1107 gpio_array[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
1108 #endif
1109
1110 AWA_DUMMY_READ(dir);
1111 local_irq_restore_hw(flags);
1112
1113 return 0;
1114 }
1115 EXPORT_SYMBOL(bfin_gpio_direction_output);
1116
1117 int bfin_gpio_get_value(unsigned gpio)
1118 {
1119 #ifdef CONFIG_BF54x
1120 return (1 & (gpio_array[gpio_bank(gpio)]->data >> gpio_sub_n(gpio)));
1121 #else
1122 unsigned long flags;
1123
1124 if (unlikely(get_gpio_edge(gpio))) {
1125 int ret;
1126 local_irq_save_hw(flags);
1127 set_gpio_edge(gpio, 0);
1128 ret = get_gpio_data(gpio);
1129 set_gpio_edge(gpio, 1);
1130 local_irq_restore_hw(flags);
1131 return ret;
1132 } else
1133 return get_gpio_data(gpio);
1134 #endif
1135 }
1136 EXPORT_SYMBOL(bfin_gpio_get_value);
1137
1138 /* If we are booting from SPI and our board lacks a strong enough pull up,
1139 * the core can reset and execute the bootrom faster than the resistor can
1140 * pull the signal logically high. To work around this (common) error in
1141 * board design, we explicitly set the pin back to GPIO mode, force /CS
1142 * high, and wait for the electrons to do their thing.
1143 *
1144 * This function only makes sense to be called from reset code, but it
1145 * lives here as we need to force all the GPIO states w/out going through
1146 * BUG() checks and such.
1147 */
1148 void bfin_reset_boot_spi_cs(unsigned short pin)
1149 {
1150 unsigned short gpio = P_IDENT(pin);
1151 port_setup(gpio, GPIO_USAGE);
1152 gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1153 AWA_DUMMY_READ(data_set);
1154 udelay(1);
1155 }
1156
1157 #if defined(CONFIG_PROC_FS)
1158 static int gpio_proc_read(char *buf, char **start, off_t offset,
1159 int len, int *unused_i, void *unused_v)
1160 {
1161 int c, irq, gpio, outlen = 0;
1162
1163 for (c = 0; c < MAX_RESOURCES; c++) {
1164 irq = reserved_gpio_irq_map[gpio_bank(c)] & gpio_bit(c);
1165 gpio = reserved_gpio_map[gpio_bank(c)] & gpio_bit(c);
1166 if (!check_gpio(c) && (gpio || irq))
1167 len = sprintf(buf, "GPIO_%d: \t%s%s \t\tGPIO %s\n", c,
1168 get_label(c), (gpio && irq) ? " *" : "",
1169 get_gpio_dir(c) ? "OUTPUT" : "INPUT");
1170 else if (reserved_peri_map[gpio_bank(c)] & gpio_bit(c))
1171 len = sprintf(buf, "GPIO_%d: \t%s \t\tPeripheral\n", c, get_label(c));
1172 else
1173 continue;
1174 buf += len;
1175 outlen += len;
1176 }
1177 return outlen;
1178 }
1179
1180 static __init int gpio_register_proc(void)
1181 {
1182 struct proc_dir_entry *proc_gpio;
1183
1184 proc_gpio = create_proc_entry("gpio", S_IRUGO, NULL);
1185 if (proc_gpio)
1186 proc_gpio->read_proc = gpio_proc_read;
1187 return proc_gpio != NULL;
1188 }
1189 __initcall(gpio_register_proc);
1190 #endif
1191
1192 #ifdef CONFIG_GPIOLIB
1193 int bfin_gpiolib_direction_input(struct gpio_chip *chip, unsigned gpio)
1194 {
1195 return bfin_gpio_direction_input(gpio);
1196 }
1197
1198 int bfin_gpiolib_direction_output(struct gpio_chip *chip, unsigned gpio, int level)
1199 {
1200 return bfin_gpio_direction_output(gpio, level);
1201 }
1202
1203 int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio)
1204 {
1205 return bfin_gpio_get_value(gpio);
1206 }
1207
1208 void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value)
1209 {
1210 return bfin_gpio_set_value(gpio, value);
1211 }
1212
1213 int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio)
1214 {
1215 return bfin_gpio_request(gpio, chip->label);
1216 }
1217
1218 void bfin_gpiolib_gpio_free(struct gpio_chip *chip, unsigned gpio)
1219 {
1220 return bfin_gpio_free(gpio);
1221 }
1222
1223 static struct gpio_chip bfin_chip = {
1224 .label = "Blackfin-GPIOlib",
1225 .direction_input = bfin_gpiolib_direction_input,
1226 .get = bfin_gpiolib_get_value,
1227 .direction_output = bfin_gpiolib_direction_output,
1228 .set = bfin_gpiolib_set_value,
1229 .request = bfin_gpiolib_gpio_request,
1230 .free = bfin_gpiolib_gpio_free,
1231 .base = 0,
1232 .ngpio = MAX_BLACKFIN_GPIOS,
1233 };
1234
1235 static int __init bfin_gpiolib_setup(void)
1236 {
1237 return gpiochip_add(&bfin_chip);
1238 }
1239 arch_initcall(bfin_gpiolib_setup);
1240 #endif
mm of the moment repository