arch/xtensa/include/asm/elf.h

   1 /*
   2  * include/asm-xtensa/elf.h
   3  *
   4  * ELF register definitions
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file "COPYING" in the main directory of this archive
   8  * for more details.
   9  *
  10  * Copyright (C) 2001 - 2005 Tensilica Inc.
  11  */
  12
  13 #ifndef _XTENSA_ELF_H
  14 #define _XTENSA_ELF_H
  15
  16 #include <asm/ptrace.h>
  17
  18 /* Xtensa processor ELF architecture-magic number */
  19
  20 #define EM_XTENSA       94
  21 #define EM_XTENSA_OLD   0xABC7
  22
  23 /* Xtensa relocations defined by the ABIs */
  24
  25 #define R_XTENSA_NONE           0
  26 #define R_XTENSA_32             1
  27 #define R_XTENSA_RTLD           2
  28 #define R_XTENSA_GLOB_DAT       3
  29 #define R_XTENSA_JMP_SLOT       4
  30 #define R_XTENSA_RELATIVE       5
  31 #define R_XTENSA_PLT            6
  32 #define R_XTENSA_OP0            8
  33 #define R_XTENSA_OP1            9
  34 #define R_XTENSA_OP2            10
  35 #define R_XTENSA_ASM_EXPAND     11
  36 #define R_XTENSA_ASM_SIMPLIFY   12
  37 #define R_XTENSA_GNU_VTINHERIT  15
  38 #define R_XTENSA_GNU_VTENTRY    16
  39 #define R_XTENSA_DIFF8          17
  40 #define R_XTENSA_DIFF16         18
  41 #define R_XTENSA_DIFF32         19
  42 #define R_XTENSA_SLOT0_OP       20
  43 #define R_XTENSA_SLOT1_OP       21
  44 #define R_XTENSA_SLOT2_OP       22
  45 #define R_XTENSA_SLOT3_OP       23
  46 #define R_XTENSA_SLOT4_OP       24
  47 #define R_XTENSA_SLOT5_OP       25
  48 #define R_XTENSA_SLOT6_OP       26
  49 #define R_XTENSA_SLOT7_OP       27
  50 #define R_XTENSA_SLOT8_OP       28
  51 #define R_XTENSA_SLOT9_OP       29
  52 #define R_XTENSA_SLOT10_OP      30
  53 #define R_XTENSA_SLOT11_OP      31
  54 #define R_XTENSA_SLOT12_OP      32
  55 #define R_XTENSA_SLOT13_OP      33
  56 #define R_XTENSA_SLOT14_OP      34
  57 #define R_XTENSA_SLOT0_ALT      35
  58 #define R_XTENSA_SLOT1_ALT      36
  59 #define R_XTENSA_SLOT2_ALT      37
  60 #define R_XTENSA_SLOT3_ALT      38
  61 #define R_XTENSA_SLOT4_ALT      39
  62 #define R_XTENSA_SLOT5_ALT      40
  63 #define R_XTENSA_SLOT6_ALT      41
  64 #define R_XTENSA_SLOT7_ALT      42
  65 #define R_XTENSA_SLOT8_ALT      43
  66 #define R_XTENSA_SLOT9_ALT      44
  67 #define R_XTENSA_SLOT10_ALT     45
  68 #define R_XTENSA_SLOT11_ALT     46
  69 #define R_XTENSA_SLOT12_ALT     47
  70 #define R_XTENSA_SLOT13_ALT     48
  71 #define R_XTENSA_SLOT14_ALT     49
  72
  73 /* ELF register definitions. This is needed for core dump support.  */
  74
  75 typedef unsigned long elf_greg_t;
  76
  77 typedef struct {
  78         elf_greg_t pc;
  79         elf_greg_t ps;
  80         elf_greg_t lbeg;
  81         elf_greg_t lend;
  82         elf_greg_t lcount;
  83         elf_greg_t sar;
  84         elf_greg_t windowstart;
  85         elf_greg_t windowbase;
  86         elf_greg_t reserved[8+48];
  87         elf_greg_t a[64];
  88 } xtensa_gregset_t;
  89
  90 #define ELF_NGREG       (sizeof(xtensa_gregset_t) / sizeof(elf_greg_t))
  91
  92 typedef elf_greg_t elf_gregset_t[ELF_NGREG];
  93
  94 #define ELF_NFPREG      18
  95
  96 typedef unsigned int elf_fpreg_t;
  97 typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
  98
  99 #define ELF_CORE_COPY_REGS(_eregs, _pregs)                              \
 100         xtensa_elf_core_copy_regs ((xtensa_gregset_t*)&(_eregs), _pregs);
 101
 102 extern void xtensa_elf_core_copy_regs (xtensa_gregset_t *, struct pt_regs *);
 103
 104 /*
 105  * This is used to ensure we don't load something for the wrong architecture.
 106  */
 107
 108 #define elf_check_arch(x) ( ( (x)->e_machine == EM_XTENSA )  || \
 109                             ( (x)->e_machine == EM_XTENSA_OLD ) )
 110
 111 /*
 112  * These are used to set parameters in the core dumps.
 113  */
 114
 115 #ifdef __XTENSA_EL__
 116 # define ELF_DATA       ELFDATA2LSB
 117 #elif defined(__XTENSA_EB__)
 118 # define ELF_DATA       ELFDATA2MSB
 119 #else
 120 # error processor byte order undefined!
 121 #endif
 122
 123 #define ELF_CLASS       ELFCLASS32
 124 #define ELF_ARCH        EM_XTENSA
 125
 126 #define ELF_EXEC_PAGESIZE       PAGE_SIZE
 127
 128 /*
 129  * This is the location that an ET_DYN program is loaded if exec'ed.  Typical
 130  * use of this is to invoke "./ld.so someprog" to test out a new version of
 131  * the loader.  We need to make sure that it is out of the way of the program
 132  * that it will "exec", and that there is sufficient room for the brk.
 133  */
 134
 135 #define ELF_ET_DYN_BASE         (2 * TASK_SIZE / 3)
 136
 137 /*
 138  * This yields a mask that user programs can use to figure out what
 139  * instruction set this CPU supports.  This could be done in user space,
 140  * but it's not easy, and we've already done it here.
 141  */
 142
 143 #define ELF_HWCAP       (0)
 144
 145 /*
 146  * This yields a string that ld.so will use to load implementation
 147  * specific libraries for optimization.  This is more specific in
 148  * intent than poking at uname or /proc/cpuinfo.
 149  * For the moment, we have only optimizations for the Intel generations,
 150  * but that could change...
 151  */
 152
 153 #define ELF_PLATFORM  (NULL)
 154
 155 /*
 156  * The Xtensa processor ABI says that when the program starts, a2
 157  * contains a pointer to a function which might be registered using
 158  * `atexit'.  This provides a mean for the dynamic linker to call
 159  * DT_FINI functions for shared libraries that have been loaded before
 160  * the code runs.
 161  *
 162  * A value of 0 tells we have no such handler.
 163  *
 164  * We might as well make sure everything else is cleared too (except
 165  * for the stack pointer in a1), just to make things more
 166  * deterministic.  Also, clearing a0 terminates debugger backtraces.
 167  */
 168
 169 #define ELF_PLAT_INIT(_r, load_addr) \
 170   do { _r->areg[0]=0; /*_r->areg[1]=0;*/ _r->areg[2]=0;  _r->areg[3]=0;  \
 171        _r->areg[4]=0;  _r->areg[5]=0;    _r->areg[6]=0;  _r->areg[7]=0;  \
 172        _r->areg[8]=0;  _r->areg[9]=0;    _r->areg[10]=0; _r->areg[11]=0; \
 173        _r->areg[12]=0; _r->areg[13]=0;   _r->areg[14]=0; _r->areg[15]=0; \
 174   } while (0)
 175
 176 typedef struct {
 177         xtregs_opt_t    opt;
 178         xtregs_user_t   user;
 179 #if XTENSA_HAVE_COPROCESSORS
 180         xtregs_cp0_t    cp0;
 181         xtregs_cp1_t    cp1;
 182         xtregs_cp2_t    cp2;
 183         xtregs_cp3_t    cp3;
 184         xtregs_cp4_t    cp4;
 185         xtregs_cp5_t    cp5;
 186         xtregs_cp6_t    cp6;
 187         xtregs_cp7_t    cp7;
 188 #endif
 189 } elf_xtregs_t;
 190
 191 #define SET_PERSONALITY(ex) set_personality(PER_LINUX_32BIT)
 192
 193 struct task_struct;
 194
 195 extern void do_copy_regs (xtensa_gregset_t*, struct pt_regs*,
 196                           struct task_struct*);
 197 extern void do_restore_regs (xtensa_gregset_t*, struct pt_regs*,
 198                              struct task_struct*);
 199 extern void do_save_fpregs (elf_fpregset_t*, struct pt_regs*,
 200                             struct task_struct*);
 201 extern int do_restore_fpregs (elf_fpregset_t*, struct pt_regs*,
 202                               struct task_struct*);
 203
 204 #endif  /* _XTENSA_ELF_H */