2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
5 * Copyright (C) 2006 David Brownell (convert to new framework)
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
14 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
15 * That defined the register interface now provided by all PCs, some
16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
17 * integrate an MC146818 clone in their southbridge, and boards use
18 * that instead of discrete clones like the DS12887 or M48T86. There
19 * are also clones that connect using the LPC bus.
21 * That register API is also used directly by various other drivers
22 * (notably for integrated NVRAM), infrastructure (x86 has code to
23 * bypass the RTC framework, directly reading the RTC during boot
24 * and updating minutes/seconds for systems using NTP synch) and
25 * utilities (like userspace 'hwclock', if no /dev node exists).
27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
28 * interrupts disabled, holding the global rtc_lock, to exclude those
29 * other drivers and utilities on correctly configured systems.
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/interrupt.h>
35 #include <linux/spinlock.h>
36 #include <linux/platform_device.h>
37 #include <linux/mod_devicetable.h>
38 #include <linux/log2.h>
40 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
41 #include <asm-generic/rtc.h>
44 struct rtc_device
*rtc
;
47 struct resource
*iomem
;
49 void (*wake_on
)(struct device
*);
50 void (*wake_off
)(struct device
*);
55 /* newer hardware extends the original register set */
61 /* both platform and pnp busses use negative numbers for invalid irqs */
62 #define is_valid_irq(n) ((n) > 0)
64 static const char driver_name
[] = "rtc_cmos";
66 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
67 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
68 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
70 #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
72 static inline int is_intr(u8 rtc_intr
)
74 if (!(rtc_intr
& RTC_IRQF
))
76 return rtc_intr
& RTC_IRQMASK
;
79 /*----------------------------------------------------------------*/
81 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
82 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
83 * used in a broken "legacy replacement" mode. The breakage includes
84 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
87 * When that broken mode is in use, platform glue provides a partial
88 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
89 * want to use HPET for anything except those IRQs though...
91 #ifdef CONFIG_HPET_EMULATE_RTC
95 static inline int is_hpet_enabled(void)
100 static inline int hpet_mask_rtc_irq_bit(unsigned long mask
)
105 static inline int hpet_set_rtc_irq_bit(unsigned long mask
)
111 hpet_set_alarm_time(unsigned char hrs
, unsigned char min
, unsigned char sec
)
116 static inline int hpet_set_periodic_freq(unsigned long freq
)
121 static inline int hpet_rtc_dropped_irq(void)
126 static inline int hpet_rtc_timer_init(void)
131 extern irq_handler_t hpet_rtc_interrupt
;
133 static inline int hpet_register_irq_handler(irq_handler_t handler
)
138 static inline int hpet_unregister_irq_handler(irq_handler_t handler
)
145 /*----------------------------------------------------------------*/
149 /* Most newer x86 systems have two register banks, the first used
150 * for RTC and NVRAM and the second only for NVRAM. Caller must
151 * own rtc_lock ... and we won't worry about access during NMI.
153 #define can_bank2 true
155 static inline unsigned char cmos_read_bank2(unsigned char addr
)
157 outb(addr
, RTC_PORT(2));
158 return inb(RTC_PORT(3));
161 static inline void cmos_write_bank2(unsigned char val
, unsigned char addr
)
163 outb(addr
, RTC_PORT(2));
164 outb(val
, RTC_PORT(2));
169 #define can_bank2 false
171 static inline unsigned char cmos_read_bank2(unsigned char addr
)
176 static inline void cmos_write_bank2(unsigned char val
, unsigned char addr
)
182 /*----------------------------------------------------------------*/
184 static int cmos_read_time(struct device
*dev
, struct rtc_time
*t
)
186 /* REVISIT: if the clock has a "century" register, use
187 * that instead of the heuristic in get_rtc_time().
188 * That'll make Y3K compatility (year > 2070) easy!
194 static int cmos_set_time(struct device
*dev
, struct rtc_time
*t
)
196 /* REVISIT: set the "century" register if available
198 * NOTE: this ignores the issue whereby updating the seconds
199 * takes effect exactly 500ms after we write the register.
200 * (Also queueing and other delays before we get this far.)
202 return set_rtc_time(t
);
205 static int cmos_read_alarm(struct device
*dev
, struct rtc_wkalrm
*t
)
207 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
208 unsigned char rtc_control
;
210 if (!is_valid_irq(cmos
->irq
))
213 /* Basic alarms only support hour, minute, and seconds fields.
214 * Some also support day and month, for alarms up to a year in
217 t
->time
.tm_mday
= -1;
220 spin_lock_irq(&rtc_lock
);
221 t
->time
.tm_sec
= CMOS_READ(RTC_SECONDS_ALARM
);
222 t
->time
.tm_min
= CMOS_READ(RTC_MINUTES_ALARM
);
223 t
->time
.tm_hour
= CMOS_READ(RTC_HOURS_ALARM
);
225 if (cmos
->day_alrm
) {
226 /* ignore upper bits on readback per ACPI spec */
227 t
->time
.tm_mday
= CMOS_READ(cmos
->day_alrm
) & 0x3f;
228 if (!t
->time
.tm_mday
)
229 t
->time
.tm_mday
= -1;
231 if (cmos
->mon_alrm
) {
232 t
->time
.tm_mon
= CMOS_READ(cmos
->mon_alrm
);
238 rtc_control
= CMOS_READ(RTC_CONTROL
);
239 spin_unlock_irq(&rtc_lock
);
241 /* REVISIT this assumes PC style usage: always BCD */
243 if (((unsigned)t
->time
.tm_sec
) < 0x60)
244 t
->time
.tm_sec
= bcd2bin(t
->time
.tm_sec
);
247 if (((unsigned)t
->time
.tm_min
) < 0x60)
248 t
->time
.tm_min
= bcd2bin(t
->time
.tm_min
);
251 if (((unsigned)t
->time
.tm_hour
) < 0x24)
252 t
->time
.tm_hour
= bcd2bin(t
->time
.tm_hour
);
254 t
->time
.tm_hour
= -1;
256 if (cmos
->day_alrm
) {
257 if (((unsigned)t
->time
.tm_mday
) <= 0x31)
258 t
->time
.tm_mday
= bcd2bin(t
->time
.tm_mday
);
260 t
->time
.tm_mday
= -1;
261 if (cmos
->mon_alrm
) {
262 if (((unsigned)t
->time
.tm_mon
) <= 0x12)
263 t
->time
.tm_mon
= bcd2bin(t
->time
.tm_mon
) - 1;
268 t
->time
.tm_year
= -1;
270 t
->enabled
= !!(rtc_control
& RTC_AIE
);
276 static void cmos_checkintr(struct cmos_rtc
*cmos
, unsigned char rtc_control
)
278 unsigned char rtc_intr
;
280 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
281 * allegedly some older rtcs need that to handle irqs properly
283 rtc_intr
= CMOS_READ(RTC_INTR_FLAGS
);
285 if (is_hpet_enabled())
288 rtc_intr
&= (rtc_control
& RTC_IRQMASK
) | RTC_IRQF
;
289 if (is_intr(rtc_intr
))
290 rtc_update_irq(cmos
->rtc
, 1, rtc_intr
);
293 static void cmos_irq_enable(struct cmos_rtc
*cmos
, unsigned char mask
)
295 unsigned char rtc_control
;
297 /* flush any pending IRQ status, notably for update irqs,
298 * before we enable new IRQs
300 rtc_control
= CMOS_READ(RTC_CONTROL
);
301 cmos_checkintr(cmos
, rtc_control
);
304 CMOS_WRITE(rtc_control
, RTC_CONTROL
);
305 hpet_set_rtc_irq_bit(mask
);
307 cmos_checkintr(cmos
, rtc_control
);
310 static void cmos_irq_disable(struct cmos_rtc
*cmos
, unsigned char mask
)
312 unsigned char rtc_control
;
314 rtc_control
= CMOS_READ(RTC_CONTROL
);
315 rtc_control
&= ~mask
;
316 CMOS_WRITE(rtc_control
, RTC_CONTROL
);
317 hpet_mask_rtc_irq_bit(mask
);
319 cmos_checkintr(cmos
, rtc_control
);
322 static int cmos_set_alarm(struct device
*dev
, struct rtc_wkalrm
*t
)
324 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
325 unsigned char mon
, mday
, hrs
, min
, sec
;
327 if (!is_valid_irq(cmos
->irq
))
330 /* REVISIT this assumes PC style usage: always BCD */
332 /* Writing 0xff means "don't care" or "match all". */
334 mon
= t
->time
.tm_mon
+ 1;
335 mon
= (mon
<= 12) ? bin2bcd(mon
) : 0xff;
337 mday
= t
->time
.tm_mday
;
338 mday
= (mday
>= 1 && mday
<= 31) ? bin2bcd(mday
) : 0xff;
340 hrs
= t
->time
.tm_hour
;
341 hrs
= (hrs
< 24) ? bin2bcd(hrs
) : 0xff;
343 min
= t
->time
.tm_min
;
344 min
= (min
< 60) ? bin2bcd(min
) : 0xff;
346 sec
= t
->time
.tm_sec
;
347 sec
= (sec
< 60) ? bin2bcd(sec
) : 0xff;
349 spin_lock_irq(&rtc_lock
);
351 /* next rtc irq must not be from previous alarm setting */
352 cmos_irq_disable(cmos
, RTC_AIE
);
355 CMOS_WRITE(hrs
, RTC_HOURS_ALARM
);
356 CMOS_WRITE(min
, RTC_MINUTES_ALARM
);
357 CMOS_WRITE(sec
, RTC_SECONDS_ALARM
);
359 /* the system may support an "enhanced" alarm */
360 if (cmos
->day_alrm
) {
361 CMOS_WRITE(mday
, cmos
->day_alrm
);
363 CMOS_WRITE(mon
, cmos
->mon_alrm
);
366 /* FIXME the HPET alarm glue currently ignores day_alrm
369 hpet_set_alarm_time(t
->time
.tm_hour
, t
->time
.tm_min
, t
->time
.tm_sec
);
372 cmos_irq_enable(cmos
, RTC_AIE
);
374 spin_unlock_irq(&rtc_lock
);
379 static int cmos_irq_set_freq(struct device
*dev
, int freq
)
381 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
385 if (!is_valid_irq(cmos
->irq
))
388 if (!is_power_of_2(freq
))
390 /* 0 = no irqs; 1 = 2^15 Hz ... 15 = 2^0 Hz */
396 spin_lock_irqsave(&rtc_lock
, flags
);
397 hpet_set_periodic_freq(freq
);
398 CMOS_WRITE(RTC_REF_CLCK_32KHZ
| f
, RTC_FREQ_SELECT
);
399 spin_unlock_irqrestore(&rtc_lock
, flags
);
404 static int cmos_irq_set_state(struct device
*dev
, int enabled
)
406 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
409 if (!is_valid_irq(cmos
->irq
))
412 spin_lock_irqsave(&rtc_lock
, flags
);
415 cmos_irq_enable(cmos
, RTC_PIE
);
417 cmos_irq_disable(cmos
, RTC_PIE
);
419 spin_unlock_irqrestore(&rtc_lock
, flags
);
423 static int cmos_alarm_irq_enable(struct device
*dev
, unsigned int enabled
)
425 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
428 if (!is_valid_irq(cmos
->irq
))
431 spin_lock_irqsave(&rtc_lock
, flags
);
434 cmos_irq_enable(cmos
, RTC_AIE
);
436 cmos_irq_disable(cmos
, RTC_AIE
);
438 spin_unlock_irqrestore(&rtc_lock
, flags
);
442 static int cmos_update_irq_enable(struct device
*dev
, unsigned int enabled
)
444 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
447 if (!is_valid_irq(cmos
->irq
))
450 spin_lock_irqsave(&rtc_lock
, flags
);
453 cmos_irq_enable(cmos
, RTC_UIE
);
455 cmos_irq_disable(cmos
, RTC_UIE
);
457 spin_unlock_irqrestore(&rtc_lock
, flags
);
461 #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
463 static int cmos_procfs(struct device
*dev
, struct seq_file
*seq
)
465 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
466 unsigned char rtc_control
, valid
;
468 spin_lock_irq(&rtc_lock
);
469 rtc_control
= CMOS_READ(RTC_CONTROL
);
470 valid
= CMOS_READ(RTC_VALID
);
471 spin_unlock_irq(&rtc_lock
);
473 /* NOTE: at least ICH6 reports battery status using a different
474 * (non-RTC) bit; and SQWE is ignored on many current systems.
476 return seq_printf(seq
,
477 "periodic_IRQ\t: %s\n"
479 "HPET_emulated\t: %s\n"
480 // "square_wave\t: %s\n"
483 "periodic_freq\t: %d\n"
484 "batt_status\t: %s\n",
485 (rtc_control
& RTC_PIE
) ? "yes" : "no",
486 (rtc_control
& RTC_UIE
) ? "yes" : "no",
487 is_hpet_enabled() ? "yes" : "no",
488 // (rtc_control & RTC_SQWE) ? "yes" : "no",
489 // (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
490 (rtc_control
& RTC_DST_EN
) ? "yes" : "no",
492 (valid
& RTC_VRT
) ? "okay" : "dead");
496 #define cmos_procfs NULL
499 static const struct rtc_class_ops cmos_rtc_ops
= {
500 .read_time
= cmos_read_time
,
501 .set_time
= cmos_set_time
,
502 .read_alarm
= cmos_read_alarm
,
503 .set_alarm
= cmos_set_alarm
,
505 .irq_set_freq
= cmos_irq_set_freq
,
506 .irq_set_state
= cmos_irq_set_state
,
507 .alarm_irq_enable
= cmos_alarm_irq_enable
,
508 .update_irq_enable
= cmos_update_irq_enable
,
511 /*----------------------------------------------------------------*/
514 * All these chips have at least 64 bytes of address space, shared by
515 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
516 * by boot firmware. Modern chips have 128 or 256 bytes.
519 #define NVRAM_OFFSET (RTC_REG_D + 1)
522 cmos_nvram_read(struct kobject
*kobj
, struct bin_attribute
*attr
,
523 char *buf
, loff_t off
, size_t count
)
527 if (unlikely(off
>= attr
->size
))
529 if (unlikely(off
< 0))
531 if ((off
+ count
) > attr
->size
)
532 count
= attr
->size
- off
;
535 spin_lock_irq(&rtc_lock
);
536 for (retval
= 0; count
; count
--, off
++, retval
++) {
538 *buf
++ = CMOS_READ(off
);
540 *buf
++ = cmos_read_bank2(off
);
544 spin_unlock_irq(&rtc_lock
);
550 cmos_nvram_write(struct kobject
*kobj
, struct bin_attribute
*attr
,
551 char *buf
, loff_t off
, size_t count
)
553 struct cmos_rtc
*cmos
;
556 cmos
= dev_get_drvdata(container_of(kobj
, struct device
, kobj
));
557 if (unlikely(off
>= attr
->size
))
559 if (unlikely(off
< 0))
561 if ((off
+ count
) > attr
->size
)
562 count
= attr
->size
- off
;
564 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
565 * checksum on part of the NVRAM data. That's currently ignored
566 * here. If userspace is smart enough to know what fields of
567 * NVRAM to update, updating checksums is also part of its job.
570 spin_lock_irq(&rtc_lock
);
571 for (retval
= 0; count
; count
--, off
++, retval
++) {
572 /* don't trash RTC registers */
573 if (off
== cmos
->day_alrm
574 || off
== cmos
->mon_alrm
575 || off
== cmos
->century
)
578 CMOS_WRITE(*buf
++, off
);
580 cmos_write_bank2(*buf
++, off
);
584 spin_unlock_irq(&rtc_lock
);
589 static struct bin_attribute nvram
= {
592 .mode
= S_IRUGO
| S_IWUSR
,
595 .read
= cmos_nvram_read
,
596 .write
= cmos_nvram_write
,
597 /* size gets set up later */
600 /*----------------------------------------------------------------*/
602 static struct cmos_rtc cmos_rtc
;
604 static irqreturn_t
cmos_interrupt(int irq
, void *p
)
609 spin_lock(&rtc_lock
);
611 /* When the HPET interrupt handler calls us, the interrupt
612 * status is passed as arg1 instead of the irq number. But
613 * always clear irq status, even when HPET is in the way.
615 * Note that HPET and RTC are almost certainly out of phase,
616 * giving different IRQ status ...
618 irqstat
= CMOS_READ(RTC_INTR_FLAGS
);
619 rtc_control
= CMOS_READ(RTC_CONTROL
);
620 if (is_hpet_enabled())
621 irqstat
= (unsigned long)irq
& 0xF0;
622 irqstat
&= (rtc_control
& RTC_IRQMASK
) | RTC_IRQF
;
624 /* All Linux RTC alarms should be treated as if they were oneshot.
625 * Similar code may be needed in system wakeup paths, in case the
626 * alarm woke the system.
628 if (irqstat
& RTC_AIE
) {
629 rtc_control
&= ~RTC_AIE
;
630 CMOS_WRITE(rtc_control
, RTC_CONTROL
);
631 hpet_mask_rtc_irq_bit(RTC_AIE
);
633 CMOS_READ(RTC_INTR_FLAGS
);
635 spin_unlock(&rtc_lock
);
637 if (is_intr(irqstat
)) {
638 rtc_update_irq(p
, 1, irqstat
);
648 #define INITSECTION __init
651 static int INITSECTION
652 cmos_do_probe(struct device
*dev
, struct resource
*ports
, int rtc_irq
)
654 struct cmos_rtc_board_info
*info
= dev
->platform_data
;
656 unsigned char rtc_control
;
657 unsigned address_space
;
659 /* there can be only one ... */
666 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
668 * REVISIT non-x86 systems may instead use memory space resources
669 * (needing ioremap etc), not i/o space resources like this ...
671 ports
= request_region(ports
->start
,
672 ports
->end
+ 1 - ports
->start
,
675 dev_dbg(dev
, "i/o registers already in use\n");
679 cmos_rtc
.irq
= rtc_irq
;
680 cmos_rtc
.iomem
= ports
;
682 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
683 * driver did, but don't reject unknown configs. Old hardware
684 * won't address 128 bytes. Newer chips have multiple banks,
685 * though they may not be listed in one I/O resource.
687 #if defined(CONFIG_ATARI)
689 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) || defined(__sparc__)
692 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
695 if (can_bank2
&& ports
->end
> (ports
->start
+ 1))
698 /* For ACPI systems extension info comes from the FADT. On others,
699 * board specific setup provides it as appropriate. Systems where
700 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
701 * some almost-clones) can provide hooks to make that behave.
703 * Note that ACPI doesn't preclude putting these registers into
704 * "extended" areas of the chip, including some that we won't yet
705 * expect CMOS_READ and friends to handle.
708 if (info
->rtc_day_alarm
&& info
->rtc_day_alarm
< 128)
709 cmos_rtc
.day_alrm
= info
->rtc_day_alarm
;
710 if (info
->rtc_mon_alarm
&& info
->rtc_mon_alarm
< 128)
711 cmos_rtc
.mon_alrm
= info
->rtc_mon_alarm
;
712 if (info
->rtc_century
&& info
->rtc_century
< 128)
713 cmos_rtc
.century
= info
->rtc_century
;
715 if (info
->wake_on
&& info
->wake_off
) {
716 cmos_rtc
.wake_on
= info
->wake_on
;
717 cmos_rtc
.wake_off
= info
->wake_off
;
721 cmos_rtc
.rtc
= rtc_device_register(driver_name
, dev
,
722 &cmos_rtc_ops
, THIS_MODULE
);
723 if (IS_ERR(cmos_rtc
.rtc
)) {
724 retval
= PTR_ERR(cmos_rtc
.rtc
);
729 dev_set_drvdata(dev
, &cmos_rtc
);
730 rename_region(ports
, dev_name(&cmos_rtc
.rtc
->dev
));
732 spin_lock_irq(&rtc_lock
);
734 /* force periodic irq to CMOS reset default of 1024Hz;
736 * REVISIT it's been reported that at least one x86_64 ALI mobo
737 * doesn't use 32KHz here ... for portability we might need to
738 * do something about other clock frequencies.
740 cmos_rtc
.rtc
->irq_freq
= 1024;
741 hpet_set_periodic_freq(cmos_rtc
.rtc
->irq_freq
);
742 CMOS_WRITE(RTC_REF_CLCK_32KHZ
| 0x06, RTC_FREQ_SELECT
);
745 cmos_irq_disable(&cmos_rtc
, RTC_PIE
| RTC_AIE
| RTC_UIE
);
747 rtc_control
= CMOS_READ(RTC_CONTROL
);
749 spin_unlock_irq(&rtc_lock
);
751 /* FIXME teach the alarm code how to handle binary mode;
752 * <asm-generic/rtc.h> doesn't know 12-hour mode either.
754 if (is_valid_irq(rtc_irq
) &&
755 (!(rtc_control
& RTC_24H
) || (rtc_control
& (RTC_DM_BINARY
)))) {
756 dev_dbg(dev
, "only 24-hr BCD mode supported\n");
761 if (is_valid_irq(rtc_irq
)) {
762 irq_handler_t rtc_cmos_int_handler
;
764 if (is_hpet_enabled()) {
767 rtc_cmos_int_handler
= hpet_rtc_interrupt
;
768 err
= hpet_register_irq_handler(cmos_interrupt
);
770 printk(KERN_WARNING
"hpet_register_irq_handler "
771 " failed in rtc_init().");
775 rtc_cmos_int_handler
= cmos_interrupt
;
777 retval
= request_irq(rtc_irq
, rtc_cmos_int_handler
,
778 IRQF_DISABLED
, dev_name(&cmos_rtc
.rtc
->dev
),
781 dev_dbg(dev
, "IRQ %d is already in use\n", rtc_irq
);
785 hpet_rtc_timer_init();
787 /* export at least the first block of NVRAM */
788 nvram
.size
= address_space
- NVRAM_OFFSET
;
789 retval
= sysfs_create_bin_file(&dev
->kobj
, &nvram
);
791 dev_dbg(dev
, "can't create nvram file? %d\n", retval
);
795 pr_info("%s: %s%s, %zd bytes nvram%s\n",
796 dev_name(&cmos_rtc
.rtc
->dev
),
797 !is_valid_irq(rtc_irq
) ? "no alarms" :
798 cmos_rtc
.mon_alrm
? "alarms up to one year" :
799 cmos_rtc
.day_alrm
? "alarms up to one month" :
800 "alarms up to one day",
801 cmos_rtc
.century
? ", y3k" : "",
803 is_hpet_enabled() ? ", hpet irqs" : "");
808 if (is_valid_irq(rtc_irq
))
809 free_irq(rtc_irq
, cmos_rtc
.rtc
);
812 rtc_device_unregister(cmos_rtc
.rtc
);
814 release_region(ports
->start
, ports
->end
+ 1 - ports
->start
);
818 static void cmos_do_shutdown(void)
820 spin_lock_irq(&rtc_lock
);
821 cmos_irq_disable(&cmos_rtc
, RTC_IRQMASK
);
822 spin_unlock_irq(&rtc_lock
);
825 static void __exit
cmos_do_remove(struct device
*dev
)
827 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
828 struct resource
*ports
;
832 sysfs_remove_bin_file(&dev
->kobj
, &nvram
);
834 if (is_valid_irq(cmos
->irq
)) {
835 free_irq(cmos
->irq
, cmos
->rtc
);
836 hpet_unregister_irq_handler(cmos_interrupt
);
839 rtc_device_unregister(cmos
->rtc
);
843 release_region(ports
->start
, ports
->end
+ 1 - ports
->start
);
847 dev_set_drvdata(dev
, NULL
);
852 static int cmos_suspend(struct device
*dev
, pm_message_t mesg
)
854 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
857 /* only the alarm might be a wakeup event source */
858 spin_lock_irq(&rtc_lock
);
859 cmos
->suspend_ctrl
= tmp
= CMOS_READ(RTC_CONTROL
);
860 if (tmp
& (RTC_PIE
|RTC_AIE
|RTC_UIE
)) {
863 if (device_may_wakeup(dev
))
864 mask
= RTC_IRQMASK
& ~RTC_AIE
;
868 CMOS_WRITE(tmp
, RTC_CONTROL
);
870 /* shut down hpet emulation - we don't need it for alarm */
871 hpet_mask_rtc_irq_bit(RTC_PIE
|RTC_AIE
|RTC_UIE
);
872 cmos_checkintr(cmos
, tmp
);
874 spin_unlock_irq(&rtc_lock
);
877 cmos
->enabled_wake
= 1;
881 enable_irq_wake(cmos
->irq
);
884 pr_debug("%s: suspend%s, ctrl %02x\n",
885 dev_name(&cmos_rtc
.rtc
->dev
),
886 (tmp
& RTC_AIE
) ? ", alarm may wake" : "",
892 /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
893 * after a detour through G3 "mechanical off", although the ACPI spec
894 * says wakeup should only work from G1/S4 "hibernate". To most users,
895 * distinctions between S4 and S5 are pointless. So when the hardware
896 * allows, don't draw that distinction.
898 static inline int cmos_poweroff(struct device
*dev
)
900 return cmos_suspend(dev
, PMSG_HIBERNATE
);
903 static int cmos_resume(struct device
*dev
)
905 struct cmos_rtc
*cmos
= dev_get_drvdata(dev
);
906 unsigned char tmp
= cmos
->suspend_ctrl
;
908 /* re-enable any irqs previously active */
909 if (tmp
& RTC_IRQMASK
) {
912 if (cmos
->enabled_wake
) {
916 disable_irq_wake(cmos
->irq
);
917 cmos
->enabled_wake
= 0;
920 spin_lock_irq(&rtc_lock
);
922 CMOS_WRITE(tmp
, RTC_CONTROL
);
923 hpet_set_rtc_irq_bit(tmp
& RTC_IRQMASK
);
925 mask
= CMOS_READ(RTC_INTR_FLAGS
);
926 mask
&= (tmp
& RTC_IRQMASK
) | RTC_IRQF
;
927 if (!is_hpet_enabled() || !is_intr(mask
))
930 /* force one-shot behavior if HPET blocked
931 * the wake alarm's irq
933 rtc_update_irq(cmos
->rtc
, 1, mask
);
935 hpet_mask_rtc_irq_bit(RTC_AIE
);
936 } while (mask
& RTC_AIE
);
937 spin_unlock_irq(&rtc_lock
);
940 pr_debug("%s: resume, ctrl %02x\n",
941 dev_name(&cmos_rtc
.rtc
->dev
),
948 #define cmos_suspend NULL
949 #define cmos_resume NULL
951 static inline int cmos_poweroff(struct device
*dev
)
958 /*----------------------------------------------------------------*/
960 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
961 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
962 * probably list them in similar PNPBIOS tables; so PNP is more common.
964 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
965 * predate even PNPBIOS should set up platform_bus devices.
970 #include <linux/acpi.h>
973 static u32
rtc_handler(void *context
)
975 acpi_clear_event(ACPI_EVENT_RTC
);
976 acpi_disable_event(ACPI_EVENT_RTC
, 0);
977 return ACPI_INTERRUPT_HANDLED
;
980 static inline void rtc_wake_setup(void)
982 acpi_install_fixed_event_handler(ACPI_EVENT_RTC
, rtc_handler
, NULL
);
984 * After the RTC handler is installed, the Fixed_RTC event should
985 * be disabled. Only when the RTC alarm is set will it be enabled.
987 acpi_clear_event(ACPI_EVENT_RTC
);
988 acpi_disable_event(ACPI_EVENT_RTC
, 0);
991 static void rtc_wake_on(struct device
*dev
)
993 acpi_clear_event(ACPI_EVENT_RTC
);
994 acpi_enable_event(ACPI_EVENT_RTC
, 0);
997 static void rtc_wake_off(struct device
*dev
)
999 acpi_disable_event(ACPI_EVENT_RTC
, 0);
1002 #define rtc_wake_setup() do{}while(0)
1003 #define rtc_wake_on NULL
1004 #define rtc_wake_off NULL
1007 /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find
1008 * its device node and pass extra config data. This helps its driver use
1009 * capabilities that the now-obsolete mc146818 didn't have, and informs it
1010 * that this board's RTC is wakeup-capable (per ACPI spec).
1012 static struct cmos_rtc_board_info acpi_rtc_info
;
1014 static void __devinit
1015 cmos_wake_setup(struct device
*dev
)
1021 acpi_rtc_info
.wake_on
= rtc_wake_on
;
1022 acpi_rtc_info
.wake_off
= rtc_wake_off
;
1024 /* workaround bug in some ACPI tables */
1025 if (acpi_gbl_FADT
.month_alarm
&& !acpi_gbl_FADT
.day_alarm
) {
1026 dev_dbg(dev
, "bogus FADT month_alarm (%d)\n",
1027 acpi_gbl_FADT
.month_alarm
);
1028 acpi_gbl_FADT
.month_alarm
= 0;
1031 acpi_rtc_info
.rtc_day_alarm
= acpi_gbl_FADT
.day_alarm
;
1032 acpi_rtc_info
.rtc_mon_alarm
= acpi_gbl_FADT
.month_alarm
;
1033 acpi_rtc_info
.rtc_century
= acpi_gbl_FADT
.century
;
1035 /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */
1036 if (acpi_gbl_FADT
.flags
& ACPI_FADT_S4_RTC_WAKE
)
1037 dev_info(dev
, "RTC can wake from S4\n");
1039 dev
->platform_data
= &acpi_rtc_info
;
1041 /* RTC always wakes from S1/S2/S3, and often S4/STD */
1042 device_init_wakeup(dev
, 1);
1047 static void __devinit
1048 cmos_wake_setup(struct device
*dev
)
1056 #include <linux/pnp.h>
1058 static int __devinit
1059 cmos_pnp_probe(struct pnp_dev
*pnp
, const struct pnp_device_id
*id
)
1061 cmos_wake_setup(&pnp
->dev
);
1063 if (pnp_port_start(pnp
,0) == 0x70 && !pnp_irq_valid(pnp
,0))
1064 /* Some machines contain a PNP entry for the RTC, but
1065 * don't define the IRQ. It should always be safe to
1066 * hardcode it in these cases
1068 return cmos_do_probe(&pnp
->dev
,
1069 pnp_get_resource(pnp
, IORESOURCE_IO
, 0), 8);
1071 return cmos_do_probe(&pnp
->dev
,
1072 pnp_get_resource(pnp
, IORESOURCE_IO
, 0),
1076 static void __exit
cmos_pnp_remove(struct pnp_dev
*pnp
)
1078 cmos_do_remove(&pnp
->dev
);
1083 static int cmos_pnp_suspend(struct pnp_dev
*pnp
, pm_message_t mesg
)
1085 return cmos_suspend(&pnp
->dev
, mesg
);
1088 static int cmos_pnp_resume(struct pnp_dev
*pnp
)
1090 return cmos_resume(&pnp
->dev
);
1094 #define cmos_pnp_suspend NULL
1095 #define cmos_pnp_resume NULL
1098 static void cmos_pnp_shutdown(struct device
*pdev
)
1100 if (system_state
== SYSTEM_POWER_OFF
&& !cmos_poweroff(pdev
))
1106 static const struct pnp_device_id rtc_ids
[] = {
1107 { .id
= "PNP0b00", },
1108 { .id
= "PNP0b01", },
1109 { .id
= "PNP0b02", },
1112 MODULE_DEVICE_TABLE(pnp
, rtc_ids
);
1114 static struct pnp_driver cmos_pnp_driver
= {
1115 .name
= (char *) driver_name
,
1116 .id_table
= rtc_ids
,
1117 .probe
= cmos_pnp_probe
,
1118 .remove
= __exit_p(cmos_pnp_remove
),
1120 /* flag ensures resume() gets called, and stops syslog spam */
1121 .flags
= PNP_DRIVER_RES_DO_NOT_CHANGE
,
1122 .suspend
= cmos_pnp_suspend
,
1123 .resume
= cmos_pnp_resume
,
1125 .name
= (char *)driver_name
,
1126 .shutdown
= cmos_pnp_shutdown
,
1130 #endif /* CONFIG_PNP */
1132 /*----------------------------------------------------------------*/
1134 /* Platform setup should have set up an RTC device, when PNP is
1135 * unavailable ... this could happen even on (older) PCs.
1138 static int __init
cmos_platform_probe(struct platform_device
*pdev
)
1140 cmos_wake_setup(&pdev
->dev
);
1141 return cmos_do_probe(&pdev
->dev
,
1142 platform_get_resource(pdev
, IORESOURCE_IO
, 0),
1143 platform_get_irq(pdev
, 0));
1146 static int __exit
cmos_platform_remove(struct platform_device
*pdev
)
1148 cmos_do_remove(&pdev
->dev
);
1152 static void cmos_platform_shutdown(struct platform_device
*pdev
)
1154 if (system_state
== SYSTEM_POWER_OFF
&& !cmos_poweroff(&pdev
->dev
))
1160 /* work with hotplug and coldplug */
1161 MODULE_ALIAS("platform:rtc_cmos");
1163 static struct platform_driver cmos_platform_driver
= {
1164 .remove
= __exit_p(cmos_platform_remove
),
1165 .shutdown
= cmos_platform_shutdown
,
1167 .name
= (char *) driver_name
,
1168 .suspend
= cmos_suspend
,
1169 .resume
= cmos_resume
,
1174 static bool pnp_driver_registered
;
1176 static bool platform_driver_registered
;
1178 static int __init
cmos_init(void)
1183 retval
= pnp_register_driver(&cmos_pnp_driver
);
1185 pnp_driver_registered
= true;
1188 if (!cmos_rtc
.dev
) {
1189 retval
= platform_driver_probe(&cmos_platform_driver
,
1190 cmos_platform_probe
);
1192 platform_driver_registered
= true;
1199 if (pnp_driver_registered
)
1200 pnp_unregister_driver(&cmos_pnp_driver
);
1204 module_init(cmos_init
);
1206 static void __exit
cmos_exit(void)
1209 if (pnp_driver_registered
)
1210 pnp_unregister_driver(&cmos_pnp_driver
);
1212 if (platform_driver_registered
)
1213 platform_driver_unregister(&cmos_platform_driver
);
1215 module_exit(cmos_exit
);
1218 MODULE_AUTHOR("David Brownell");
1219 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1220 MODULE_LICENSE("GPL");