2 * mini-x86.c: x86 backend for the Mono code generator
5 * Paolo Molaro (lupus@ximian.com)
6 * Dietmar Maurer (dietmar@ximian.com)
9 * (C) 2003 Ximian, Inc.
18 #include <mono/metadata/appdomain.h>
19 #include <mono/metadata/debug-helpers.h>
20 #include <mono/metadata/threads.h>
21 #include <mono/metadata/profiler-private.h>
22 #include <mono/metadata/mono-debug.h>
23 #include <mono/utils/mono-math.h>
24 #include <mono/utils/mono-counters.h>
25 #include <mono/utils/mono-mmap.h>
32 /* On windows, these hold the key returned by TlsAlloc () */
33 static gint lmf_tls_offset
= -1;
34 static gint lmf_addr_tls_offset
= -1;
35 static gint appdomain_tls_offset
= -1;
38 static gboolean optimize_for_xen
= TRUE
;
40 #define optimize_for_xen 0
44 static gboolean is_win32
= TRUE
;
46 static gboolean is_win32
= FALSE
;
49 /* This mutex protects architecture specific caches */
50 #define mono_mini_arch_lock() EnterCriticalSection (&mini_arch_mutex)
51 #define mono_mini_arch_unlock() LeaveCriticalSection (&mini_arch_mutex)
52 static CRITICAL_SECTION mini_arch_mutex
;
54 #define ALIGN_TO(val,align) ((((guint64)val) + ((align) - 1)) & ~((align) - 1))
59 /* Under windows, the default pinvoke calling convention is stdcall */
60 #define CALLCONV_IS_STDCALL(sig) ((((sig)->call_convention) == MONO_CALL_STDCALL) || ((sig)->pinvoke && ((sig)->call_convention) == MONO_CALL_DEFAULT))
62 #define CALLCONV_IS_STDCALL(sig) (((sig)->call_convention) == MONO_CALL_STDCALL)
66 mono_breakpoint_info
[MONO_BREAKPOINT_ARRAY_SIZE
];
69 * The code generated for sequence points reads from this location, which is
70 * made read-only when single stepping is enabled.
72 static gpointer ss_trigger_page
;
74 /* Enabled breakpoints read from this trigger page */
75 static gpointer bp_trigger_page
;
78 mono_arch_regname (int reg
)
81 case X86_EAX
: return "%eax";
82 case X86_EBX
: return "%ebx";
83 case X86_ECX
: return "%ecx";
84 case X86_EDX
: return "%edx";
85 case X86_ESP
: return "%esp";
86 case X86_EBP
: return "%ebp";
87 case X86_EDI
: return "%edi";
88 case X86_ESI
: return "%esi";
94 mono_arch_fregname (int reg
)
119 mono_arch_xregname (int reg
)
160 /* Only if storage == ArgValuetypeInReg */
161 ArgStorage pair_storage
[2];
170 gboolean need_stack_align
;
171 guint32 stack_align_amount
;
179 #define FLOAT_PARAM_REGS 0
181 static X86_Reg_No param_regs
[] = { 0 };
183 #if defined(TARGET_WIN32) || defined(__APPLE__) || defined(__FreeBSD__)
184 #define SMALL_STRUCTS_IN_REGS
185 static X86_Reg_No return_regs
[] = { X86_EAX
, X86_EDX
};
189 add_general (guint32
*gr
, guint32
*stack_size
, ArgInfo
*ainfo
)
191 ainfo
->offset
= *stack_size
;
193 if (*gr
>= PARAM_REGS
) {
194 ainfo
->storage
= ArgOnStack
;
195 (*stack_size
) += sizeof (gpointer
);
198 ainfo
->storage
= ArgInIReg
;
199 ainfo
->reg
= param_regs
[*gr
];
205 add_general_pair (guint32
*gr
, guint32
*stack_size
, ArgInfo
*ainfo
)
207 ainfo
->offset
= *stack_size
;
209 g_assert (PARAM_REGS
== 0);
211 ainfo
->storage
= ArgOnStack
;
212 (*stack_size
) += sizeof (gpointer
) * 2;
216 add_float (guint32
*gr
, guint32
*stack_size
, ArgInfo
*ainfo
, gboolean is_double
)
218 ainfo
->offset
= *stack_size
;
220 if (*gr
>= FLOAT_PARAM_REGS
) {
221 ainfo
->storage
= ArgOnStack
;
222 (*stack_size
) += is_double
? 8 : 4;
225 /* A double register */
227 ainfo
->storage
= ArgInDoubleSSEReg
;
229 ainfo
->storage
= ArgInFloatSSEReg
;
237 add_valuetype (MonoGenericSharingContext
*gsctx
, MonoMethodSignature
*sig
, ArgInfo
*ainfo
, MonoType
*type
,
239 guint32
*gr
, guint32
*fr
, guint32
*stack_size
)
244 klass
= mono_class_from_mono_type (type
);
245 size
= mini_type_stack_size_full (gsctx
, &klass
->byval_arg
, NULL
, sig
->pinvoke
);
247 #ifdef SMALL_STRUCTS_IN_REGS
248 if (sig
->pinvoke
&& is_return
) {
249 MonoMarshalType
*info
;
252 * the exact rules are not very well documented, the code below seems to work with the
253 * code generated by gcc 3.3.3 -mno-cygwin.
255 info
= mono_marshal_load_type_info (klass
);
258 ainfo
->pair_storage
[0] = ainfo
->pair_storage
[1] = ArgNone
;
260 /* Special case structs with only a float member */
261 if ((info
->native_size
== 8) && (info
->num_fields
== 1) && (info
->fields
[0].field
->type
->type
== MONO_TYPE_R8
)) {
262 ainfo
->storage
= ArgValuetypeInReg
;
263 ainfo
->pair_storage
[0] = ArgOnDoubleFpStack
;
266 if ((info
->native_size
== 4) && (info
->num_fields
== 1) && (info
->fields
[0].field
->type
->type
== MONO_TYPE_R4
)) {
267 ainfo
->storage
= ArgValuetypeInReg
;
268 ainfo
->pair_storage
[0] = ArgOnFloatFpStack
;
271 if ((info
->native_size
== 1) || (info
->native_size
== 2) || (info
->native_size
== 4) || (info
->native_size
== 8)) {
272 ainfo
->storage
= ArgValuetypeInReg
;
273 ainfo
->pair_storage
[0] = ArgInIReg
;
274 ainfo
->pair_regs
[0] = return_regs
[0];
275 if (info
->native_size
> 4) {
276 ainfo
->pair_storage
[1] = ArgInIReg
;
277 ainfo
->pair_regs
[1] = return_regs
[1];
284 ainfo
->offset
= *stack_size
;
285 ainfo
->storage
= ArgOnStack
;
286 *stack_size
+= ALIGN_TO (size
, sizeof (gpointer
));
292 * Obtain information about a call according to the calling convention.
293 * For x86 ELF, see the "System V Application Binary Interface Intel386
294 * Architecture Processor Supplment, Fourth Edition" document for more
296 * For x86 win32, see ???.
299 get_call_info_internal (MonoGenericSharingContext
*gsctx
, CallInfo
*cinfo
, MonoMethodSignature
*sig
, gboolean is_pinvoke
)
303 int n
= sig
->hasthis
+ sig
->param_count
;
304 guint32 stack_size
= 0;
311 ret_type
= mini_type_get_underlying_type (gsctx
, sig
->ret
);
312 switch (ret_type
->type
) {
313 case MONO_TYPE_BOOLEAN
:
324 case MONO_TYPE_FNPTR
:
325 case MONO_TYPE_CLASS
:
326 case MONO_TYPE_OBJECT
:
327 case MONO_TYPE_SZARRAY
:
328 case MONO_TYPE_ARRAY
:
329 case MONO_TYPE_STRING
:
330 cinfo
->ret
.storage
= ArgInIReg
;
331 cinfo
->ret
.reg
= X86_EAX
;
335 cinfo
->ret
.storage
= ArgInIReg
;
336 cinfo
->ret
.reg
= X86_EAX
;
339 cinfo
->ret
.storage
= ArgOnFloatFpStack
;
342 cinfo
->ret
.storage
= ArgOnDoubleFpStack
;
344 case MONO_TYPE_GENERICINST
:
345 if (!mono_type_generic_inst_is_valuetype (ret_type
)) {
346 cinfo
->ret
.storage
= ArgInIReg
;
347 cinfo
->ret
.reg
= X86_EAX
;
351 case MONO_TYPE_VALUETYPE
: {
352 guint32 tmp_gr
= 0, tmp_fr
= 0, tmp_stacksize
= 0;
354 add_valuetype (gsctx
, sig
, &cinfo
->ret
, sig
->ret
, TRUE
, &tmp_gr
, &tmp_fr
, &tmp_stacksize
);
355 if (cinfo
->ret
.storage
== ArgOnStack
)
356 /* The caller passes the address where the value is stored */
357 add_general (&gr
, &stack_size
, &cinfo
->ret
);
360 case MONO_TYPE_TYPEDBYREF
:
361 /* Same as a valuetype with size 24 */
362 add_general (&gr
, &stack_size
, &cinfo
->ret
);
366 cinfo
->ret
.storage
= ArgNone
;
369 g_error ("Can't handle as return value 0x%x", sig
->ret
->type
);
375 add_general (&gr
, &stack_size
, cinfo
->args
+ 0);
377 if (!sig
->pinvoke
&& (sig
->call_convention
== MONO_CALL_VARARG
) && (n
== 0)) {
379 fr
= FLOAT_PARAM_REGS
;
381 /* Emit the signature cookie just before the implicit arguments */
382 add_general (&gr
, &stack_size
, &cinfo
->sig_cookie
);
385 for (i
= 0; i
< sig
->param_count
; ++i
) {
386 ArgInfo
*ainfo
= &cinfo
->args
[sig
->hasthis
+ i
];
389 if (!sig
->pinvoke
&& (sig
->call_convention
== MONO_CALL_VARARG
) && (i
== sig
->sentinelpos
)) {
390 /* We allways pass the sig cookie on the stack for simplicity */
392 * Prevent implicit arguments + the sig cookie from being passed
396 fr
= FLOAT_PARAM_REGS
;
398 /* Emit the signature cookie just before the implicit arguments */
399 add_general (&gr
, &stack_size
, &cinfo
->sig_cookie
);
402 if (sig
->params
[i
]->byref
) {
403 add_general (&gr
, &stack_size
, ainfo
);
406 ptype
= mini_type_get_underlying_type (gsctx
, sig
->params
[i
]);
407 switch (ptype
->type
) {
408 case MONO_TYPE_BOOLEAN
:
411 add_general (&gr
, &stack_size
, ainfo
);
416 add_general (&gr
, &stack_size
, ainfo
);
420 add_general (&gr
, &stack_size
, ainfo
);
425 case MONO_TYPE_FNPTR
:
426 case MONO_TYPE_CLASS
:
427 case MONO_TYPE_OBJECT
:
428 case MONO_TYPE_STRING
:
429 case MONO_TYPE_SZARRAY
:
430 case MONO_TYPE_ARRAY
:
431 add_general (&gr
, &stack_size
, ainfo
);
433 case MONO_TYPE_GENERICINST
:
434 if (!mono_type_generic_inst_is_valuetype (ptype
)) {
435 add_general (&gr
, &stack_size
, ainfo
);
439 case MONO_TYPE_VALUETYPE
:
440 add_valuetype (gsctx
, sig
, ainfo
, sig
->params
[i
], FALSE
, &gr
, &fr
, &stack_size
);
442 case MONO_TYPE_TYPEDBYREF
:
443 stack_size
+= sizeof (MonoTypedRef
);
444 ainfo
->storage
= ArgOnStack
;
448 add_general_pair (&gr
, &stack_size
, ainfo
);
451 add_float (&fr
, &stack_size
, ainfo
, FALSE
);
454 add_float (&fr
, &stack_size
, ainfo
, TRUE
);
457 g_error ("unexpected type 0x%x", ptype
->type
);
458 g_assert_not_reached ();
462 if (!sig
->pinvoke
&& (sig
->call_convention
== MONO_CALL_VARARG
) && (n
> 0) && (sig
->sentinelpos
== sig
->param_count
)) {
464 fr
= FLOAT_PARAM_REGS
;
466 /* Emit the signature cookie just before the implicit arguments */
467 add_general (&gr
, &stack_size
, &cinfo
->sig_cookie
);
470 if (mono_do_x86_stack_align
&& (stack_size
% MONO_ARCH_FRAME_ALIGNMENT
) != 0) {
471 cinfo
->need_stack_align
= TRUE
;
472 cinfo
->stack_align_amount
= MONO_ARCH_FRAME_ALIGNMENT
- (stack_size
% MONO_ARCH_FRAME_ALIGNMENT
);
473 stack_size
+= cinfo
->stack_align_amount
;
476 cinfo
->stack_usage
= stack_size
;
477 cinfo
->reg_usage
= gr
;
478 cinfo
->freg_usage
= fr
;
483 get_call_info (MonoGenericSharingContext
*gsctx
, MonoMemPool
*mp
, MonoMethodSignature
*sig
, gboolean is_pinvoke
)
485 int n
= sig
->hasthis
+ sig
->param_count
;
489 cinfo
= mono_mempool_alloc0 (mp
, sizeof (CallInfo
) + (sizeof (ArgInfo
) * n
));
491 cinfo
= g_malloc0 (sizeof (CallInfo
) + (sizeof (ArgInfo
) * n
));
493 return get_call_info_internal (gsctx
, cinfo
, sig
, is_pinvoke
);
497 * mono_arch_get_argument_info:
498 * @csig: a method signature
499 * @param_count: the number of parameters to consider
500 * @arg_info: an array to store the result infos
502 * Gathers information on parameters such as size, alignment and
503 * padding. arg_info should be large enought to hold param_count + 1 entries.
505 * Returns the size of the argument area on the stack.
506 * This should be signal safe, since it is called from
507 * mono_arch_find_jit_info_ext ().
508 * FIXME: The metadata calls might not be signal safe.
511 mono_arch_get_argument_info (MonoMethodSignature
*csig
, int param_count
, MonoJitArgumentInfo
*arg_info
)
513 int k
, args_size
= 0;
519 /* Avoid g_malloc as it is not signal safe */
520 cinfo
= (CallInfo
*)g_newa (guint8
*, sizeof (CallInfo
) + (sizeof (ArgInfo
) * (csig
->param_count
+ 1)));
522 cinfo
= get_call_info_internal (NULL
, cinfo
, csig
, FALSE
);
524 if (MONO_TYPE_ISSTRUCT (csig
->ret
) && (cinfo
->ret
.storage
== ArgOnStack
)) {
525 args_size
+= sizeof (gpointer
);
529 arg_info
[0].offset
= offset
;
532 args_size
+= sizeof (gpointer
);
536 arg_info
[0].size
= args_size
;
538 for (k
= 0; k
< param_count
; k
++) {
539 size
= mini_type_stack_size_full (NULL
, csig
->params
[k
], &align
, csig
->pinvoke
);
541 /* ignore alignment for now */
544 args_size
+= pad
= (align
- (args_size
& (align
- 1))) & (align
- 1);
545 arg_info
[k
].pad
= pad
;
547 arg_info
[k
+ 1].pad
= 0;
548 arg_info
[k
+ 1].size
= size
;
550 arg_info
[k
+ 1].offset
= offset
;
554 if (mono_do_x86_stack_align
&& !CALLCONV_IS_STDCALL (csig
))
555 align
= MONO_ARCH_FRAME_ALIGNMENT
;
558 args_size
+= pad
= (align
- (args_size
& (align
- 1))) & (align
- 1);
559 arg_info
[k
].pad
= pad
;
564 static const guchar cpuid_impl
[] = {
565 0x55, /* push %ebp */
566 0x89, 0xe5, /* mov %esp,%ebp */
567 0x53, /* push %ebx */
568 0x8b, 0x45, 0x08, /* mov 0x8(%ebp),%eax */
569 0x0f, 0xa2, /* cpuid */
570 0x50, /* push %eax */
571 0x8b, 0x45, 0x10, /* mov 0x10(%ebp),%eax */
572 0x89, 0x18, /* mov %ebx,(%eax) */
573 0x8b, 0x45, 0x14, /* mov 0x14(%ebp),%eax */
574 0x89, 0x08, /* mov %ecx,(%eax) */
575 0x8b, 0x45, 0x18, /* mov 0x18(%ebp),%eax */
576 0x89, 0x10, /* mov %edx,(%eax) */
578 0x8b, 0x55, 0x0c, /* mov 0xc(%ebp),%edx */
579 0x89, 0x02, /* mov %eax,(%edx) */
585 typedef void (*CpuidFunc
) (int id
, int* p_eax
, int* p_ebx
, int* p_ecx
, int* p_edx
);
588 cpuid (int id
, int* p_eax
, int* p_ebx
, int* p_ecx
, int* p_edx
)
592 __asm__
__volatile__ (
595 "movl %%eax, %%edx\n"
596 "xorl $0x200000, %%eax\n"
601 "xorl %%edx, %%eax\n"
602 "andl $0x200000, %%eax\n"
624 /* Have to use the code manager to get around WinXP DEP */
625 static CpuidFunc func
= NULL
;
628 ptr
= mono_global_codeman_reserve (sizeof (cpuid_impl
));
629 memcpy (ptr
, cpuid_impl
, sizeof (cpuid_impl
));
630 func
= (CpuidFunc
)ptr
;
632 func (id
, p_eax
, p_ebx
, p_ecx
, p_edx
);
635 * We use this approach because of issues with gcc and pic code, see:
636 * http://gcc.gnu.org/cgi-bin/gnatsweb.pl?cmd=view%20audit-trail&database=gcc&pr=7329
637 __asm__ __volatile__ ("cpuid"
638 : "=a" (*p_eax), "=b" (*p_ebx), "=c" (*p_ecx), "=d" (*p_edx)
647 * Initialize the cpu to execute managed code.
650 mono_arch_cpu_init (void)
652 /* spec compliance requires running with double precision */
656 __asm__
__volatile__ ("fnstcw %0\n": "=m" (fpcw
));
657 fpcw
&= ~X86_FPCW_PRECC_MASK
;
658 fpcw
|= X86_FPCW_PREC_DOUBLE
;
659 __asm__
__volatile__ ("fldcw %0\n": : "m" (fpcw
));
660 __asm__
__volatile__ ("fnstcw %0\n": "=m" (fpcw
));
662 _control87 (_PC_53
, MCW_PC
);
667 * Initialize architecture specific code.
670 mono_arch_init (void)
672 InitializeCriticalSection (&mini_arch_mutex
);
674 ss_trigger_page
= mono_valloc (NULL
, mono_pagesize (), MONO_MMAP_READ
);
675 bp_trigger_page
= mono_valloc (NULL
, mono_pagesize (), MONO_MMAP_READ
|MONO_MMAP_32BIT
);
676 mono_mprotect (bp_trigger_page
, mono_pagesize (), 0);
680 * Cleanup architecture specific code.
683 mono_arch_cleanup (void)
685 DeleteCriticalSection (&mini_arch_mutex
);
689 * This function returns the optimizations supported on this cpu.
692 mono_arch_cpu_optimizazions (guint32
*exclude_mask
)
694 int eax
, ebx
, ecx
, edx
;
698 /* Feature Flags function, flags returned in EDX. */
699 if (cpuid (1, &eax
, &ebx
, &ecx
, &edx
)) {
700 if (edx
& (1 << 15)) {
701 opts
|= MONO_OPT_CMOV
;
703 opts
|= MONO_OPT_FCMOV
;
705 *exclude_mask
|= MONO_OPT_FCMOV
;
707 *exclude_mask
|= MONO_OPT_CMOV
;
709 opts
|= MONO_OPT_SSE2
;
711 *exclude_mask
|= MONO_OPT_SSE2
;
713 #ifdef MONO_ARCH_SIMD_INTRINSICS
714 /*SIMD intrinsics require at least SSE2.*/
715 if (!(opts
& MONO_OPT_SSE2
))
716 *exclude_mask
|= MONO_OPT_SIMD
;
723 * This function test for all SSE functions supported.
725 * Returns a bitmask corresponding to all supported versions.
729 mono_arch_cpu_enumerate_simd_versions (void)
731 int eax
, ebx
, ecx
, edx
;
732 guint32 sse_opts
= 0;
734 if (cpuid (1, &eax
, &ebx
, &ecx
, &edx
)) {
736 sse_opts
|= 1 << SIMD_VERSION_SSE1
;
738 sse_opts
|= 1 << SIMD_VERSION_SSE2
;
740 sse_opts
|= 1 << SIMD_VERSION_SSE3
;
742 sse_opts
|= 1 << SIMD_VERSION_SSSE3
;
744 sse_opts
|= 1 << SIMD_VERSION_SSE41
;
746 sse_opts
|= 1 << SIMD_VERSION_SSE42
;
749 /* Yes, all this needs to be done to check for sse4a.
750 See: "Amd: CPUID Specification"
752 if (cpuid (0x80000000, &eax
, &ebx
, &ecx
, &edx
)) {
753 /* eax greater or equal than 0x80000001, ebx = 'htuA', ecx = DMAc', edx = 'itne'*/
754 if ((((unsigned int) eax
) >= 0x80000001) && (ebx
== 0x68747541) && (ecx
== 0x444D4163) && (edx
== 0x69746E65)) {
755 cpuid (0x80000001, &eax
, &ebx
, &ecx
, &edx
);
757 sse_opts
|= 1 << SIMD_VERSION_SSE4a
;
766 * Determine whenever the trap whose info is in SIGINFO is caused by
770 mono_arch_is_int_overflow (void *sigctx
, void *info
)
775 mono_arch_sigctx_to_monoctx (sigctx
, &ctx
);
777 ip
= (guint8
*)ctx
.eip
;
779 if ((ip
[0] == 0xf7) && (x86_modrm_mod (ip
[1]) == 0x3) && (x86_modrm_reg (ip
[1]) == 0x7)) {
783 switch (x86_modrm_rm (ip
[1])) {
803 g_assert_not_reached ();
815 mono_arch_get_allocatable_int_vars (MonoCompile
*cfg
)
820 for (i
= 0; i
< cfg
->num_varinfo
; i
++) {
821 MonoInst
*ins
= cfg
->varinfo
[i
];
822 MonoMethodVar
*vmv
= MONO_VARINFO (cfg
, i
);
825 if (vmv
->range
.first_use
.abs_pos
>= vmv
->range
.last_use
.abs_pos
)
828 if ((ins
->flags
& (MONO_INST_IS_DEAD
|MONO_INST_VOLATILE
|MONO_INST_INDIRECT
)) ||
829 (ins
->opcode
!= OP_LOCAL
&& ins
->opcode
!= OP_ARG
))
832 /* we dont allocate I1 to registers because there is no simply way to sign extend
833 * 8bit quantities in caller saved registers on x86 */
834 if (mono_is_regsize_var (ins
->inst_vtype
) && (ins
->inst_vtype
->type
!= MONO_TYPE_I1
)) {
835 g_assert (MONO_VARINFO (cfg
, i
)->reg
== -1);
836 g_assert (i
== vmv
->idx
);
837 vars
= g_list_prepend (vars
, vmv
);
841 vars
= mono_varlist_sort (cfg
, vars
, 0);
847 mono_arch_get_global_int_regs (MonoCompile
*cfg
)
851 /* we can use 3 registers for global allocation */
852 regs
= g_list_prepend (regs
, (gpointer
)X86_EBX
);
853 regs
= g_list_prepend (regs
, (gpointer
)X86_ESI
);
854 regs
= g_list_prepend (regs
, (gpointer
)X86_EDI
);
860 * mono_arch_regalloc_cost:
862 * Return the cost, in number of memory references, of the action of
863 * allocating the variable VMV into a register during global register
867 mono_arch_regalloc_cost (MonoCompile
*cfg
, MonoMethodVar
*vmv
)
869 MonoInst
*ins
= cfg
->varinfo
[vmv
->idx
];
871 if (cfg
->method
->save_lmf
)
872 /* The register is already saved */
873 return (ins
->opcode
== OP_ARG
) ? 1 : 0;
875 /* push+pop+possible load if it is an argument */
876 return (ins
->opcode
== OP_ARG
) ? 3 : 2;
880 set_needs_stack_frame (MonoCompile
*cfg
, gboolean flag
)
882 static int inited
= FALSE
;
883 static int count
= 0;
885 if (cfg
->arch
.need_stack_frame_inited
) {
886 g_assert (cfg
->arch
.need_stack_frame
== flag
);
890 cfg
->arch
.need_stack_frame
= flag
;
891 cfg
->arch
.need_stack_frame_inited
= TRUE
;
897 mono_counters_register ("Could eliminate stack frame", MONO_COUNTER_INT
|MONO_COUNTER_JIT
, &count
);
902 //g_print ("will eliminate %s.%s.%s\n", cfg->method->klass->name_space, cfg->method->klass->name, cfg->method->name);
906 needs_stack_frame (MonoCompile
*cfg
)
908 MonoMethodSignature
*sig
;
909 MonoMethodHeader
*header
;
910 gboolean result
= FALSE
;
912 #if defined(__APPLE__)
913 /*OSX requires stack frame code to have the correct alignment. */
917 if (cfg
->arch
.need_stack_frame_inited
)
918 return cfg
->arch
.need_stack_frame
;
920 header
= mono_method_get_header (cfg
->method
);
921 sig
= mono_method_signature (cfg
->method
);
923 if (cfg
->disable_omit_fp
)
925 else if (cfg
->flags
& MONO_CFG_HAS_ALLOCA
)
927 else if (cfg
->method
->save_lmf
)
929 else if (cfg
->stack_offset
)
931 else if (cfg
->param_area
)
933 else if (cfg
->flags
& (MONO_CFG_HAS_CALLS
| MONO_CFG_HAS_ALLOCA
| MONO_CFG_HAS_TAIL
))
935 else if (header
->num_clauses
)
937 else if (sig
->param_count
+ sig
->hasthis
)
939 else if (!sig
->pinvoke
&& (sig
->call_convention
== MONO_CALL_VARARG
))
941 else if ((mono_jit_trace_calls
!= NULL
&& mono_trace_eval (cfg
->method
)) ||
942 (cfg
->prof_options
& MONO_PROFILE_ENTER_LEAVE
))
945 set_needs_stack_frame (cfg
, result
);
947 return cfg
->arch
.need_stack_frame
;
951 * Set var information according to the calling convention. X86 version.
952 * The locals var stuff should most likely be split in another method.
955 mono_arch_allocate_vars (MonoCompile
*cfg
)
957 MonoMethodSignature
*sig
;
958 MonoMethodHeader
*header
;
960 guint32 locals_stack_size
, locals_stack_align
;
965 header
= mono_method_get_header (cfg
->method
);
966 sig
= mono_method_signature (cfg
->method
);
968 cinfo
= get_call_info (cfg
->generic_sharing_context
, cfg
->mempool
, sig
, FALSE
);
970 cfg
->frame_reg
= X86_EBP
;
973 /* Reserve space to save LMF and caller saved registers */
975 if (cfg
->method
->save_lmf
) {
976 offset
+= sizeof (MonoLMF
);
978 if (cfg
->used_int_regs
& (1 << X86_EBX
)) {
982 if (cfg
->used_int_regs
& (1 << X86_EDI
)) {
986 if (cfg
->used_int_regs
& (1 << X86_ESI
)) {
991 switch (cinfo
->ret
.storage
) {
992 case ArgValuetypeInReg
:
993 /* Allocate a local to hold the result, the epilog will copy it to the correct place */
995 cfg
->ret
->opcode
= OP_REGOFFSET
;
996 cfg
->ret
->inst_basereg
= X86_EBP
;
997 cfg
->ret
->inst_offset
= - offset
;
1003 /* Allocate locals */
1004 offsets
= mono_allocate_stack_slots (cfg
, &locals_stack_size
, &locals_stack_align
);
1005 if (locals_stack_size
> MONO_ARCH_MAX_FRAME_SIZE
) {
1006 char *mname
= mono_method_full_name (cfg
->method
, TRUE
);
1007 cfg
->exception_type
= MONO_EXCEPTION_INVALID_PROGRAM
;
1008 cfg
->exception_message
= g_strdup_printf ("Method %s stack is too big.", mname
);
1012 if (locals_stack_align
) {
1013 offset
+= (locals_stack_align
- 1);
1014 offset
&= ~(locals_stack_align
- 1);
1017 * EBP is at alignment 8 % MONO_ARCH_FRAME_ALIGNMENT, so if we
1018 * have locals larger than 8 bytes we need to make sure that
1019 * they have the appropriate offset.
1021 if (MONO_ARCH_FRAME_ALIGNMENT
> 8 && locals_stack_align
> 8)
1022 offset
+= MONO_ARCH_FRAME_ALIGNMENT
- sizeof (gpointer
) * 2;
1023 for (i
= cfg
->locals_start
; i
< cfg
->num_varinfo
; i
++) {
1024 if (offsets
[i
] != -1) {
1025 MonoInst
*inst
= cfg
->varinfo
[i
];
1026 inst
->opcode
= OP_REGOFFSET
;
1027 inst
->inst_basereg
= X86_EBP
;
1028 inst
->inst_offset
= - (offset
+ offsets
[i
]);
1029 //printf ("allocated local %d to ", i); mono_print_tree_nl (inst);
1032 offset
+= locals_stack_size
;
1036 * Allocate arguments+return value
1039 switch (cinfo
->ret
.storage
) {
1041 if (MONO_TYPE_ISSTRUCT (sig
->ret
)) {
1043 * In the new IR, the cfg->vret_addr variable represents the
1044 * vtype return value.
1046 cfg
->vret_addr
->opcode
= OP_REGOFFSET
;
1047 cfg
->vret_addr
->inst_basereg
= cfg
->frame_reg
;
1048 cfg
->vret_addr
->inst_offset
= cinfo
->ret
.offset
+ ARGS_OFFSET
;
1049 if (G_UNLIKELY (cfg
->verbose_level
> 1)) {
1050 printf ("vret_addr =");
1051 mono_print_ins (cfg
->vret_addr
);
1054 cfg
->ret
->opcode
= OP_REGOFFSET
;
1055 cfg
->ret
->inst_basereg
= X86_EBP
;
1056 cfg
->ret
->inst_offset
= cinfo
->ret
.offset
+ ARGS_OFFSET
;
1059 case ArgValuetypeInReg
:
1062 cfg
->ret
->opcode
= OP_REGVAR
;
1063 cfg
->ret
->inst_c0
= cinfo
->ret
.reg
;
1064 cfg
->ret
->dreg
= cinfo
->ret
.reg
;
1067 case ArgOnFloatFpStack
:
1068 case ArgOnDoubleFpStack
:
1071 g_assert_not_reached ();
1074 if (sig
->call_convention
== MONO_CALL_VARARG
) {
1075 g_assert (cinfo
->sig_cookie
.storage
== ArgOnStack
);
1076 cfg
->sig_cookie
= cinfo
->sig_cookie
.offset
+ ARGS_OFFSET
;
1079 for (i
= 0; i
< sig
->param_count
+ sig
->hasthis
; ++i
) {
1080 ArgInfo
*ainfo
= &cinfo
->args
[i
];
1081 inst
= cfg
->args
[i
];
1082 if (inst
->opcode
!= OP_REGVAR
) {
1083 inst
->opcode
= OP_REGOFFSET
;
1084 inst
->inst_basereg
= X86_EBP
;
1086 inst
->inst_offset
= ainfo
->offset
+ ARGS_OFFSET
;
1089 cfg
->stack_offset
= offset
;
1093 mono_arch_create_vars (MonoCompile
*cfg
)
1095 MonoMethodSignature
*sig
;
1098 sig
= mono_method_signature (cfg
->method
);
1100 cinfo
= get_call_info (cfg
->generic_sharing_context
, cfg
->mempool
, sig
, FALSE
);
1102 if (cinfo
->ret
.storage
== ArgValuetypeInReg
)
1103 cfg
->ret_var_is_local
= TRUE
;
1104 if ((cinfo
->ret
.storage
!= ArgValuetypeInReg
) && MONO_TYPE_ISSTRUCT (sig
->ret
)) {
1105 cfg
->vret_addr
= mono_compile_create_var (cfg
, &mono_defaults
.int_class
->byval_arg
, OP_ARG
);
1110 * It is expensive to adjust esp for each individual fp argument pushed on the stack
1111 * so we try to do it just once when we have multiple fp arguments in a row.
1112 * We don't use this mechanism generally because for int arguments the generated code
1113 * is slightly bigger and new generation cpus optimize away the dependency chains
1114 * created by push instructions on the esp value.
1115 * fp_arg_setup is the first argument in the execution sequence where the esp register
1118 static G_GNUC_UNUSED
int
1119 collect_fp_stack_space (MonoMethodSignature
*sig
, int start_arg
, int *fp_arg_setup
)
1124 for (; start_arg
< sig
->param_count
; ++start_arg
) {
1125 t
= mini_type_get_underlying_type (NULL
, sig
->params
[start_arg
]);
1126 if (!t
->byref
&& t
->type
== MONO_TYPE_R8
) {
1127 fp_space
+= sizeof (double);
1128 *fp_arg_setup
= start_arg
;
1137 emit_sig_cookie (MonoCompile
*cfg
, MonoCallInst
*call
, CallInfo
*cinfo
)
1139 MonoMethodSignature
*tmp_sig
;
1141 /* FIXME: Add support for signature tokens to AOT */
1142 cfg
->disable_aot
= TRUE
;
1145 * mono_ArgIterator_Setup assumes the signature cookie is
1146 * passed first and all the arguments which were before it are
1147 * passed on the stack after the signature. So compensate by
1148 * passing a different signature.
1150 tmp_sig
= mono_metadata_signature_dup (call
->signature
);
1151 tmp_sig
->param_count
-= call
->signature
->sentinelpos
;
1152 tmp_sig
->sentinelpos
= 0;
1153 memcpy (tmp_sig
->params
, call
->signature
->params
+ call
->signature
->sentinelpos
, tmp_sig
->param_count
* sizeof (MonoType
*));
1155 MONO_EMIT_NEW_BIALU_IMM (cfg
, OP_X86_PUSH_IMM
, -1, -1, tmp_sig
);
1160 mono_arch_get_llvm_call_info (MonoCompile
*cfg
, MonoMethodSignature
*sig
)
1166 LLVMCallInfo
*linfo
;
1168 n
= sig
->param_count
+ sig
->hasthis
;
1170 cinfo
= get_call_info (cfg
->generic_sharing_context
, cfg
->mempool
, sig
, sig
->pinvoke
);
1172 linfo
= mono_mempool_alloc0 (cfg
->mempool
, sizeof (LLVMCallInfo
) + (sizeof (LLVMArgInfo
) * n
));
1175 * LLVM always uses the native ABI while we use our own ABI, the
1176 * only difference is the handling of vtypes:
1177 * - we only pass/receive them in registers in some cases, and only
1178 * in 1 or 2 integer registers.
1180 if (cinfo
->ret
.storage
== ArgValuetypeInReg
) {
1182 cfg
->exception_message
= g_strdup ("pinvoke + vtypes");
1183 cfg
->disable_llvm
= TRUE
;
1187 cfg
->exception_message
= g_strdup ("vtype ret in call");
1188 cfg
->disable_llvm
= TRUE
;
1190 linfo->ret.storage = LLVMArgVtypeInReg;
1191 for (j = 0; j < 2; ++j)
1192 linfo->ret.pair_storage [j] = arg_storage_to_llvm_arg_storage (cfg, cinfo->ret.pair_storage [j]);
1196 if (MONO_TYPE_ISSTRUCT (sig
->ret
) && cinfo
->ret
.storage
== ArgInIReg
) {
1197 /* Vtype returned using a hidden argument */
1198 linfo
->ret
.storage
= LLVMArgVtypeRetAddr
;
1201 if (MONO_TYPE_ISSTRUCT (sig
->ret
) && cinfo
->ret
.storage
!= ArgInIReg
) {
1203 cfg
->exception_message
= g_strdup ("vtype ret in call");
1204 cfg
->disable_llvm
= TRUE
;
1207 for (i
= 0; i
< n
; ++i
) {
1208 ainfo
= cinfo
->args
+ i
;
1210 linfo
->args
[i
].storage
= LLVMArgNone
;
1212 switch (ainfo
->storage
) {
1214 linfo
->args
[i
].storage
= LLVMArgInIReg
;
1216 case ArgInDoubleSSEReg
:
1217 case ArgInFloatSSEReg
:
1218 linfo
->args
[i
].storage
= LLVMArgInFPReg
;
1221 if ((i
>= sig
->hasthis
) && (MONO_TYPE_ISSTRUCT(sig
->params
[i
- sig
->hasthis
]))) {
1222 linfo
->args
[i
].storage
= LLVMArgVtypeByVal
;
1224 linfo
->args
[i
].storage
= LLVMArgInIReg
;
1225 if (!sig
->params
[i
- sig
->hasthis
]->byref
) {
1226 if (sig
->params
[i
- sig
->hasthis
]->type
== MONO_TYPE_R4
) {
1227 linfo
->args
[i
].storage
= LLVMArgInFPReg
;
1228 } else if (sig
->params
[i
- sig
->hasthis
]->type
== MONO_TYPE_R8
) {
1229 linfo
->args
[i
].storage
= LLVMArgInFPReg
;
1234 case ArgValuetypeInReg
:
1236 cfg
->exception_message
= g_strdup ("pinvoke + vtypes");
1237 cfg
->disable_llvm
= TRUE
;
1241 cfg
->exception_message
= g_strdup ("vtype arg");
1242 cfg
->disable_llvm
= TRUE
;
1244 linfo->args [i].storage = LLVMArgVtypeInReg;
1245 for (j = 0; j < 2; ++j)
1246 linfo->args [i].pair_storage [j] = arg_storage_to_llvm_arg_storage (cfg, ainfo->pair_storage [j]);
1250 cfg
->exception_message
= g_strdup ("ainfo->storage");
1251 cfg
->disable_llvm
= TRUE
;
1261 mono_arch_emit_call (MonoCompile
*cfg
, MonoCallInst
*call
)
1264 MonoMethodSignature
*sig
;
1267 int sentinelpos
= 0;
1269 sig
= call
->signature
;
1270 n
= sig
->param_count
+ sig
->hasthis
;
1272 cinfo
= get_call_info (cfg
->generic_sharing_context
, cfg
->mempool
, sig
, FALSE
);
1274 if (!sig
->pinvoke
&& (sig
->call_convention
== MONO_CALL_VARARG
))
1275 sentinelpos
= sig
->sentinelpos
+ (sig
->hasthis
? 1 : 0);
1277 if (cinfo
->need_stack_align
) {
1278 MONO_INST_NEW (cfg
, arg
, OP_SUB_IMM
);
1279 arg
->dreg
= X86_ESP
;
1280 arg
->sreg1
= X86_ESP
;
1281 arg
->inst_imm
= cinfo
->stack_align_amount
;
1282 MONO_ADD_INS (cfg
->cbb
, arg
);
1285 if (sig
->ret
&& MONO_TYPE_ISSTRUCT (sig
->ret
)) {
1286 if (cinfo
->ret
.storage
== ArgValuetypeInReg
) {
1288 * Tell the JIT to use a more efficient calling convention: call using
1289 * OP_CALL, compute the result location after the call, and save the
1292 call
->vret_in_reg
= TRUE
;
1294 NULLIFY_INS (call
->vret_var
);
1298 /* Handle the case where there are no implicit arguments */
1299 if (!sig
->pinvoke
&& (sig
->call_convention
== MONO_CALL_VARARG
) && (n
== sentinelpos
)) {
1300 emit_sig_cookie (cfg
, call
, cinfo
);
1303 /* Arguments are pushed in the reverse order */
1304 for (i
= n
- 1; i
>= 0; i
--) {
1305 ArgInfo
*ainfo
= cinfo
->args
+ i
;
1308 if (i
>= sig
->hasthis
)
1309 t
= sig
->params
[i
- sig
->hasthis
];
1311 t
= &mono_defaults
.int_class
->byval_arg
;
1312 t
= mini_type_get_underlying_type (cfg
->generic_sharing_context
, t
);
1314 MONO_INST_NEW (cfg
, arg
, OP_X86_PUSH
);
1316 in
= call
->args
[i
];
1317 arg
->cil_code
= in
->cil_code
;
1318 arg
->sreg1
= in
->dreg
;
1319 arg
->type
= in
->type
;
1321 g_assert (in
->dreg
!= -1);
1323 if ((i
>= sig
->hasthis
) && (MONO_TYPE_ISSTRUCT(t
))) {
1327 g_assert (in
->klass
);
1329 if (t
->type
== MONO_TYPE_TYPEDBYREF
) {
1330 size
= sizeof (MonoTypedRef
);
1331 align
= sizeof (gpointer
);
1334 size
= mini_type_stack_size_full (cfg
->generic_sharing_context
, &in
->klass
->byval_arg
, &align
, sig
->pinvoke
);
1338 arg
->opcode
= OP_OUTARG_VT
;
1339 arg
->sreg1
= in
->dreg
;
1340 arg
->klass
= in
->klass
;
1341 arg
->backend
.size
= size
;
1343 MONO_ADD_INS (cfg
->cbb
, arg
);
1347 switch (ainfo
->storage
) {
1349 arg
->opcode
= OP_X86_PUSH
;
1351 if (t
->type
== MONO_TYPE_R4
) {
1352 MONO_EMIT_NEW_BIALU_IMM (cfg
, OP_SUB_IMM
, X86_ESP
, X86_ESP
, 4);
1353 arg
->opcode
= OP_STORER4_MEMBASE_REG
;
1354 arg
->inst_destbasereg
= X86_ESP
;
1355 arg
->inst_offset
= 0;
1356 } else if (t
->type
== MONO_TYPE_R8
) {
1357 MONO_EMIT_NEW_BIALU_IMM (cfg
, OP_SUB_IMM
, X86_ESP
, X86_ESP
, 8);
1358 arg
->opcode
= OP_STORER8_MEMBASE_REG
;
1359 arg
->inst_destbasereg
= X86_ESP
;
1360 arg
->inst_offset
= 0;
1361 } else if (t
->type
== MONO_TYPE_I8
|| t
->type
== MONO_TYPE_U8
) {
1363 MONO_EMIT_NEW_UNALU (cfg
, OP_X86_PUSH
, -1, in
->dreg
+ 2);
1368 g_assert_not_reached ();
1371 MONO_ADD_INS (cfg
->cbb
, arg
);
1374 if (!sig
->pinvoke
&& (sig
->call_convention
== MONO_CALL_VARARG
) && (i
== sentinelpos
)) {
1375 /* Emit the signature cookie just before the implicit arguments */
1376 emit_sig_cookie (cfg
, call
, cinfo
);
1380 if (sig
->ret
&& MONO_TYPE_ISSTRUCT (sig
->ret
)) {
1383 if (cinfo
->ret
.storage
== ArgValuetypeInReg
) {
1386 else if (cinfo
->ret
.storage
== ArgInIReg
) {
1388 /* The return address is passed in a register */
1389 MONO_INST_NEW (cfg
, vtarg
, OP_MOVE
);
1390 vtarg
->sreg1
= call
->inst
.dreg
;
1391 vtarg
->dreg
= mono_alloc_ireg (cfg
);
1392 MONO_ADD_INS (cfg
->cbb
, vtarg
);
1394 mono_call_inst_add_outarg_reg (cfg
, call
, vtarg
->dreg
, cinfo
->ret
.reg
, FALSE
);
1397 MONO_INST_NEW (cfg
, vtarg
, OP_X86_PUSH
);
1398 vtarg
->type
= STACK_MP
;
1399 vtarg
->sreg1
= call
->vret_var
->dreg
;
1400 MONO_ADD_INS (cfg
->cbb
, vtarg
);
1403 /* if the function returns a struct on stack, the called method already does a ret $0x4 */
1404 if (cinfo
->ret
.storage
!= ArgValuetypeInReg
)
1405 cinfo
->stack_usage
-= 4;
1408 call
->stack_usage
= cinfo
->stack_usage
;
1412 mono_arch_emit_outarg_vt (MonoCompile
*cfg
, MonoInst
*ins
, MonoInst
*src
)
1415 int size
= ins
->backend
.size
;
1418 MONO_INST_NEW (cfg
, arg
, OP_X86_PUSH_MEMBASE
);
1419 arg
->sreg1
= src
->dreg
;
1421 MONO_ADD_INS (cfg
->cbb
, arg
);
1422 } else if (size
<= 20) {
1423 MONO_EMIT_NEW_BIALU_IMM (cfg
, OP_SUB_IMM
, X86_ESP
, X86_ESP
, ALIGN_TO (size
, 4));
1424 mini_emit_memcpy (cfg
, X86_ESP
, 0, src
->dreg
, 0, size
, 4);
1426 MONO_INST_NEW (cfg
, arg
, OP_X86_PUSH_OBJ
);
1427 arg
->inst_basereg
= src
->dreg
;
1428 arg
->inst_offset
= 0;
1429 arg
->inst_imm
= size
;
1431 MONO_ADD_INS (cfg
->cbb
, arg
);
1436 mono_arch_emit_setret (MonoCompile
*cfg
, MonoMethod
*method
, MonoInst
*val
)
1438 MonoType
*ret
= mini_type_get_underlying_type (cfg
->generic_sharing_context
, mono_method_signature (method
)->ret
);
1441 if (ret
->type
== MONO_TYPE_R4
) {
1442 if (COMPILE_LLVM (cfg
))
1443 MONO_EMIT_NEW_UNALU (cfg
, OP_FMOVE
, cfg
->ret
->dreg
, val
->dreg
);
1446 } else if (ret
->type
== MONO_TYPE_R8
) {
1447 if (COMPILE_LLVM (cfg
))
1448 MONO_EMIT_NEW_UNALU (cfg
, OP_FMOVE
, cfg
->ret
->dreg
, val
->dreg
);
1451 } else if (ret
->type
== MONO_TYPE_I8
|| ret
->type
== MONO_TYPE_U8
) {
1452 if (COMPILE_LLVM (cfg
))
1453 MONO_EMIT_NEW_UNALU (cfg
, OP_LMOVE
, cfg
->ret
->dreg
, val
->dreg
);
1455 MONO_EMIT_NEW_UNALU (cfg
, OP_MOVE
, X86_EAX
, val
->dreg
+ 1);
1456 MONO_EMIT_NEW_UNALU (cfg
, OP_MOVE
, X86_EDX
, val
->dreg
+ 2);
1462 MONO_EMIT_NEW_UNALU (cfg
, OP_MOVE
, cfg
->ret
->dreg
, val
->dreg
);
1466 * Allow tracing to work with this interface (with an optional argument)
1469 mono_arch_instrument_prolog (MonoCompile
*cfg
, void *func
, void *p
, gboolean enable_arguments
)
1473 g_assert (MONO_ARCH_FRAME_ALIGNMENT
>= 8);
1474 x86_alu_reg_imm (code
, X86_SUB
, X86_ESP
, MONO_ARCH_FRAME_ALIGNMENT
- 8);
1476 /* if some args are passed in registers, we need to save them here */
1477 x86_push_reg (code
, X86_EBP
);
1479 if (cfg
->compile_aot
) {
1480 x86_push_imm (code
, cfg
->method
);
1481 x86_mov_reg_imm (code
, X86_EAX
, func
);
1482 x86_call_reg (code
, X86_EAX
);
1484 mono_add_patch_info (cfg
, code
-cfg
->native_code
, MONO_PATCH_INFO_METHODCONST
, cfg
->method
);
1485 x86_push_imm (code
, cfg
->method
);
1486 mono_add_patch_info (cfg
, code
-cfg
->native_code
, MONO_PATCH_INFO_ABS
, func
);
1487 x86_call_code (code
, 0);
1489 x86_alu_reg_imm (code
, X86_ADD
, X86_ESP
, MONO_ARCH_FRAME_ALIGNMENT
);
1503 mono_arch_instrument_epilog_full (MonoCompile
*cfg
, void *func
, void *p
, gboolean enable_arguments
, gboolean preserve_argument_registers
)
1506 int arg_size
= 0, stack_usage
= 0, save_mode
= SAVE_NONE
;
1507 MonoMethod
*method
= cfg
->method
;
1508 MonoType
*ret_type
= mini_type_get_underlying_type (cfg
->generic_sharing_context
, mono_method_signature (method
)->ret
);
1510 switch (ret_type
->type
) {
1511 case MONO_TYPE_VOID
:
1512 /* special case string .ctor icall */
1513 if (strcmp (".ctor", method
->name
) && method
->klass
== mono_defaults
.string_class
) {
1514 save_mode
= SAVE_EAX
;
1515 stack_usage
= enable_arguments
? 8 : 4;
1517 save_mode
= SAVE_NONE
;
1521 save_mode
= SAVE_EAX_EDX
;
1522 stack_usage
= enable_arguments
? 16 : 8;
1526 save_mode
= SAVE_FP
;
1527 stack_usage
= enable_arguments
? 16 : 8;
1529 case MONO_TYPE_GENERICINST
:
1530 if (!mono_type_generic_inst_is_valuetype (ret_type
)) {
1531 save_mode
= SAVE_EAX
;
1532 stack_usage
= enable_arguments
? 8 : 4;
1536 case MONO_TYPE_VALUETYPE
:
1537 // FIXME: Handle SMALL_STRUCT_IN_REG here for proper alignment on darwin-x86
1538 save_mode
= SAVE_STRUCT
;
1539 stack_usage
= enable_arguments
? 4 : 0;
1542 save_mode
= SAVE_EAX
;
1543 stack_usage
= enable_arguments
? 8 : 4;
1547 x86_alu_reg_imm (code
, X86_SUB
, X86_ESP
, MONO_ARCH_FRAME_ALIGNMENT
- stack_usage
- 4);
1549 switch (save_mode
) {
1551 x86_push_reg (code
, X86_EDX
);
1552 x86_push_reg (code
, X86_EAX
);
1553 if (enable_arguments
) {
1554 x86_push_reg (code
, X86_EDX
);
1555 x86_push_reg (code
, X86_EAX
);
1560 x86_push_reg (code
, X86_EAX
);
1561 if (enable_arguments
) {
1562 x86_push_reg (code
, X86_EAX
);
1567 x86_alu_reg_imm (code
, X86_SUB
, X86_ESP
, 8);
1568 x86_fst_membase (code
, X86_ESP
, 0, TRUE
, TRUE
);
1569 if (enable_arguments
) {
1570 x86_alu_reg_imm (code
, X86_SUB
, X86_ESP
, 8);
1571 x86_fst_membase (code
, X86_ESP
, 0, TRUE
, TRUE
);
1576 if (enable_arguments
) {
1577 x86_push_membase (code
, X86_EBP
, 8);
1586 if (cfg
->compile_aot
) {
1587 x86_push_imm (code
, method
);
1588 x86_mov_reg_imm (code
, X86_EAX
, func
);
1589 x86_call_reg (code
, X86_EAX
);
1591 mono_add_patch_info (cfg
, code
-cfg
->native_code
, MONO_PATCH_INFO_METHODCONST
, method
);
1592 x86_push_imm (code
, method
);
1593 mono_add_patch_info (cfg
, code
-cfg
->native_code
, MONO_PATCH_INFO_ABS
, func
);
1594 x86_call_code (code
, 0);
1597 x86_alu_reg_imm (code
, X86_ADD
, X86_ESP
, arg_size
+ 4);
1599 switch (save_mode
) {
1601 x86_pop_reg (code
, X86_EAX
);
1602 x86_pop_reg (code
, X86_EDX
);
1605 x86_pop_reg (code
, X86_EAX
);
1608 x86_fld_membase (code
, X86_ESP
, 0, TRUE
);
1609 x86_alu_reg_imm (code
, X86_ADD
, X86_ESP
, 8);
1616 x86_alu_reg_imm (code
, X86_ADD
, X86_ESP
, MONO_ARCH_FRAME_ALIGNMENT
- stack_usage
);
1621 #define EMIT_COND_BRANCH(ins,cond,sign) \
1622 if (ins->inst_true_bb->native_offset) { \
1623 x86_branch (code, cond, cfg->native_code + ins->inst_true_bb->native_offset, sign); \
1625 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
1626 if ((cfg->opt & MONO_OPT_BRANCH) && \
1627 x86_is_imm8 (ins->inst_true_bb->max_offset - cpos)) \
1628 x86_branch8 (code, cond, 0, sign); \
1630 x86_branch32 (code, cond, 0, sign); \
1634 * Emit an exception if condition is fail and
1635 * if possible do a directly branch to target
1637 #define EMIT_COND_SYSTEM_EXCEPTION(cond,signed,exc_name) \
1639 MonoInst *tins = mono_branch_optimize_exception_target (cfg, bb, exc_name); \
1640 if (tins == NULL) { \
1641 mono_add_patch_info (cfg, code - cfg->native_code, \
1642 MONO_PATCH_INFO_EXC, exc_name); \
1643 x86_branch32 (code, cond, 0, signed); \
1645 EMIT_COND_BRANCH (tins, cond, signed); \
1649 #define EMIT_FPCOMPARE(code) do { \
1650 x86_fcompp (code); \
1651 x86_fnstsw (code); \
1656 emit_call (MonoCompile
*cfg
, guint8
*code
, guint32 patch_type
, gconstpointer data
)
1658 mono_add_patch_info (cfg
, code
- cfg
->native_code
, patch_type
, data
);
1659 x86_call_code (code
, 0);
1664 #define INST_IGNORES_CFLAGS(opcode) (!(((opcode) == OP_ADC) || ((opcode) == OP_IADC) || ((opcode) == OP_ADC_IMM) || ((opcode) == OP_IADC_IMM) || ((opcode) == OP_SBB) || ((opcode) == OP_ISBB) || ((opcode) == OP_SBB_IMM) || ((opcode) == OP_ISBB_IMM)))
1667 * mono_peephole_pass_1:
1669 * Perform peephole opts which should/can be performed before local regalloc
1672 mono_arch_peephole_pass_1 (MonoCompile
*cfg
, MonoBasicBlock
*bb
)
1676 MONO_BB_FOR_EACH_INS_SAFE (bb
, n
, ins
) {
1677 MonoInst
*last_ins
= ins
->prev
;
1679 switch (ins
->opcode
) {
1682 if ((ins
->sreg1
< MONO_MAX_IREGS
) && (ins
->dreg
>= MONO_MAX_IREGS
)) {
1684 * X86_LEA is like ADD, but doesn't have the
1685 * sreg1==dreg restriction.
1687 ins
->opcode
= OP_X86_LEA_MEMBASE
;
1688 ins
->inst_basereg
= ins
->sreg1
;
1689 } else if ((ins
->inst_imm
== 1) && (ins
->dreg
== ins
->sreg1
))
1690 ins
->opcode
= OP_X86_INC_REG
;
1694 if ((ins
->sreg1
< MONO_MAX_IREGS
) && (ins
->dreg
>= MONO_MAX_IREGS
)) {
1695 ins
->opcode
= OP_X86_LEA_MEMBASE
;
1696 ins
->inst_basereg
= ins
->sreg1
;
1697 ins
->inst_imm
= -ins
->inst_imm
;
1698 } else if ((ins
->inst_imm
== 1) && (ins
->dreg
== ins
->sreg1
))
1699 ins
->opcode
= OP_X86_DEC_REG
;
1701 case OP_COMPARE_IMM
:
1702 case OP_ICOMPARE_IMM
:
1703 /* OP_COMPARE_IMM (reg, 0)
1705 * OP_X86_TEST_NULL (reg)
1708 ins
->opcode
= OP_X86_TEST_NULL
;
1710 case OP_X86_COMPARE_MEMBASE_IMM
:
1712 * OP_STORE_MEMBASE_REG reg, offset(basereg)
1713 * OP_X86_COMPARE_MEMBASE_IMM offset(basereg), imm
1715 * OP_STORE_MEMBASE_REG reg, offset(basereg)
1716 * OP_COMPARE_IMM reg, imm
1718 * Note: if imm = 0 then OP_COMPARE_IMM replaced with OP_X86_TEST_NULL
1720 if (last_ins
&& (last_ins
->opcode
== OP_STOREI4_MEMBASE_REG
) &&
1721 ins
->inst_basereg
== last_ins
->inst_destbasereg
&&
1722 ins
->inst_offset
== last_ins
->inst_offset
) {
1723 ins
->opcode
= OP_COMPARE_IMM
;
1724 ins
->sreg1
= last_ins
->sreg1
;
1726 /* check if we can remove cmp reg,0 with test null */
1728 ins
->opcode
= OP_X86_TEST_NULL
;
1732 case OP_X86_PUSH_MEMBASE
:
1733 if (last_ins
&& (last_ins
->opcode
== OP_STOREI4_MEMBASE_REG
||
1734 last_ins
->opcode
== OP_STORE_MEMBASE_REG
) &&
1735 ins
->inst_basereg
== last_ins
->inst_destbasereg
&&
1736 ins
->inst_offset
== last_ins
->inst_offset
) {
1737 ins
->opcode
= OP_X86_PUSH
;
1738 ins
->sreg1
= last_ins
->sreg1
;
1743 mono_peephole_ins (bb
, ins
);
1748 mono_arch_peephole_pass_2 (MonoCompile
*cfg
, MonoBasicBlock
*bb
)
1752 MONO_BB_FOR_EACH_INS_SAFE (bb
, n
, ins
) {
1753 switch (ins
->opcode
) {
1755 /* reg = 0 -> XOR (reg, reg) */
1756 /* XOR sets cflags on x86, so we cant do it always */
1757 if (ins
->inst_c0
== 0 && (!ins
->next
|| (ins
->next
&& INST_IGNORES_CFLAGS (ins
->next
->opcode
)))) {
1760 ins
->opcode
= OP_IXOR
;
1761 ins
->sreg1
= ins
->dreg
;
1762 ins
->sreg2
= ins
->dreg
;
1765 * Convert succeeding STORE_MEMBASE_IMM 0 ins to STORE_MEMBASE_REG
1766 * since it takes 3 bytes instead of 7.
1768 for (ins2
= ins
->next
; ins2
; ins2
= ins2
->next
) {
1769 if ((ins2
->opcode
== OP_STORE_MEMBASE_IMM
) && (ins2
->inst_imm
== 0)) {
1770 ins2
->opcode
= OP_STORE_MEMBASE_REG
;
1771 ins2
->sreg1
= ins
->dreg
;
1773 else if ((ins2
->opcode
== OP_STOREI4_MEMBASE_IMM
) && (ins2
->inst_imm
== 0)) {
1774 ins2
->opcode
= OP_STOREI4_MEMBASE_REG
;
1775 ins2
->sreg1
= ins
->dreg
;
1777 else if ((ins2
->opcode
== OP_STOREI1_MEMBASE_IMM
) || (ins2
->opcode
== OP_STOREI2_MEMBASE_IMM
)) {
1778 /* Continue iteration */
1787 if ((ins
->inst_imm
== 1) && (ins
->dreg
== ins
->sreg1
))
1788 ins
->opcode
= OP_X86_INC_REG
;
1792 if ((ins
->inst_imm
== 1) && (ins
->dreg
== ins
->sreg1
))
1793 ins
->opcode
= OP_X86_DEC_REG
;
1797 mono_peephole_ins (bb
, ins
);
1802 * mono_arch_lowering_pass:
1804 * Converts complex opcodes into simpler ones so that each IR instruction
1805 * corresponds to one machine instruction.
1808 mono_arch_lowering_pass (MonoCompile
*cfg
, MonoBasicBlock
*bb
)
1810 MonoInst
*ins
, *next
;
1813 * FIXME: Need to add more instructions, but the current machine
1814 * description can't model some parts of the composite instructions like
1817 MONO_BB_FOR_EACH_INS_SAFE (bb
, next
, ins
) {
1818 switch (ins
->opcode
) {
1821 case OP_IDIV_UN_IMM
:
1822 case OP_IREM_UN_IMM
:
1824 * Keep the cases where we could generated optimized code, otherwise convert
1825 * to the non-imm variant.
1827 if ((ins
->opcode
== OP_IREM_IMM
) && mono_is_power_of_two (ins
->inst_imm
) >= 0)
1829 mono_decompose_op_imm (cfg
, bb
, ins
);
1836 bb
->max_vreg
= cfg
->next_vreg
;
1840 branch_cc_table
[] = {
1841 X86_CC_EQ
, X86_CC_GE
, X86_CC_GT
, X86_CC_LE
, X86_CC_LT
,
1842 X86_CC_NE
, X86_CC_GE
, X86_CC_GT
, X86_CC_LE
, X86_CC_LT
,
1843 X86_CC_O
, X86_CC_NO
, X86_CC_C
, X86_CC_NC
1846 /* Maps CMP_... constants to X86_CC_... constants */
1849 X86_CC_EQ
, X86_CC_NE
, X86_CC_LE
, X86_CC_GE
, X86_CC_LT
, X86_CC_GT
,
1850 X86_CC_LE
, X86_CC_GE
, X86_CC_LT
, X86_CC_GT
1854 cc_signed_table
[] = {
1855 TRUE
, TRUE
, TRUE
, TRUE
, TRUE
, TRUE
,
1856 FALSE
, FALSE
, FALSE
, FALSE
1859 static unsigned char*
1860 emit_float_to_int (MonoCompile
*cfg
, guchar
*code
, int dreg
, int size
, gboolean is_signed
)
1862 #define XMM_TEMP_REG 0
1863 /*This SSE2 optimization must not be done which OPT_SIMD in place as it clobbers xmm0.*/
1864 /*The xmm pass decomposes OP_FCONV_ ops anyway anyway.*/
1865 if (cfg
->opt
& MONO_OPT_SSE2
&& size
< 8 && !(cfg
->opt
& MONO_OPT_SIMD
)) {
1866 /* optimize by assigning a local var for this use so we avoid
1867 * the stack manipulations */
1868 x86_alu_reg_imm (code
, X86_SUB
, X86_ESP
, 8);
1869 x86_fst_membase (code
, X86_ESP
, 0, TRUE
, TRUE
);
1870 x86_movsd_reg_membase (code
, XMM_TEMP_REG
, X86_ESP
, 0);
1871 x86_cvttsd2si (code
, dreg
, XMM_TEMP_REG
);
1872 x86_alu_reg_imm (code
, X86_ADD
, X86_ESP
, 8);
1874 x86_widen_reg (code
, dreg
, dreg
, is_signed
, FALSE
);
1876 x86_widen_reg (code
, dreg
, dreg
, is_signed
, TRUE
);
1879 x86_alu_reg_imm (code
, X86_SUB
, X86_ESP
, 4);
1880 x86_fnstcw_membase(code
, X86_ESP
, 0);
1881 x86_mov_reg_membase (code
, dreg
, X86_ESP
, 0, 2);
1882 x86_alu_reg_imm (code
, X86_OR
, dreg
, 0xc00);
1883 x86_mov_membase_reg (code
, X86_ESP
, 2, dreg
, 2);
1884 x86_fldcw_membase (code
, X86_ESP
, 2);
1886 x86_alu_reg_imm (code
, X86_SUB
, X86_ESP
, 8);
1887 x86_fist_pop_membase (code
, X86_ESP
, 0, TRUE
);
1888 x86_pop_reg (code
, dreg
);
1889 /* FIXME: need the high register
1890 * x86_pop_reg (code, dreg_high);
1893 x86_push_reg (code
, X86_EAX
); // SP = SP - 4
1894 x86_fist_pop_membase (code
, X86_ESP
, 0, FALSE
);
1895 x86_pop_reg (code
, dreg
);
1897 x86_fldcw_membase (code
, X86_ESP
, 0);
1898 x86_alu_reg_imm (code
, X86_ADD
, X86_ESP
, 4);
1901 x86_widen_reg (code
, dreg
, dreg
, is_signed
, FALSE
);
1903 x86_widen_reg (code
, dreg
, dreg
, is_signed
, TRUE
);
1907 static unsigned char*
1908 mono_emit_stack_alloc (guchar
*code
, MonoInst
* tree
)
1910 int sreg
= tree
->sreg1
;
1911 int need_touch
= FALSE
;
1913 #if defined(TARGET_WIN32) || defined(MONO_ARCH_SIGSEGV_ON_ALTSTACK)
1922 * If requested stack size is larger than one page,
1923 * perform stack-touch operation
1926 * Generate stack probe code.
1927 * Under Windows, it is necessary to allocate one page at a time,
1928 * "touching" stack after each successful sub-allocation. This is
1929 * because of the way stack growth is implemented - there is a
1930 * guard page before the lowest stack page that is currently commited.
1931 * Stack normally grows sequentially so OS traps access to the
1932 * guard page and commits more pages when needed.
1934 x86_test_reg_imm (code
, sreg
, ~0xFFF);
1935 br
[0] = code
; x86_branch8 (code
, X86_CC_Z
, 0, FALSE
);
1937 br
[2] = code
; /* loop */
1938 x86_alu_reg_imm (code
, X86_SUB
, X86_ESP
, 0x1000);
1939 x86_test_membase_reg (code
, X86_ESP
, 0, X86_ESP
);
1942 * By the end of the loop, sreg2 is smaller than 0x1000, so the init routine
1943 * that follows only initializes the last part of the area.
1945 /* Same as the init code below with size==0x1000 */
1946 if (tree
->flags
& MONO_INST_INIT
) {
1947 x86_push_reg (code
, X86_EAX
);
1948 x86_push_reg (code
, X86_ECX
);
1949 x86_push_reg (code
, X86_EDI
);
1950 x86_mov_reg_imm (code
, X86_ECX
, (0x1000 >> 2));
1951 x86_alu_reg_reg (code
, X86_XOR
, X86_EAX
, X86_EAX
);
1952 x86_lea_membase (code
, X86_EDI
, X86_ESP
, 12);
1954 x86_prefix (code
, X86_REP_PREFIX
);
1956 x86_pop_reg (code
, X86_EDI
);
1957 x86_pop_reg (code
, X86_ECX
);
1958 x86_pop_reg (code
, X86_EAX
);
1961 x86_alu_reg_imm (code
, X86_SUB
, sreg
, 0x1000);
1962 x86_alu_reg_imm (code
, X86_CMP
, sreg
, 0x1000);
1963 br
[3] = code
; x86_branch8 (code
, X86_CC_AE
, 0, FALSE
);
1964 x86_patch (br
[3], br
[2]);
1965 x86_test_reg_reg (code
, sreg
, sreg
);
1966 br
[4] = code
; x86_branch8 (code
, X86_CC_Z
, 0, FALSE
);
1967 x86_alu_reg_reg (code
, X86_SUB
, X86_ESP
, sreg
);
1969 br
[1] = code
; x86_jump8 (code
, 0);
1971 x86_patch (br
[0], code
);
1972 x86_alu_reg_reg (code
, X86_SUB
, X86_ESP
, sreg
);
1973 x86_patch (br
[1], code
);
1974 x86_patch (br
[4], code
);
1977 x86_alu_reg_reg (code
, X86_SUB
, X86_ESP
, tree
->sreg1
);
1979 if (tree
->flags
& MONO_INST_INIT
) {
1981 if (tree
->dreg
!= X86_EAX
&& sreg
!= X86_EAX
) {
1982 x86_push_reg (code
, X86_EAX
);
1985 if (tree
->dreg
!= X86_ECX
&& sreg
!= X86_ECX
) {
1986 x86_push_reg (code
, X86_ECX
);
1989 if (tree
->dreg
!= X86_EDI
&& sreg
!= X86_EDI
) {
1990 x86_push_reg (code
, X86_EDI
);
1994 x86_shift_reg_imm (code
, X86_SHR
, sreg
, 2);
1995 if (sreg
!= X86_ECX
)
1996 x86_mov_reg_reg (code
, X86_ECX
, sreg
, 4);
1997 x86_alu_reg_reg (code
, X86_XOR
, X86_EAX
, X86_EAX
);
1999 x86_lea_membase (code
, X86_EDI
, X86_ESP
, offset
);
2001 x86_prefix (code
, X86_REP_PREFIX
);
2004 if (tree
->dreg
!= X86_EDI
&& sreg
!= X86_EDI
)
2005 x86_pop_reg (code
, X86_EDI
);
2006 if (tree
->dreg
!= X86_ECX
&& sreg
!= X86_ECX
)
2007 x86_pop_reg (code
, X86_ECX
);
2008 if (tree
->dreg
!= X86_EAX
&& sreg
!= X86_EAX
)
2009 x86_pop_reg (code
, X86_EAX
);
2016 emit_move_return_value (MonoCompile
*cfg
, MonoInst
*ins
, guint8
*code
)
2018 /* Move return value to the target register */
2019 switch (ins
->opcode
) {
2022 case OP_CALL_MEMBASE
:
2023 if (ins
->dreg
!= X86_EAX
)
2024 x86_mov_reg_reg (code
, ins
->dreg
, X86_EAX
, 4);
2034 * mono_x86_emit_tls_get:
2035 * @code: buffer to store code to
2036 * @dreg: hard register where to place the result
2037 * @tls_offset: offset info
2039 * mono_x86_emit_tls_get emits in @code the native code that puts in
2040 * the dreg register the item in the thread local storage identified
2043 * Returns: a pointer to the end of the stored code
2046 mono_x86_emit_tls_get (guint8
* code
, int dreg
, int tls_offset
)
2050 * See the Under the Hood article in the May 1996 issue of Microsoft Systems
2051 * Journal and/or a disassembly of the TlsGet () function.
2053 g_assert (tls_offset
< 64);
2054 x86_prefix (code
, X86_FS_PREFIX
);
2055 x86_mov_reg_mem (code
, dreg
, 0x18, 4);
2056 /* Dunno what this does but TlsGetValue () contains it */
2057 x86_alu_membase_imm (code
, X86_AND
, dreg
, 0x34, 0);
2058 x86_mov_reg_membase (code
, dreg
, dreg
, 3600 + (tls_offset
* 4), 4);
2060 if (optimize_for_xen
) {
2061 x86_prefix (code
, X86_GS_PREFIX
);
2062 x86_mov_reg_mem (code
, dreg
, 0, 4);
2063 x86_mov_reg_membase (code
, dreg
, dreg
, tls_offset
, 4);
2065 x86_prefix (code
, X86_GS_PREFIX
);
2066 x86_mov_reg_mem (code
, dreg
, tls_offset
, 4);
2073 * emit_load_volatile_arguments:
2075 * Load volatile arguments from the stack to the original input registers.
2076 * Required before a tail call.
2079 emit_load_volatile_arguments (MonoCompile
*cfg
, guint8
*code
)
2081 MonoMethod
*method
= cfg
->method
;
2082 MonoMethodSignature
*sig
;
2087 /* FIXME: Generate intermediate code instead */
2089 sig
= mono_method_signature (method
);
2091 cinfo
= get_call_info (cfg
->generic_sharing_context
, cfg
->mempool
, sig
, FALSE
);
2093 /* This is the opposite of the code in emit_prolog */
2095 for (i
= 0; i
< sig
->param_count
+ sig
->hasthis
; ++i
) {
2096 ArgInfo
*ainfo
= cinfo
->args
+ i
;
2098 inst
= cfg
->args
[i
];
2100 if (sig
->hasthis
&& (i
== 0))
2101 arg_type
= &mono_defaults
.object_class
->byval_arg
;
2103 arg_type
= sig
->params
[i
- sig
->hasthis
];
2106 * On x86, the arguments are either in their original stack locations, or in
2109 if (inst
->opcode
== OP_REGVAR
) {
2110 g_assert (ainfo
->storage
== ArgOnStack
);
2112 x86_mov_membase_reg (code
, X86_EBP
, inst
->inst_offset
, inst
->dreg
, 4);
2119 #define REAL_PRINT_REG(text,reg) \
2120 mono_assert (reg >= 0); \
2121 x86_push_reg (code, X86_EAX); \
2122 x86_push_reg (code, X86_EDX); \
2123 x86_push_reg (code, X86_ECX); \
2124 x86_push_reg (code, reg); \
2125 x86_push_imm (code, reg); \
2126 x86_push_imm (code, text " %d %p\n"); \
2127 x86_mov_reg_imm (code, X86_EAX, printf); \
2128 x86_call_reg (code, X86_EAX); \
2129 x86_alu_reg_imm (code, X86_ADD, X86_ESP, 3*4); \
2130 x86_pop_reg (code, X86_ECX); \
2131 x86_pop_reg (code, X86_EDX); \
2132 x86_pop_reg (code, X86_EAX);
2134 /* benchmark and set based on cpu */
2135 #define LOOP_ALIGNMENT 8
2136 #define bb_is_loop_start(bb) ((bb)->loop_body_start && (bb)->nesting)
2141 mono_arch_output_basic_block (MonoCompile
*cfg
, MonoBasicBlock
*bb
)
2146 guint8
*code
= cfg
->native_code
+ cfg
->code_len
;
2149 if (cfg
->opt
& MONO_OPT_LOOP
) {
2150 int pad
, align
= LOOP_ALIGNMENT
;
2151 /* set alignment depending on cpu */
2152 if (bb_is_loop_start (bb
) && (pad
= (cfg
->code_len
& (align
- 1)))) {
2154 /*g_print ("adding %d pad at %x to loop in %s\n", pad, cfg->code_len, cfg->method->name);*/
2155 x86_padding (code
, pad
);
2156 cfg
->code_len
+= pad
;
2157 bb
->native_offset
= cfg
->code_len
;
2161 if (cfg
->verbose_level
> 2)
2162 g_print ("Basic block %d starting at offset 0x%x\n", bb
->block_num
, bb
->native_offset
);
2164 cpos
= bb
->max_offset
;
2166 if (cfg
->prof_options
& MONO_PROFILE_COVERAGE
) {
2167 MonoProfileCoverageInfo
*cov
= cfg
->coverage_info
;
2168 g_assert (!cfg
->compile_aot
);
2171 cov
->data
[bb
->dfn
].cil_code
= bb
->cil_code
;
2172 /* this is not thread save, but good enough */
2173 x86_inc_mem (code
, &cov
->data
[bb
->dfn
].count
);
2176 offset
= code
- cfg
->native_code
;
2178 mono_debug_open_block (cfg
, bb
, offset
);
2180 MONO_BB_FOR_EACH_INS (bb
, ins
) {
2181 offset
= code
- cfg
->native_code
;
2183 max_len
= ((guint8
*)ins_get_spec (ins
->opcode
))[MONO_INST_LEN
];
2185 if (G_UNLIKELY (offset
> (cfg
->code_size
- max_len
- 16))) {
2186 cfg
->code_size
*= 2;
2187 cfg
->native_code
= g_realloc (cfg
->native_code
, cfg
->code_size
);
2188 code
= cfg
->native_code
+ offset
;
2189 mono_jit_stats
.code_reallocs
++;
2192 if (cfg
->debug_info
)
2193 mono_debug_record_line_number (cfg
, ins
, offset
);
2195 switch (ins
->opcode
) {
2197 x86_mul_reg (code
, ins
->sreg2
, TRUE
);
2200 x86_mul_reg (code
, ins
->sreg2
, FALSE
);
2202 case OP_X86_SETEQ_MEMBASE
:
2203 case OP_X86_SETNE_MEMBASE
:
2204 x86_set_membase (code
, ins
->opcode
== OP_X86_SETEQ_MEMBASE
? X86_CC_EQ
: X86_CC_NE
,
2205 ins
->inst_basereg
, ins
->inst_offset
, TRUE
);
2207 case OP_STOREI1_MEMBASE_IMM
:
2208 x86_mov_membase_imm (code
, ins
->inst_destbasereg
, ins
->inst_offset
, ins
->inst_imm
, 1);
2210 case OP_STOREI2_MEMBASE_IMM
:
2211 x86_mov_membase_imm (code
, ins
->inst_destbasereg
, ins
->inst_offset
, ins
->inst_imm
, 2);
2213 case OP_STORE_MEMBASE_IMM
:
2214 case OP_STOREI4_MEMBASE_IMM
:
2215 x86_mov_membase_imm (code
, ins
->inst_destbasereg
, ins
->inst_offset
, ins
->inst_imm
, 4);
2217 case OP_STOREI1_MEMBASE_REG
:
2218 x86_mov_membase_reg (code
, ins
->inst_destbasereg
, ins
->inst_offset
, ins
->sreg1
, 1);
2220 case OP_STOREI2_MEMBASE_REG
:
2221 x86_mov_membase_reg (code
, ins
->inst_destbasereg
, ins
->inst_offset
, ins
->sreg1
, 2);
2223 case OP_STORE_MEMBASE_REG
:
2224 case OP_STOREI4_MEMBASE_REG
:
2225 x86_mov_membase_reg (code
, ins
->inst_destbasereg
, ins
->inst_offset
, ins
->sreg1
, 4);
2227 case OP_STORE_MEM_IMM
:
2228 x86_mov_mem_imm (code
, ins
->inst_p0
, ins
->inst_c0
, 4);
2231 x86_mov_reg_mem (code
, ins
->dreg
, ins
->inst_imm
, 4);
2235 /* These are created by the cprop pass so they use inst_imm as the source */
2236 x86_mov_reg_mem (code
, ins
->dreg
, ins
->inst_imm
, 4);
2239 x86_widen_mem (code
, ins
->dreg
, ins
->inst_imm
, FALSE
, FALSE
);
2242 x86_widen_mem (code
, ins
->dreg
, ins
->inst_imm
, FALSE
, TRUE
);
2244 case OP_LOAD_MEMBASE
:
2245 case OP_LOADI4_MEMBASE
:
2246 case OP_LOADU4_MEMBASE
:
2247 x86_mov_reg_membase (code
, ins
->dreg
, ins
->inst_basereg
, ins
->inst_offset
, 4);
2249 case OP_LOADU1_MEMBASE
:
2250 x86_widen_membase (code
, ins
->dreg
, ins
->inst_basereg
, ins
->inst_offset
, FALSE
, FALSE
);
2252 case OP_LOADI1_MEMBASE
:
2253 x86_widen_membase (code
, ins
->dreg
, ins
->inst_basereg
, ins
->inst_offset
, TRUE
, FALSE
);
2255 case OP_LOADU2_MEMBASE
:
2256 x86_widen_membase (code
, ins
->dreg
, ins
->inst_basereg
, ins
->inst_offset
, FALSE
, TRUE
);
2258 case OP_LOADI2_MEMBASE
:
2259 x86_widen_membase (code
, ins
->dreg
, ins
->inst_basereg
, ins
->inst_offset
, TRUE
, TRUE
);
2261 case OP_ICONV_TO_I1
:
2263 x86_widen_reg (code
, ins
->dreg
, ins
->sreg1
, TRUE
, FALSE
);
2265 case OP_ICONV_TO_I2
:
2267 x86_widen_reg (code
, ins
->dreg
, ins
->sreg1
, TRUE
, TRUE
);
2269 case OP_ICONV_TO_U1
:
2270 x86_widen_reg (code
, ins
->dreg
, ins
->sreg1
, FALSE
, FALSE
);
2272 case OP_ICONV_TO_U2
:
2273 x86_widen_reg (code
, ins
->dreg
, ins
->sreg1
, FALSE
, TRUE
);
2277 x86_alu_reg_reg (code
, X86_CMP
, ins
->sreg1
, ins
->sreg2
);
2279 case OP_COMPARE_IMM
:
2280 case OP_ICOMPARE_IMM
:
2281 x86_alu_reg_imm (code
, X86_CMP
, ins
->sreg1
, ins
->inst_imm
);
2283 case OP_X86_COMPARE_MEMBASE_REG
:
2284 x86_alu_membase_reg (code
, X86_CMP
, ins
->inst_basereg
, ins
->inst_offset
, ins
->sreg2
);
2286 case OP_X86_COMPARE_MEMBASE_IMM
:
2287 x86_alu_membase_imm (code
, X86_CMP
, ins
->inst_basereg
, ins
->inst_offset
, ins
->inst_imm
);
2289 case OP_X86_COMPARE_MEMBASE8_IMM
:
2290 x86_alu_membase8_imm (code
, X86_CMP
, ins
->inst_basereg
, ins
->inst_offset
, ins
->inst_imm
);
2292 case OP_X86_COMPARE_REG_MEMBASE
:
2293 x86_alu_reg_membase (code
, X86_CMP
, ins
->sreg1
, ins
->sreg2
, ins
->inst_offset
);
2295 case OP_X86_COMPARE_MEM_IMM
:
2296 x86_alu_mem_imm (code
, X86_CMP
, ins
->inst_offset
, ins
->inst_imm
);
2298 case OP_X86_TEST_NULL
:
2299 x86_test_reg_reg (code
, ins
->sreg1
, ins
->sreg1
);
2301 case OP_X86_ADD_MEMBASE_IMM
:
2302 x86_alu_membase_imm (code
, X86_ADD
, ins
->inst_basereg
, ins
->inst_offset
, ins
->inst_imm
);
2304 case OP_X86_ADD_REG_MEMBASE
:
2305 x86_alu_reg_membase (code
, X86_ADD
, ins
->sreg1
, ins
->sreg2
, ins
->inst_offset
);
2307 case OP_X86_SUB_MEMBASE_IMM
:
2308 x86_alu_membase_imm (code
, X86_SUB
, ins
->inst_basereg
, ins
->inst_offset
, ins
->inst_imm
);
2310 case OP_X86_SUB_REG_MEMBASE
:
2311 x86_alu_reg_membase (code
, X86_SUB
, ins
->sreg1
, ins
->sreg2
, ins
->inst_offset
);
2313 case OP_X86_AND_MEMBASE_IMM
:
2314 x86_alu_membase_imm (code
, X86_AND
, ins
->inst_basereg
, ins
->inst_offset
, ins
->inst_imm
);
2316 case OP_X86_OR_MEMBASE_IMM
:
2317 x86_alu_membase_imm (code
, X86_OR
, ins
->inst_basereg
, ins
->inst_offset
, ins
->inst_imm
);
2319 case OP_X86_XOR_MEMBASE_IMM
:
2320 x86_alu_membase_imm (code
, X86_XOR
, ins
->inst_basereg
, ins
->inst_offset
, ins
->inst_imm
);
2322 case OP_X86_ADD_MEMBASE_REG
:
2323 x86_alu_membase_reg (code
, X86_ADD
, ins
->inst_basereg
, ins
->inst_offset
, ins
->sreg2
);
2325 case OP_X86_SUB_MEMBASE_REG
:
2326 x86_alu_membase_reg (code
, X86_SUB
, ins
->inst_basereg
, ins
->inst_offset
, ins
->sreg2
);
2328 case OP_X86_AND_MEMBASE_REG
:
2329 x86_alu_membase_reg (code
, X86_AND
, ins
->inst_basereg
, ins
->inst_offset
, ins
->sreg2
);
2331 case OP_X86_OR_MEMBASE_REG
:
2332 x86_alu_membase_reg (code
, X86_OR
, ins
->inst_basereg
, ins
->inst_offset
, ins
->sreg2
);
2334 case OP_X86_XOR_MEMBASE_REG
:
2335 x86_alu_membase_reg (code
, X86_XOR
, ins
->inst_basereg
, ins
->inst_offset
, ins
->sreg2
);
2337 case OP_X86_INC_MEMBASE
:
2338 x86_inc_membase (code
, ins
->inst_basereg
, ins
->inst_offset
);
2340 case OP_X86_INC_REG
:
2341 x86_inc_reg (code
, ins
->dreg
);
2343 case OP_X86_DEC_MEMBASE
:
2344 x86_dec_membase (code
, ins
->inst_basereg
, ins
->inst_offset
);
2346 case OP_X86_DEC_REG
:
2347 x86_dec_reg (code
, ins
->dreg
);
2349 case OP_X86_MUL_REG_MEMBASE
:
2350 x86_imul_reg_membase (code
, ins
->sreg1
, ins
->sreg2
, ins
->inst_offset
);
2352 case OP_X86_AND_REG_MEMBASE
:
2353 x86_alu_reg_membase (code
, X86_AND
, ins
->sreg1
, ins
->sreg2
, ins
->inst_offset
);
2355 case OP_X86_OR_REG_MEMBASE
:
2356 x86_alu_reg_membase (code
, X86_OR
, ins
->sreg1
, ins
->sreg2
, ins
->inst_offset
);
2358 case OP_X86_XOR_REG_MEMBASE
:
2359 x86_alu_reg_membase (code
, X86_XOR
, ins
->sreg1
, ins
->sreg2
, ins
->inst_offset
);
2362 x86_breakpoint (code
);
2364 case OP_RELAXED_NOP
:
2365 x86_prefix (code
, X86_REP_PREFIX
);
2373 case OP_DUMMY_STORE
:
2374 case OP_NOT_REACHED
:
2377 case OP_SEQ_POINT
: {
2380 if (cfg
->compile_aot
)
2384 * Read from the single stepping trigger page. This will cause a
2385 * SIGSEGV when single stepping is enabled.
2386 * We do this _before_ the breakpoint, so single stepping after
2387 * a breakpoint is hit will step to the next IL offset.
2389 if (ins
->flags
& MONO_INST_SINGLE_STEP_LOC
)
2390 x86_alu_reg_mem (code
, X86_CMP
, X86_EAX
, (guint32
)ss_trigger_page
);
2392 mono_add_seq_point (cfg
, bb
, ins
, code
- cfg
->native_code
);
2395 * A placeholder for a possible breakpoint inserted by
2396 * mono_arch_set_breakpoint ().
2398 for (i
= 0; i
< 6; ++i
)
2405 x86_alu_reg_reg (code
, X86_ADD
, ins
->sreg1
, ins
->sreg2
);
2409 x86_alu_reg_reg (code
, X86_ADC
, ins
->sreg1
, ins
->sreg2
);
2414 x86_alu_reg_imm (code
, X86_ADD
, ins
->dreg
, ins
->inst_imm
);
2418 x86_alu_reg_imm (code
, X86_ADC
, ins
->dreg
, ins
->inst_imm
);
2423 x86_alu_reg_reg (code
, X86_SUB
, ins
->sreg1
, ins
->sreg2
);
2427 x86_alu_reg_reg (code
, X86_SBB
, ins
->sreg1
, ins
->sreg2
);
2432 x86_alu_reg_imm (code
, X86_SUB
, ins
->dreg
, ins
->inst_imm
);
2436 x86_alu_reg_imm (code
, X86_SBB
, ins
->dreg
, ins
->inst_imm
);
2439 x86_alu_reg_reg (code
, X86_AND
, ins
->sreg1
, ins
->sreg2
);
2443 x86_alu_reg_imm (code
, X86_AND
, ins
->sreg1
, ins
->inst_imm
);
2448 * The code is the same for div/rem, the allocator will allocate dreg
2449 * to RAX/RDX as appropriate.
2451 if (ins
->sreg2
== X86_EDX
) {
2452 /* cdq clobbers this */
2453 x86_push_reg (code
, ins
->sreg2
);
2455 x86_div_membase (code
, X86_ESP
, 0, TRUE
);
2456 x86_alu_reg_imm (code
, X86_ADD
, X86_ESP
, 4);
2459 x86_div_reg (code
, ins
->sreg2
, TRUE
);
2464 if (ins
->sreg2
== X86_EDX
) {
2465 x86_push_reg (code
, ins
->sreg2
);
2466 x86_alu_reg_reg (code
, X86_XOR
, X86_EDX
, X86_EDX
);
2467 x86_div_membase (code
, X86_ESP
, 0, FALSE
);
2468 x86_alu_reg_imm (code
, X86_ADD
, X86_ESP
, 4);
2470 x86_alu_reg_reg (code
, X86_XOR
, X86_EDX
, X86_EDX
);
2471 x86_div_reg (code
, ins
->sreg2
, FALSE
);
2475 x86_mov_reg_imm (code
, ins
->sreg2
, ins
->inst_imm
);
2477 x86_div_reg (code
, ins
->sreg2
, TRUE
);
2480 int power
= mono_is_power_of_two (ins
->inst_imm
);
2482 g_assert (ins
->sreg1
== X86_EAX
);
2483 g_assert (ins
->dreg
== X86_EAX
);
2484 g_assert (power
>= 0);
2487 /* Based on http://compilers.iecc.com/comparch/article/93-04-079 */
2489 x86_alu_reg_imm (code
, X86_AND
, X86_EAX
, 1);
2491 * If the divident is >= 0, this does not nothing. If it is positive, it
2492 * it transforms %eax=0 into %eax=0, and %eax=1 into %eax=-1.
2494 x86_alu_reg_reg (code
, X86_XOR
, X86_EAX
, X86_EDX
);
2495 x86_alu_reg_reg (code
, X86_SUB
, X86_EAX
, X86_EDX
);
2496 } else if (power
== 0) {
2497 x86_alu_reg_reg (code
, X86_XOR
, ins
->dreg
, ins
->dreg
);
2499 /* Based on gcc code */
2501 /* Add compensation for negative dividents */
2503 x86_shift_reg_imm (code
, X86_SHR
, X86_EDX
, 32 - power
);
2504 x86_alu_reg_reg (code
, X86_ADD
, X86_EAX
, X86_EDX
);
2505 /* Compute remainder */
2506 x86_alu_reg_imm (code
, X86_AND
, X86_EAX
, (1 << power
) - 1);
2507 /* Remove compensation */
2508 x86_alu_reg_reg (code
, X86_SUB
, X86_EAX
, X86_EDX
);
2513 x86_alu_reg_reg (code
, X86_OR
, ins
->sreg1
, ins
->sreg2
);
2517 x86_alu_reg_imm (code
, X86_OR
, ins
->sreg1
, ins
->inst_imm
);
2520 x86_alu_reg_reg (code
, X86_XOR
, ins
->sreg1
, ins
->sreg2
);
2524 x86_alu_reg_imm (code
, X86_XOR
, ins
->sreg1
, ins
->inst_imm
);
2527 g_assert (ins
->sreg2
== X86_ECX
);
2528 x86_shift_reg (code
, X86_SHL
, ins
->dreg
);
2531 g_assert (ins
->sreg2
== X86_ECX
);
2532 x86_shift_reg (code
, X86_SAR
, ins
->dreg
);
2536 x86_shift_reg_imm (code
, X86_SAR
, ins
->dreg
, ins
->inst_imm
);
2539 case OP_ISHR_UN_IMM
:
2540 x86_shift_reg_imm (code
, X86_SHR
, ins
->dreg
, ins
->inst_imm
);
2543 g_assert (ins
->sreg2
== X86_ECX
);
2544 x86_shift_reg (code
, X86_SHR
, ins
->dreg
);
2548 x86_shift_reg_imm (code
, X86_SHL
, ins
->dreg
, ins
->inst_imm
);
2551 guint8
*jump_to_end
;
2553 /* handle shifts below 32 bits */
2554 x86_shld_reg (code
, ins
->backend
.reg3
, ins
->sreg1
);
2555 x86_shift_reg (code
, X86_SHL
, ins
->sreg1
);
2557 x86_test_reg_imm (code
, X86_ECX
, 32);
2558 jump_to_end
= code
; x86_branch8 (code
, X86_CC_EQ
, 0, TRUE
);
2560 /* handle shift over 32 bit */
2561 x86_mov_reg_reg (code
, ins
->backend
.reg3
, ins
->sreg1
, 4);
2562 x86_clear_reg (code
, ins
->sreg1
);
2564 x86_patch (jump_to_end
, code
);
2568 guint8
*jump_to_end
;
2570 /* handle shifts below 32 bits */
2571 x86_shrd_reg (code
, ins
->sreg1
, ins
->backend
.reg3
);
2572 x86_shift_reg (code
, X86_SAR
, ins
->backend
.reg3
);
2574 x86_test_reg_imm (code
, X86_ECX
, 32);
2575 jump_to_end
= code
; x86_branch8 (code
, X86_CC_EQ
, 0, FALSE
);
2577 /* handle shifts over 31 bits */
2578 x86_mov_reg_reg (code
, ins
->sreg1
, ins
->backend
.reg3
, 4);
2579 x86_shift_reg_imm (code
, X86_SAR
, ins
->backend
.reg3
, 31);
2581 x86_patch (jump_to_end
, code
);
2585 guint8
*jump_to_end
;
2587 /* handle shifts below 32 bits */
2588 x86_shrd_reg (code
, ins
->sreg1
, ins
->backend
.reg3
);
2589 x86_shift_reg (code
, X86_SHR
, ins
->backend
.reg3
);
2591 x86_test_reg_imm (code
, X86_ECX
, 32);
2592 jump_to_end
= code
; x86_branch8 (code
, X86_CC_EQ
, 0, FALSE
);
2594 /* handle shifts over 31 bits */
2595 x86_mov_reg_reg (code
, ins
->sreg1
, ins
->backend
.reg3
, 4);
2596 x86_clear_reg (code
, ins
->backend
.reg3
);
2598 x86_patch (jump_to_end
, code
);
2602 if (ins
->inst_imm
>= 32) {
2603 x86_mov_reg_reg (code
, ins
->backend
.reg3
, ins
->sreg1
, 4);
2604 x86_clear_reg (code
, ins
->sreg1
);
2605 x86_shift_reg_imm (code
, X86_SHL
, ins
->backend
.reg3
, ins
->inst_imm
- 32);
2607 x86_shld_reg_imm (code
, ins
->backend
.reg3
, ins
->sreg1
, ins
->inst_imm
);
2608 x86_shift_reg_imm (code
, X86_SHL
, ins
->sreg1
, ins
->inst_imm
);
2612 if (ins
->inst_imm
>= 32) {
2613 x86_mov_reg_reg (code
, ins
->sreg1
, ins
->backend
.reg3
, 4);
2614 x86_shift_reg_imm (code
, X86_SAR
, ins
->backend
.reg3
, 0x1f);
2615 x86_shift_reg_imm (code
, X86_SAR
, ins
->sreg1
, ins
->inst_imm
- 32);
2617 x86_shrd_reg_imm (code
, ins
->sreg1
, ins
->backend
.reg3
, ins
->inst_imm
);
2618 x86_shift_reg_imm (code
, X86_SAR
, ins
->backend
.reg3
, ins
->inst_imm
);
2621 case OP_LSHR_UN_IMM
:
2622 if (ins
->inst_imm
>= 32) {
2623 x86_mov_reg_reg (code
, ins
->sreg1
, ins
->backend
.reg3
, 4);
2624 x86_clear_reg (code
, ins
->backend
.reg3
);
2625 x86_shift_reg_imm (code
, X86_SHR
, ins
->sreg1
, ins
->inst_imm
- 32);
2627 x86_shrd_reg_imm (code
, ins
->sreg1
, ins
->backend
.reg3
, ins
->inst_imm
);
2628 x86_shift_reg_imm (code
, X86_SHR
, ins
->backend
.reg3
, ins
->inst_imm
);
2632 x86_not_reg (code
, ins
->sreg1
);
2635 x86_neg_reg (code
, ins
->sreg1
);
2639 x86_imul_reg_reg (code
, ins
->sreg1
, ins
->sreg2
);
2643 switch (ins
->inst_imm
) {
2647 if (ins
->dreg
!= ins
->sreg1
)
2648 x86_mov_reg_reg (code
, ins
->dreg
, ins
->sreg1
, 4);
2649 x86_alu_reg_reg (code
, X86_ADD
, ins
->dreg
, ins
->dreg
);
2652 /* LEA r1, [r2 + r2*2] */
2653 x86_lea_memindex (code
, ins
->dreg
, ins
->sreg1
, 0, ins
->sreg1
, 1);
2656 /* LEA r1, [r2 + r2*4] */
2657 x86_lea_memindex (code
, ins
->dreg
, ins
->sreg1
, 0, ins
->sreg1
, 2);
2660 /* LEA r1, [r2 + r2*2] */
2662 x86_lea_memindex (code
, ins
->dreg
, ins
->sreg1
, 0, ins
->sreg1
, 1);
2663 x86_alu_reg_reg (code
, X86_ADD
, ins
->dreg
, ins
->dreg
);
2666 /* LEA r1, [r2 + r2*8] */
2667 x86_lea_memindex (code
, ins
->dreg
, ins
->sreg1
, 0, ins
->sreg1
, 3);
2670 /* LEA r1, [r2 + r2*4] */
2672 x86_lea_memindex (code
, ins
->dreg
, ins
->sreg1
, 0, ins
->sreg1
, 2);
2673 x86_alu_reg_reg (code
, X86_ADD
, ins
->dreg
, ins
->dreg
);
2676 /* LEA r1, [r2 + r2*2] */
2678 x86_lea_memindex (code
, ins
->dreg
, ins
->sreg1
, 0, ins
->sreg1
, 1);
2679 x86_shift_reg_imm (code
, X86_SHL
, ins
->dreg
, 2);
2682 /* LEA r1, [r2 + r2*4] */
2683 /* LEA r1, [r1 + r1*4] */
2684 x86_lea_memindex (code
, ins
->dreg
, ins
->sreg1
, 0, ins
->sreg1
, 2);
2685 x86_lea_memindex (code
, ins
->dreg
, ins
->dreg
, 0, ins
->dreg
, 2);
2688 /* LEA r1, [r2 + r2*4] */
2690 /* LEA r1, [r1 + r1*4] */
2691 x86_lea_memindex (code
, ins
->dreg
, ins
->sreg1
, 0, ins
->sreg1
, 2);
2692 x86_shift_reg_imm (code
, X86_SHL
, ins
->dreg
, 2);
2693 x86_lea_memindex (code
, ins
->dreg
, ins
->dreg
, 0, ins
->dreg
, 2);
2696 x86_imul_reg_reg_imm (code
, ins
->dreg
, ins
->sreg1
, ins
->inst_imm
);
2701 x86_imul_reg_reg (code
, ins
->sreg1
, ins
->sreg2
);
2702 EMIT_COND_SYSTEM_EXCEPTION (X86_CC_O
, FALSE
, "OverflowException");
2704 case OP_IMUL_OVF_UN
: {
2705 /* the mul operation and the exception check should most likely be split */
2706 int non_eax_reg
, saved_eax
= FALSE
, saved_edx
= FALSE
;
2707 /*g_assert (ins->sreg2 == X86_EAX);
2708 g_assert (ins->dreg == X86_EAX);*/
2709 if (ins
->sreg2
== X86_EAX
) {
2710 non_eax_reg
= ins
->sreg1
;
2711 } else if (ins
->sreg1
== X86_EAX
) {
2712 non_eax_reg
= ins
->sreg2
;
2714 /* no need to save since we're going to store to it anyway */
2715 if (ins
->dreg
!= X86_EAX
) {
2717 x86_push_reg (code
, X86_EAX
);
2719 x86_mov_reg_reg (code
, X86_EAX
, ins
->sreg1
, 4);
2720 non_eax_reg
= ins
->sreg2
;
2722 if (ins
->dreg
== X86_EDX
) {
2725 x86_push_reg (code
, X86_EAX
);
2727 } else if (ins
->dreg
!= X86_EAX
) {
2729 x86_push_reg (code
, X86_EDX
);
2731 x86_mul_reg (code
, non_eax_reg
, FALSE
);
2732 /* save before the check since pop and mov don't change the flags */
2733 if (ins
->dreg
!= X86_EAX
)
2734 x86_mov_reg_reg (code
, ins
->dreg
, X86_EAX
, 4);
2736 x86_pop_reg (code
, X86_EDX
);
2738 x86_pop_reg (code
, X86_EAX
);
2739 EMIT_COND_SYSTEM_EXCEPTION (X86_CC_O
, FALSE
, "OverflowException");
2743 x86_mov_reg_imm (code
, ins
->dreg
, ins
->inst_c0
);
2746 g_assert_not_reached ();
2747 mono_add_patch_info (cfg
, offset
, (MonoJumpInfoType
)ins
->inst_i1
, ins
->inst_p0
);
2748 x86_mov_reg_imm (code
, ins
->dreg
, 0);
2751 mono_add_patch_info (cfg
, offset
, (MonoJumpInfoType
)ins
->inst_i1
, ins
->inst_p0
);
2752 x86_mov_reg_imm (code
, ins
->dreg
, 0);
2754 case OP_LOAD_GOTADDR
:
2755 x86_call_imm (code
, 0);
2757 * The patch needs to point to the pop, since the GOT offset needs
2758 * to be added to that address.
2760 mono_add_patch_info (cfg
, code
- cfg
->native_code
, MONO_PATCH_INFO_GOT_OFFSET
, NULL
);
2761 x86_pop_reg (code
, ins
->dreg
);
2762 x86_alu_reg_imm (code
, X86_ADD
, ins
->dreg
, 0xf0f0f0f0);
2765 mono_add_patch_info (cfg
, offset
, (MonoJumpInfoType
)ins
->inst_right
->inst_i1
, ins
->inst_right
->inst_p0
);
2766 x86_mov_reg_membase (code
, ins
->dreg
, ins
->inst_basereg
, 0xf0f0f0f0, 4);
2768 case OP_X86_PUSH_GOT_ENTRY
:
2769 mono_add_patch_info (cfg
, offset
, (MonoJumpInfoType
)ins
->inst_right
->inst_i1
, ins
->inst_right
->inst_p0
);
2770 x86_push_membase (code
, ins
->inst_basereg
, 0xf0f0f0f0);
2773 x86_mov_reg_reg (code
, ins
->dreg
, ins
->sreg1
, 4);
2777 * Note: this 'frame destruction' logic is useful for tail calls, too.
2778 * Keep in sync with the code in emit_epilog.
2782 /* FIXME: no tracing support... */
2783 if (cfg
->prof_options
& MONO_PROFILE_ENTER_LEAVE
)
2784 code
= mono_arch_instrument_epilog (cfg
, mono_profiler_method_leave
, code
, FALSE
);
2785 /* reset offset to make max_len work */
2786 offset
= code
- cfg
->native_code
;
2788 g_assert (!cfg
->method
->save_lmf
);
2790 code
= emit_load_volatile_arguments (cfg
, code
);
2792 if (cfg
->used_int_regs
& (1 << X86_EBX
))
2794 if (cfg
->used_int_regs
& (1 << X86_EDI
))
2796 if (cfg
->used_int_regs
& (1 << X86_ESI
))
2799 x86_lea_membase (code
, X86_ESP
, X86_EBP
, pos
);
2801 if (cfg
->used_int_regs
& (1 << X86_ESI
))
2802 x86_pop_reg (code
, X86_ESI
);
2803 if (cfg
->used_int_regs
& (1 << X86_EDI
))
2804 x86_pop_reg (code
, X86_EDI
);
2805 if (cfg
->used_int_regs
& (1 << X86_EBX
))
2806 x86_pop_reg (code
, X86_EBX
);
2808 /* restore ESP/EBP */
2810 offset
= code
- cfg
->native_code
;
2811 mono_add_patch_info (cfg
, offset
, MONO_PATCH_INFO_METHOD_JUMP
, ins
->inst_p0
);
2812 x86_jump32 (code
, 0);
2814 cfg
->disable_aot
= TRUE
;
2818 /* ensure ins->sreg1 is not NULL
2819 * note that cmp DWORD PTR [eax], eax is one byte shorter than
2820 * cmp DWORD PTR [eax], 0
2822 x86_alu_membase_reg (code
, X86_CMP
, ins
->sreg1
, 0, ins
->sreg1
);
2825 int hreg
= ins
->sreg1
== X86_EAX
? X86_ECX
: X86_EAX
;
2826 x86_push_reg (code
, hreg
);
2827 x86_lea_membase (code
, hreg
, X86_EBP
, cfg
->sig_cookie
);
2828 x86_mov_membase_reg (code
, ins
->sreg1
, 0, hreg
, 4);
2829 x86_pop_reg (code
, hreg
);
2838 call
= (MonoCallInst
*)ins
;
2839 if (ins
->flags
& MONO_INST_HAS_METHOD
)
2840 code
= emit_call (cfg
, code
, MONO_PATCH_INFO_METHOD
, call
->method
);
2842 code
= emit_call (cfg
, code
, MONO_PATCH_INFO_ABS
, call
->fptr
);
2843 if (call
->stack_usage
&& !CALLCONV_IS_STDCALL (call
->signature
)) {
2844 /* a pop is one byte, while an add reg, imm is 3. So if there are 4 or 8
2845 * bytes to pop, we want to use pops. GCC does this (note it won't happen
2846 * for P4 or i686 because gcc will avoid using pop push at all. But we aren't
2847 * smart enough to do that optimization yet
2849 * It turns out that on my P4, doing two pops for 8 bytes on the stack makes
2850 * mcs botstrap slow down. However, doing 1 pop for 4 bytes creates a small,
2851 * (most likely from locality benefits). People with other processors should
2852 * check on theirs to see what happens.
2854 if (call
->stack_usage
== 4) {
2855 /* we want to use registers that won't get used soon, so use
2856 * ecx, as eax will get allocated first. edx is used by long calls,
2857 * so we can't use that.
2860 x86_pop_reg (code
, X86_ECX
);
2862 x86_alu_reg_imm (code
, X86_ADD
, X86_ESP
, call
->stack_usage
);
2865 code
= emit_move_return_value (cfg
, ins
, code
);
2871 case OP_VOIDCALL_REG
:
2873 call
= (MonoCallInst
*)ins
;
2874 x86_call_reg (code
, ins
->sreg1
);
2875 if (call
->stack_usage
&& !CALLCONV_IS_STDCALL (call
->signature
)) {
2876 if (call
->stack_usage
== 4)
2877 x86_pop_reg (code
, X86_ECX
);
2879 x86_alu_reg_imm (code
, X86_ADD
, X86_ESP
, call
->stack_usage
);
2881 code
= emit_move_return_value (cfg
, ins
, code
);
2883 case OP_FCALL_MEMBASE
:
2884 case OP_LCALL_MEMBASE
:
2885 case OP_VCALL_MEMBASE
:
2886 case OP_VCALL2_MEMBASE
:
2887 case OP_VOIDCALL_MEMBASE
:
2888 case OP_CALL_MEMBASE
:
2889 call
= (MonoCallInst
*)ins
;
2892 * Emit a few nops to simplify get_vcall_slot ().
2898 x86_call_membase (code
, ins
->sreg1
, ins
->inst_offset
);
2899 if (call
->stack_usage
&& !CALLCONV_IS_STDCALL (call
->signature
)) {
2900 if (call
->stack_usage
== 4)
2901 x86_pop_reg (code
, X86_ECX
);
2903 x86_alu_reg_imm (code
, X86_ADD
, X86_ESP
, call
->stack_usage
);
2905 code
= emit_move_return_value (cfg
, ins
, code
);
2908 x86_push_reg (code
, ins
->sreg1
);
2910 case OP_X86_PUSH_IMM
:
2911 x86_push_imm (code
, ins
->inst_imm
);
2913 case OP_X86_PUSH_MEMBASE
:
2914 x86_push_membase (code
, ins
->inst_basereg
, ins
->inst_offset
);
2916 case OP_X86_PUSH_OBJ
:
2917 x86_alu_reg_imm (code
, X86_SUB
, X86_ESP
, ins
->inst_imm
);
2918 x86_push_reg (code
, X86_EDI
);
2919 x86_push_reg (code
, X86_ESI
);
2920 x86_push_reg (code
, X86_ECX
);
2921 if (ins
->inst_offset
)
2922 x86_lea_membase (code
, X86_ESI
, ins
->inst_basereg
, ins
->inst_offset
);
2924 x86_mov_reg_reg (code
, X86_ESI
, ins
->inst_basereg
, 4);
2925 x86_lea_membase (code
, X86_EDI
, X86_ESP
, 12);
2926 x86_mov_reg_imm (code
, X86_ECX
, (ins
->inst_imm
>> 2));
2928 x86_prefix (code
, X86_REP_PREFIX
);
2930 x86_pop_reg (code
, X86_ECX
);
2931 x86_pop_reg (code
, X86_ESI
);
2932 x86_pop_reg (code
, X86_EDI
);
2935 x86_lea_memindex (code
, ins
->dreg
, ins
->sreg1
, ins
->inst_imm
, ins
->sreg2
, ins
->backend
.shift_amount
);
2937 case OP_X86_LEA_MEMBASE
:
2938 x86_lea_membase (code
, ins
->dreg
, ins
->sreg1
, ins
->inst_imm
);
2941 x86_xchg_reg_reg (code
, ins
->sreg1
, ins
->sreg2
, 4);
2944 /* keep alignment */
2945 x86_alu_reg_imm (code
, X86_ADD
, ins
->sreg1
, MONO_ARCH_LOCALLOC_ALIGNMENT
- 1);
2946 x86_alu_reg_imm (code
, X86_AND
, ins
->sreg1
, ~(MONO_ARCH_LOCALLOC_ALIGNMENT
- 1));
2947 code
= mono_emit_stack_alloc (code
, ins
);
2948 x86_mov_reg_reg (code
, ins
->dreg
, X86_ESP
, 4);
2950 case OP_LOCALLOC_IMM
: {
2951 guint32 size
= ins
->inst_imm
;
2952 size
= (size
+ (MONO_ARCH_FRAME_ALIGNMENT
- 1)) & ~ (MONO_ARCH_FRAME_ALIGNMENT
- 1);
2954 if (ins
->flags
& MONO_INST_INIT
) {
2955 /* FIXME: Optimize this */
2956 x86_mov_reg_imm (code
, ins
->dreg
, size
);
2957 ins
->sreg1
= ins
->dreg
;
2959 code
= mono_emit_stack_alloc (code
, ins
);
2960 x86_mov_reg_reg (code
, ins
->dreg
, X86_ESP
, 4);
2962 x86_alu_reg_imm (code
, X86_SUB
, X86_ESP
, size
);
2963 x86_mov_reg_reg (code
, ins
->dreg
, X86_ESP
, 4);
2968 x86_alu_reg_imm (code
, X86_SUB
, X86_ESP
, MONO_ARCH_FRAME_ALIGNMENT
- 4);
2969 x86_push_reg (code
, ins
->sreg1
);
2970 code
= emit_call (cfg
, code
, MONO_PATCH_INFO_INTERNAL_METHOD
,
2971 (gpointer
)"mono_arch_throw_exception");
2975 x86_alu_reg_imm (code
, X86_SUB
, X86_ESP
, MONO_ARCH_FRAME_ALIGNMENT
- 4);
2976 x86_push_reg (code
, ins
->sreg1
);
2977 code
= emit_call (cfg
, code
, MONO_PATCH_INFO_INTERNAL_METHOD
,
2978 (gpointer
)"mono_arch_rethrow_exception");
2981 case OP_CALL_HANDLER
:
2982 x86_alu_reg_imm (code
, X86_SUB
, X86_ESP
, MONO_ARCH_FRAME_ALIGNMENT
- 4);
2983 mono_add_patch_info (cfg
, code
- cfg
->native_code
, MONO_PATCH_INFO_BB
, ins
->inst_target_bb
);
2984 x86_call_imm (code
, 0);
2985 x86_alu_reg_imm (code
, X86_ADD
, X86_ESP
, MONO_ARCH_FRAME_ALIGNMENT
- 4);
2987 case OP_START_HANDLER
: {
2988 MonoInst
*spvar
= mono_find_spvar_for_region (cfg
, bb
->region
);
2989 x86_mov_membase_reg (code
, spvar
->inst_basereg
, spvar
->inst_offset
, X86_ESP
, 4);
2992 case OP_ENDFINALLY
: {
2993 MonoInst
*spvar
= mono_find_spvar_for_region (cfg
, bb
->region
);
2994 x86_mov_reg_membase (code
, X86_ESP
, spvar
->inst_basereg
, spvar
->inst_offset
, 4);
2998 case OP_ENDFILTER
: {
2999 MonoInst
*spvar
= mono_find_spvar_for_region (cfg
, bb
->region
);
3000 x86_mov_reg_membase (code
, X86_ESP
, spvar
->inst_basereg
, spvar
->inst_offset
, 4);
3001 /* The local allocator will put the result into EAX */
3007 ins
->inst_c0
= code
- cfg
->native_code
;
3010 if (ins
->inst_target_bb
->native_offset
) {
3011 x86_jump_code (code
, cfg
->native_code
+ ins
->inst_target_bb
->native_offset
);
3013 mono_add_patch_info (cfg
, offset
, MONO_PATCH_INFO_BB
, ins
->inst_target_bb
);
3014 if ((cfg
->opt
& MONO_OPT_BRANCH
) &&
3015 x86_is_imm8 (ins
->inst_target_bb
->max_offset
- cpos
))
3016 x86_jump8 (code
, 0);
3018 x86_jump32 (code
, 0);
3022 x86_jump_reg (code
, ins
->sreg1
);
3035 x86_set_reg (code
, cc_table
[mono_opcode_to_cond (ins
->opcode
)], ins
->dreg
, cc_signed_table
[mono_opcode_to_cond (ins
->opcode
)]);
3036 x86_widen_reg (code
, ins
->dreg
, ins
->dreg
, FALSE
, FALSE
);
3038 case OP_COND_EXC_EQ
:
3039 case OP_COND_EXC_NE_UN
:
3040 case OP_COND_EXC_LT
:
3041 case OP_COND_EXC_LT_UN
:
3042 case OP_COND_EXC_GT
:
3043 case OP_COND_EXC_GT_UN
:
3044 case OP_COND_EXC_GE
:
3045 case OP_COND_EXC_GE_UN
:
3046 case OP_COND_EXC_LE
:
3047 case OP_COND_EXC_LE_UN
:
3048 case OP_COND_EXC_IEQ
:
3049 case OP_COND_EXC_INE_UN
:
3050 case OP_COND_EXC_ILT
:
3051 case OP_COND_EXC_ILT_UN
:
3052 case OP_COND_EXC_IGT
:
3053 case OP_COND_EXC_IGT_UN
:
3054 case OP_COND_EXC_IGE
:
3055 case OP_COND_EXC_IGE_UN
:
3056 case OP_COND_EXC_ILE
:
3057 case OP_COND_EXC_ILE_UN
:
3058 EMIT_COND_SYSTEM_EXCEPTION (cc_table
[mono_opcode_to_cond (ins
->opcode
)], cc_signed_table
[mono_opcode_to_cond (ins
->opcode
)], ins
->inst_p1
);
3060 case OP_COND_EXC_OV
:
3061 case OP_COND_EXC_NO
:
3063 case OP_COND_EXC_NC
:
3064 EMIT_COND_SYSTEM_EXCEPTION (branch_cc_table
[ins
->opcode
- OP_COND_EXC_EQ
], (ins
->opcode
< OP_COND_EXC_NE_UN
), ins
->inst_p1
);
3066 case OP_COND_EXC_IOV
:
3067 case OP_COND_EXC_INO
:
3068 case OP_COND_EXC_IC
:
3069 case OP_COND_EXC_INC
:
3070 EMIT_COND_SYSTEM_EXCEPTION (branch_cc_table
[ins
->opcode
- OP_COND_EXC_IEQ
], (ins
->opcode
< OP_COND_EXC_INE_UN
), ins
->inst_p1
);
3082 EMIT_COND_BRANCH (ins
, cc_table
[mono_opcode_to_cond (ins
->opcode
)], cc_signed_table
[mono_opcode_to_cond (ins
->opcode
)]);
3090 case OP_CMOV_INE_UN
:
3091 case OP_CMOV_IGE_UN
:
3092 case OP_CMOV_IGT_UN
:
3093 case OP_CMOV_ILE_UN
:
3094 case OP_CMOV_ILT_UN
:
3095 g_assert (ins
->dreg
== ins
->sreg1
);
3096 x86_cmov_reg (code
, cc_table
[mono_opcode_to_cond (ins
->opcode
)], cc_signed_table
[mono_opcode_to_cond (ins
->opcode
)], ins
->dreg
, ins
->sreg2
);
3099 /* floating point opcodes */
3101 double d
= *(double *)ins
->inst_p0
;
3103 if ((d
== 0.0) && (mono_signbit (d
) == 0)) {
3105 } else if (d
== 1.0) {
3108 if (cfg
->compile_aot
) {
3109 guint32
*val
= (guint32
*)&d
;
3110 x86_push_imm (code
, val
[1]);
3111 x86_push_imm (code
, val
[0]);
3112 x86_fld_membase (code
, X86_ESP
, 0, TRUE
);
3113 x86_alu_reg_imm (code
, X86_ADD
, X86_ESP
, 8);
3116 mono_add_patch_info (cfg
, code
- cfg
->native_code
, MONO_PATCH_INFO_R8
, ins
->inst_p0
);
3117 x86_fld (code
, NULL
, TRUE
);
3123 float f
= *(float *)ins
->inst_p0
;
3125 if ((f
== 0.0) && (mono_signbit (f
) == 0)) {
3127 } else if (f
== 1.0) {
3130 if (cfg
->compile_aot
) {
3131 guint32 val
= *(guint32
*)&f
;
3132 x86_push_imm (code
, val
);
3133 x86_fld_membase (code
, X86_ESP
, 0, FALSE
);
3134 x86_alu_reg_imm (code
, X86_ADD
, X86_ESP
, 4);
3137 mono_add_patch_info (cfg
, code
- cfg
->native_code
, MONO_PATCH_INFO_R4
, ins
->inst_p0
);
3138 x86_fld (code
, NULL
, FALSE
);
3143 case OP_STORER8_MEMBASE_REG
:
3144 x86_fst_membase (code
, ins
->inst_destbasereg
, ins
->inst_offset
, TRUE
, TRUE
);
3146 case OP_LOADR8_MEMBASE
:
3147 x86_fld_membase (code
, ins
->inst_basereg
, ins
->inst_offset
, TRUE
);
3149 case OP_STORER4_MEMBASE_REG
:
3150 x86_fst_membase (code
, ins
->inst_destbasereg
, ins
->inst_offset
, FALSE
, TRUE
);
3152 case OP_LOADR4_MEMBASE
:
3153 x86_fld_membase (code
, ins
->inst_basereg
, ins
->inst_offset
, FALSE
);
3155 case OP_ICONV_TO_R4
:
3156 x86_push_reg (code
, ins
->sreg1
);
3157 x86_fild_membase (code
, X86_ESP
, 0, FALSE
);
3158 /* Change precision */
3159 x86_fst_membase (code
, X86_ESP
, 0, FALSE
, TRUE
);
3160 x86_fld_membase (code
, X86_ESP
, 0, FALSE
);
3161 x86_alu_reg_imm (code
, X86_ADD
, X86_ESP
, 4);
3163 case OP_ICONV_TO_R8
:
3164 x86_push_reg (code
, ins
->sreg1
);
3165 x86_fild_membase (code
, X86_ESP
, 0, FALSE
);
3166 x86_alu_reg_imm (code
, X86_ADD
, X86_ESP
, 4);
3168 case OP_ICONV_TO_R_UN
:
3169 x86_push_imm (code
, 0);
3170 x86_push_reg (code
, ins
->sreg1
);
3171 x86_fild_membase (code
, X86_ESP
, 0, TRUE
);
3172 x86_alu_reg_imm (code
, X86_ADD
, X86_ESP
, 8);
3174 case OP_X86_FP_LOAD_I8
:
3175 x86_fild_membase (code
, ins
->inst_basereg
, ins
->inst_offset
, TRUE
);
3177 case OP_X86_FP_LOAD_I4
:
3178 x86_fild_membase (code
, ins
->inst_basereg
, ins
->inst_offset
, FALSE
);
3180 case OP_FCONV_TO_R4
:
3181 /* Change precision */
3182 x86_alu_reg_imm (code
, X86_SUB
, X86_ESP
, 4);
3183 x86_fst_membase (code
, X86_ESP
, 0, FALSE
, TRUE
);
3184 x86_fld_membase (code
, X86_ESP
, 0, FALSE
);
3185 x86_alu_reg_imm (code
, X86_ADD
, X86_ESP
, 4);
3187 case OP_FCONV_TO_I1
:
3188 code
= emit_float_to_int (cfg
, code
, ins
->dreg
, 1, TRUE
);
3190 case OP_FCONV_TO_U1
:
3191 code
= emit_float_to_int (cfg
, code
, ins
->dreg
, 1, FALSE
);
3193 case OP_FCONV_TO_I2
:
3194 code
= emit_float_to_int (cfg
, code
, ins
->dreg
, 2, TRUE
);
3196 case OP_FCONV_TO_U2
:
3197 code
= emit_float_to_int (cfg
, code
, ins
->dreg
, 2, FALSE
);
3199 case OP_FCONV_TO_I4
:
3201 code
= emit_float_to_int (cfg
, code
, ins
->dreg
, 4, TRUE
);
3203 case OP_FCONV_TO_I8
:
3204 x86_alu_reg_imm (code
, X86_SUB
, X86_ESP
, 4);
3205 x86_fnstcw_membase(code
, X86_ESP
, 0);
3206 x86_mov_reg_membase (code
, ins
->dreg
, X86_ESP
, 0, 2);
3207 x86_alu_reg_imm (code
, X86_OR
, ins
->dreg
, 0xc00);
3208 x86_mov_membase_reg (code
, X86_ESP
, 2, ins
->dreg
, 2);
3209 x86_fldcw_membase (code
, X86_ESP
, 2);
3210 x86_alu_reg_imm (code
, X86_SUB
, X86_ESP
, 8);
3211 x86_fist_pop_membase (code
, X86_ESP
, 0, TRUE
);
3212 x86_pop_reg (code
, ins
->dreg
);
3213 x86_pop_reg (code
, ins
->backend
.reg3
);
3214 x86_fldcw_membase (code
, X86_ESP
, 0);
3215 x86_alu_reg_imm (code
, X86_ADD
, X86_ESP
, 4);
3217 case OP_LCONV_TO_R8_2
:
3218 x86_push_reg (code
, ins
->sreg2
);
3219 x86_push_reg (code
, ins
->sreg1
);
3220 x86_fild_membase (code
, X86_ESP
, 0, TRUE
);
3221 /* Change precision */
3222 x86_fst_membase (code
, X86_ESP
, 0, TRUE
, TRUE
);
3223 x86_fld_membase (code
, X86_ESP
, 0, TRUE
);
3224 x86_alu_reg_imm (code
, X86_ADD
, X86_ESP
, 8);
3226 case OP_LCONV_TO_R4_2
:
3227 x86_push_reg (code
, ins
->sreg2
);
3228 x86_push_reg (code
, ins
->sreg1
);
3229 x86_fild_membase (code
, X86_ESP
, 0, TRUE
);
3230 /* Change precision */
3231 x86_fst_membase (code
, X86_ESP
, 0, FALSE
, TRUE
);
3232 x86_fld_membase (code
, X86_ESP
, 0, FALSE
);
3233 x86_alu_reg_imm (code
, X86_ADD
, X86_ESP
, 8);
3235 case OP_LCONV_TO_R_UN_2
: {
3236 static guint8 mn
[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3f, 0x40 };
3239 /* load 64bit integer to FP stack */
3240 x86_push_reg (code
, ins
->sreg2
);
3241 x86_push_reg (code
, ins
->sreg1
);
3242 x86_fild_membase (code
, X86_ESP
, 0, TRUE
);
3244 /* test if lreg is negative */
3245 x86_test_reg_reg (code
, ins
->sreg2
, ins
->sreg2
);
3246 br
= code
; x86_branch8 (code
, X86_CC_GEZ
, 0, TRUE
);
3248 /* add correction constant mn */
3249 x86_fld80_mem (code
, mn
);
3250 x86_fp_op_reg (code
, X86_FADD
, 1, TRUE
);
3252 x86_patch (br
, code
);
3254 /* Change precision */
3255 x86_fst_membase (code
, X86_ESP
, 0, TRUE
, TRUE
);
3256 x86_fld_membase (code
, X86_ESP
, 0, TRUE
);
3258 x86_alu_reg_imm (code
, X86_ADD
, X86_ESP
, 8);
3262 case OP_LCONV_TO_OVF_I
:
3263 case OP_LCONV_TO_OVF_I4_2
: {
3264 guint8
*br
[3], *label
[1];
3268 * Valid ints: 0xffffffff:8000000 to 00000000:0x7f000000
3270 x86_test_reg_reg (code
, ins
->sreg1
, ins
->sreg1
);
3272 /* If the low word top bit is set, see if we are negative */
3273 br
[0] = code
; x86_branch8 (code
, X86_CC_LT
, 0, TRUE
);
3274 /* We are not negative (no top bit set, check for our top word to be zero */
3275 x86_test_reg_reg (code
, ins
->sreg2
, ins
->sreg2
);
3276 br
[1] = code
; x86_branch8 (code
, X86_CC_EQ
, 0, TRUE
);
3279 /* throw exception */
3280 tins
= mono_branch_optimize_exception_target (cfg
, bb
, "OverflowException");
3282 mono_add_patch_info (cfg
, code
- cfg
->native_code
, MONO_PATCH_INFO_BB
, tins
->inst_true_bb
);
3283 if ((cfg
->opt
& MONO_OPT_BRANCH
) && x86_is_imm8 (tins
->inst_true_bb
->max_offset
- cpos
))
3284 x86_jump8 (code
, 0);
3286 x86_jump32 (code
, 0);
3288 mono_add_patch_info (cfg
, code
- cfg
->native_code
, MONO_PATCH_INFO_EXC
, "OverflowException");
3289 x86_jump32 (code
, 0);
3293 x86_patch (br
[0], code
);
3294 /* our top bit is set, check that top word is 0xfffffff */
3295 x86_alu_reg_imm (code
, X86_CMP
, ins
->sreg2
, 0xffffffff);
3297 x86_patch (br
[1], code
);
3298 /* nope, emit exception */
3299 br
[2] = code
; x86_branch8 (code
, X86_CC_NE
, 0, TRUE
);
3300 x86_patch (br
[2], label
[0]);
3302 if (ins
->dreg
!= ins
->sreg1
)
3303 x86_mov_reg_reg (code
, ins
->dreg
, ins
->sreg1
, 4);
3307 /* Not needed on the fp stack */
3310 x86_fp_op_reg (code
, X86_FADD
, 1, TRUE
);
3313 x86_fp_op_reg (code
, X86_FSUB
, 1, TRUE
);
3316 x86_fp_op_reg (code
, X86_FMUL
, 1, TRUE
);
3319 x86_fp_op_reg (code
, X86_FDIV
, 1, TRUE
);
3327 x86_fp_op_reg (code
, X86_FADD
, 1, TRUE
);
3332 x86_fp_op_reg (code
, X86_FADD
, 1, TRUE
);
3339 * it really doesn't make sense to inline all this code,
3340 * it's here just to show that things may not be as simple
3343 guchar
*check_pos
, *end_tan
, *pop_jump
;
3344 x86_push_reg (code
, X86_EAX
);
3347 x86_test_reg_imm (code
, X86_EAX
, X86_FP_C2
);
3349 x86_branch8 (code
, X86_CC_NE
, 0, FALSE
);
3350 x86_fstp (code
, 0); /* pop the 1.0 */
3352 x86_jump8 (code
, 0);
3354 x86_fp_op (code
, X86_FADD
, 0);
3358 x86_test_reg_imm (code
, X86_EAX
, X86_FP_C2
);
3360 x86_branch8 (code
, X86_CC_NE
, 0, FALSE
);
3363 x86_patch (pop_jump
, code
);
3364 x86_fstp (code
, 0); /* pop the 1.0 */
3365 x86_patch (check_pos
, code
);
3366 x86_patch (end_tan
, code
);
3368 x86_fp_op_reg (code
, X86_FADD
, 1, TRUE
);
3369 x86_pop_reg (code
, X86_EAX
);
3376 x86_fp_op_reg (code
, X86_FADD
, 1, TRUE
);
3385 g_assert (cfg
->opt
& MONO_OPT_CMOV
);
3386 g_assert (ins
->dreg
== ins
->sreg1
);
3387 x86_alu_reg_reg (code
, X86_CMP
, ins
->sreg1
, ins
->sreg2
);
3388 x86_cmov_reg (code
, X86_CC_GT
, TRUE
, ins
->dreg
, ins
->sreg2
);
3391 g_assert (cfg
->opt
& MONO_OPT_CMOV
);
3392 g_assert (ins
->dreg
== ins
->sreg1
);
3393 x86_alu_reg_reg (code
, X86_CMP
, ins
->sreg1
, ins
->sreg2
);
3394 x86_cmov_reg (code
, X86_CC_GT
, FALSE
, ins
->dreg
, ins
->sreg2
);
3397 g_assert (cfg
->opt
& MONO_OPT_CMOV
);
3398 g_assert (ins
->dreg
== ins
->sreg1
);
3399 x86_alu_reg_reg (code
, X86_CMP
, ins
->sreg1
, ins
->sreg2
);
3400 x86_cmov_reg (code
, X86_CC_LT
, TRUE
, ins
->dreg
, ins
->sreg2
);
3403 g_assert (cfg
->opt
& MONO_OPT_CMOV
);
3404 g_assert (ins
->dreg
== ins
->sreg1
);
3405 x86_alu_reg_reg (code
, X86_CMP
, ins
->sreg1
, ins
->sreg2
);
3406 x86_cmov_reg (code
, X86_CC_LT
, FALSE
, ins
->dreg
, ins
->sreg2
);
3412 x86_fxch (code
, ins
->inst_imm
);
3417 x86_push_reg (code
, X86_EAX
);
3418 /* we need to exchange ST(0) with ST(1) */
3421 /* this requires a loop, because fprem somtimes
3422 * returns a partial remainder */
3424 /* looks like MS is using fprem instead of the IEEE compatible fprem1 */
3425 /* x86_fprem1 (code); */
3428 x86_alu_reg_imm (code
, X86_AND
, X86_EAX
, X86_FP_C2
);
3430 x86_branch8 (code
, X86_CC_NE
, l1
- l2
, FALSE
);
3435 x86_pop_reg (code
, X86_EAX
);
3439 if (cfg
->opt
& MONO_OPT_FCMOV
) {
3440 x86_fcomip (code
, 1);
3444 /* this overwrites EAX */
3445 EMIT_FPCOMPARE(code
);
3446 x86_alu_reg_imm (code
, X86_AND
, X86_EAX
, X86_FP_CC_MASK
);
3449 if (cfg
->opt
& MONO_OPT_FCMOV
) {
3450 /* zeroing the register at the start results in
3451 * shorter and faster code (we can also remove the widening op)
3453 guchar
*unordered_check
;
3454 x86_alu_reg_reg (code
, X86_XOR
, ins
->dreg
, ins
->dreg
);
3455 x86_fcomip (code
, 1);
3457 unordered_check
= code
;
3458 x86_branch8 (code
, X86_CC_P
, 0, FALSE
);
3459 x86_set_reg (code
, X86_CC_EQ
, ins
->dreg
, FALSE
);
3460 x86_patch (unordered_check
, code
);
3463 if (ins
->dreg
!= X86_EAX
)
3464 x86_push_reg (code
, X86_EAX
);
3466 EMIT_FPCOMPARE(code
);
3467 x86_alu_reg_imm (code
, X86_AND
, X86_EAX
, X86_FP_CC_MASK
);
3468 x86_alu_reg_imm (code
, X86_CMP
, X86_EAX
, 0x4000);
3469 x86_set_reg (code
, X86_CC_EQ
, ins
->dreg
, TRUE
);
3470 x86_widen_reg (code
, ins
->dreg
, ins
->dreg
, FALSE
, FALSE
);
3472 if (ins
->dreg
!= X86_EAX
)
3473 x86_pop_reg (code
, X86_EAX
);
3477 if (cfg
->opt
& MONO_OPT_FCMOV
) {
3478 /* zeroing the register at the start results in
3479 * shorter and faster code (we can also remove the widening op)
3481 x86_alu_reg_reg (code
, X86_XOR
, ins
->dreg
, ins
->dreg
);
3482 x86_fcomip (code
, 1);
3484 if (ins
->opcode
== OP_FCLT_UN
) {
3485 guchar
*unordered_check
= code
;
3486 guchar
*jump_to_end
;
3487 x86_branch8 (code
, X86_CC_P
, 0, FALSE
);
3488 x86_set_reg (code
, X86_CC_GT
, ins
->dreg
, FALSE
);
3490 x86_jump8 (code
, 0);
3491 x86_patch (unordered_check
, code
);
3492 x86_inc_reg (code
, ins
->dreg
);
3493 x86_patch (jump_to_end
, code
);
3495 x86_set_reg (code
, X86_CC_GT
, ins
->dreg
, FALSE
);
3499 if (ins
->dreg
!= X86_EAX
)
3500 x86_push_reg (code
, X86_EAX
);
3502 EMIT_FPCOMPARE(code
);
3503 x86_alu_reg_imm (code
, X86_AND
, X86_EAX
, X86_FP_CC_MASK
);
3504 if (ins
->opcode
== OP_FCLT_UN
) {
3505 guchar
*is_not_zero_check
, *end_jump
;
3506 is_not_zero_check
= code
;
3507 x86_branch8 (code
, X86_CC_NZ
, 0, TRUE
);
3509 x86_jump8 (code
, 0);
3510 x86_patch (is_not_zero_check
, code
);
3511 x86_alu_reg_imm (code
, X86_CMP
, X86_EAX
, X86_FP_CC_MASK
);
3513 x86_patch (end_jump
, code
);
3515 x86_set_reg (code
, X86_CC_EQ
, ins
->dreg
, TRUE
);
3516 x86_widen_reg (code
, ins
->dreg
, ins
->dreg
, FALSE
, FALSE
);
3518 if (ins
->dreg
!= X86_EAX
)
3519 x86_pop_reg (code
, X86_EAX
);
3523 if (cfg
->opt
& MONO_OPT_FCMOV
) {
3524 /* zeroing the register at the start results in
3525 * shorter and faster code (we can also remove the widening op)
3527 guchar
*unordered_check
;
3528 x86_alu_reg_reg (code
, X86_XOR
, ins
->dreg
, ins
->dreg
);
3529 x86_fcomip (code
, 1);
3531 if (ins
->opcode
== OP_FCGT
) {
3532 unordered_check
= code
;
3533 x86_branch8 (code
, X86_CC_P
, 0, FALSE
);
3534 x86_set_reg (code
, X86_CC_LT
, ins
->dreg
, FALSE
);
3535 x86_patch (unordered_check
, code
);
3537 x86_set_reg (code
, X86_CC_LT
, ins
->dreg
, FALSE
);
3541 if (ins
->dreg
!= X86_EAX
)
3542 x86_push_reg (code
, X86_EAX
);
3544 EMIT_FPCOMPARE(code
);
3545 x86_alu_reg_imm (code
, X86_AND
, X86_EAX
, X86_FP_CC_MASK
);
3546 x86_alu_reg_imm (code
, X86_CMP
, X86_EAX
, X86_FP_C0
);
3547 if (ins
->opcode
== OP_FCGT_UN
) {
3548 guchar
*is_not_zero_check
, *end_jump
;
3549 is_not_zero_check
= code
;
3550 x86_branch8 (code
, X86_CC_NZ
, 0, TRUE
);
3552 x86_jump8 (code
, 0);
3553 x86_patch (is_not_zero_check
, code
);
3554 x86_alu_reg_imm (code
, X86_CMP
, X86_EAX
, X86_FP_CC_MASK
);
3556 x86_patch (end_jump
, code
);
3558 x86_set_reg (code
, X86_CC_EQ
, ins
->dreg
, TRUE
);
3559 x86_widen_reg (code
, ins
->dreg
, ins
->dreg
, FALSE
, FALSE
);
3561 if (ins
->dreg
!= X86_EAX
)
3562 x86_pop_reg (code
, X86_EAX
);
3565 if (cfg
->opt
& MONO_OPT_FCMOV
) {
3566 guchar
*jump
= code
;
3567 x86_branch8 (code
, X86_CC_P
, 0, TRUE
);
3568 EMIT_COND_BRANCH (ins
, X86_CC_EQ
, FALSE
);
3569 x86_patch (jump
, code
);
3572 x86_alu_reg_imm (code
, X86_CMP
, X86_EAX
, 0x4000);
3573 EMIT_COND_BRANCH (ins
, X86_CC_EQ
, TRUE
);
3576 /* Branch if C013 != 100 */
3577 if (cfg
->opt
& MONO_OPT_FCMOV
) {
3578 /* branch if !ZF or (PF|CF) */
3579 EMIT_COND_BRANCH (ins
, X86_CC_NE
, FALSE
);
3580 EMIT_COND_BRANCH (ins
, X86_CC_P
, FALSE
);
3581 EMIT_COND_BRANCH (ins
, X86_CC_B
, FALSE
);
3584 x86_alu_reg_imm (code
, X86_CMP
, X86_EAX
, X86_FP_C3
);
3585 EMIT_COND_BRANCH (ins
, X86_CC_NE
, FALSE
);
3588 if (cfg
->opt
& MONO_OPT_FCMOV
) {
3589 EMIT_COND_BRANCH (ins
, X86_CC_GT
, FALSE
);
3592 EMIT_COND_BRANCH (ins
, X86_CC_EQ
, FALSE
);
3595 if (cfg
->opt
& MONO_OPT_FCMOV
) {
3596 EMIT_COND_BRANCH (ins
, X86_CC_P
, FALSE
);
3597 EMIT_COND_BRANCH (ins
, X86_CC_GT
, FALSE
);
3600 if (ins
->opcode
== OP_FBLT_UN
) {
3601 guchar
*is_not_zero_check
, *end_jump
;
3602 is_not_zero_check
= code
;
3603 x86_branch8 (code
, X86_CC_NZ
, 0, TRUE
);
3605 x86_jump8 (code
, 0);
3606 x86_patch (is_not_zero_check
, code
);
3607 x86_alu_reg_imm (code
, X86_CMP
, X86_EAX
, X86_FP_CC_MASK
);
3609 x86_patch (end_jump
, code
);
3611 EMIT_COND_BRANCH (ins
, X86_CC_EQ
, FALSE
);
3615 if (cfg
->opt
& MONO_OPT_FCMOV
) {
3616 if (ins
->opcode
== OP_FBGT
) {
3619 /* skip branch if C1=1 */
3621 x86_branch8 (code
, X86_CC_P
, 0, FALSE
);
3622 /* branch if (C0 | C3) = 1 */
3623 EMIT_COND_BRANCH (ins
, X86_CC_LT
, FALSE
);
3624 x86_patch (br1
, code
);
3626 EMIT_COND_BRANCH (ins
, X86_CC_LT
, FALSE
);
3630 x86_alu_reg_imm (code
, X86_CMP
, X86_EAX
, X86_FP_C0
);
3631 if (ins
->opcode
== OP_FBGT_UN
) {
3632 guchar
*is_not_zero_check
, *end_jump
;
3633 is_not_zero_check
= code
;
3634 x86_branch8 (code
, X86_CC_NZ
, 0, TRUE
);
3636 x86_jump8 (code
, 0);
3637 x86_patch (is_not_zero_check
, code
);
3638 x86_alu_reg_imm (code
, X86_CMP
, X86_EAX
, X86_FP_CC_MASK
);
3640 x86_patch (end_jump
, code
);
3642 EMIT_COND_BRANCH (ins
, X86_CC_EQ
, FALSE
);
3645 /* Branch if C013 == 100 or 001 */
3646 if (cfg
->opt
& MONO_OPT_FCMOV
) {
3649 /* skip branch if C1=1 */
3651 x86_branch8 (code
, X86_CC_P
, 0, FALSE
);
3652 /* branch if (C0 | C3) = 1 */
3653 EMIT_COND_BRANCH (ins
, X86_CC_BE
, FALSE
);
3654 x86_patch (br1
, code
);
3657 x86_alu_reg_imm (code
, X86_CMP
, X86_EAX
, X86_FP_C0
);
3658 EMIT_COND_BRANCH (ins
, X86_CC_EQ
, FALSE
);
3659 x86_alu_reg_imm (code
, X86_CMP
, X86_EAX
, X86_FP_C3
);
3660 EMIT_COND_BRANCH (ins
, X86_CC_EQ
, FALSE
);
3663 /* Branch if C013 == 000 */
3664 if (cfg
->opt
& MONO_OPT_FCMOV
) {
3665 EMIT_COND_BRANCH (ins
, X86_CC_LE
, FALSE
);
3668 EMIT_COND_BRANCH (ins
, X86_CC_NE
, FALSE
);
3671 /* Branch if C013=000 or 100 */
3672 if (cfg
->opt
& MONO_OPT_FCMOV
) {
3675 /* skip branch if C1=1 */
3677 x86_branch8 (code
, X86_CC_P
, 0, FALSE
);
3678 /* branch if C0=0 */
3679 EMIT_COND_BRANCH (ins
, X86_CC_NB
, FALSE
);
3680 x86_patch (br1
, code
);
3683 x86_alu_reg_imm (code
, X86_AND
, X86_EAX
, (X86_FP_C0
|X86_FP_C1
));
3684 x86_alu_reg_imm (code
, X86_CMP
, X86_EAX
, 0);
3685 EMIT_COND_BRANCH (ins
, X86_CC_EQ
, FALSE
);
3688 /* Branch if C013 != 001 */
3689 if (cfg
->opt
& MONO_OPT_FCMOV
) {
3690 EMIT_COND_BRANCH (ins
, X86_CC_P
, FALSE
);
3691 EMIT_COND_BRANCH (ins
, X86_CC_GE
, FALSE
);
3694 x86_alu_reg_imm (code
, X86_CMP
, X86_EAX
, X86_FP_C0
);
3695 EMIT_COND_BRANCH (ins
, X86_CC_NE
, FALSE
);
3699 x86_push_reg (code
, X86_EAX
);
3702 x86_alu_reg_imm (code
, X86_AND
, X86_EAX
, 0x4100);
3703 x86_alu_reg_imm (code
, X86_CMP
, X86_EAX
, X86_FP_C0
);
3704 x86_pop_reg (code
, X86_EAX
);
3706 /* Have to clean up the fp stack before throwing the exception */
3708 x86_branch8 (code
, X86_CC_NE
, 0, FALSE
);
3711 EMIT_COND_SYSTEM_EXCEPTION (X86_CC_EQ
, FALSE
, "ArithmeticException");
3713 x86_patch (br1
, code
);
3717 code
= mono_x86_emit_tls_get (code
, ins
->dreg
, ins
->inst_offset
);
3720 case OP_MEMORY_BARRIER
: {
3721 /* Not needed on x86 */
3724 case OP_ATOMIC_ADD_I4
: {
3725 int dreg
= ins
->dreg
;
3727 if (dreg
== ins
->inst_basereg
) {
3728 x86_push_reg (code
, ins
->sreg2
);
3732 if (dreg
!= ins
->sreg2
)
3733 x86_mov_reg_reg (code
, ins
->dreg
, ins
->sreg2
, 4);
3735 x86_prefix (code
, X86_LOCK_PREFIX
);
3736 x86_xadd_membase_reg (code
, ins
->inst_basereg
, ins
->inst_offset
, dreg
, 4);
3738 if (dreg
!= ins
->dreg
) {
3739 x86_mov_reg_reg (code
, ins
->dreg
, dreg
, 4);
3740 x86_pop_reg (code
, dreg
);
3745 case OP_ATOMIC_ADD_NEW_I4
: {
3746 int dreg
= ins
->dreg
;
3748 /* hack: limit in regalloc, dreg != sreg1 && dreg != sreg2 */
3749 if (ins
->sreg2
== dreg
) {
3750 if (dreg
== X86_EBX
) {
3752 if (ins
->inst_basereg
== X86_EDI
)
3756 if (ins
->inst_basereg
== X86_EBX
)
3759 } else if (ins
->inst_basereg
== dreg
) {
3760 if (dreg
== X86_EBX
) {
3762 if (ins
->sreg2
== X86_EDI
)
3766 if (ins
->sreg2
== X86_EBX
)
3771 if (dreg
!= ins
->dreg
) {
3772 x86_push_reg (code
, dreg
);
3775 x86_mov_reg_reg (code
, dreg
, ins
->sreg2
, 4);
3776 x86_prefix (code
, X86_LOCK_PREFIX
);
3777 x86_xadd_membase_reg (code
, ins
->inst_basereg
, ins
->inst_offset
, dreg
, 4);
3778 /* dreg contains the old value, add with sreg2 value */
3779 x86_alu_reg_reg (code
, X86_ADD
, dreg
, ins
->sreg2
);
3781 if (ins
->dreg
!= dreg
) {
3782 x86_mov_reg_reg (code
, ins
->dreg
, dreg
, 4);
3783 x86_pop_reg (code
, dreg
);
3788 case OP_ATOMIC_EXCHANGE_I4
: {
3790 int sreg2
= ins
->sreg2
;
3791 int breg
= ins
->inst_basereg
;
3793 /* cmpxchg uses eax as comperand, need to make sure we can use it
3794 * hack to overcome limits in x86 reg allocator
3795 * (req: dreg == eax and sreg2 != eax and breg != eax)
3797 g_assert (ins
->dreg
== X86_EAX
);
3799 /* We need the EAX reg for the cmpxchg */
3800 if (ins
->sreg2
== X86_EAX
) {
3801 sreg2
= (breg
== X86_EDX
) ? X86_EBX
: X86_EDX
;
3802 x86_push_reg (code
, sreg2
);
3803 x86_mov_reg_reg (code
, sreg2
, X86_EAX
, 4);
3806 if (breg
== X86_EAX
) {
3807 breg
= (sreg2
== X86_ESI
) ? X86_EDI
: X86_ESI
;
3808 x86_push_reg (code
, breg
);
3809 x86_mov_reg_reg (code
, breg
, X86_EAX
, 4);
3812 x86_mov_reg_membase (code
, X86_EAX
, breg
, ins
->inst_offset
, 4);
3814 br
[0] = code
; x86_prefix (code
, X86_LOCK_PREFIX
);
3815 x86_cmpxchg_membase_reg (code
, breg
, ins
->inst_offset
, sreg2
);
3816 br
[1] = code
; x86_branch8 (code
, X86_CC_NE
, -1, FALSE
);
3817 x86_patch (br
[1], br
[0]);
3819 if (breg
!= ins
->inst_basereg
)
3820 x86_pop_reg (code
, breg
);
3822 if (ins
->sreg2
!= sreg2
)
3823 x86_pop_reg (code
, sreg2
);
3827 case OP_ATOMIC_CAS_I4
: {
3828 g_assert (ins
->sreg3
== X86_EAX
);
3829 g_assert (ins
->sreg1
!= X86_EAX
);
3830 g_assert (ins
->sreg1
!= ins
->sreg2
);
3832 x86_prefix (code
, X86_LOCK_PREFIX
);
3833 x86_cmpxchg_membase_reg (code
, ins
->sreg1
, ins
->inst_offset
, ins
->sreg2
);
3835 if (ins
->dreg
!= X86_EAX
)
3836 x86_mov_reg_reg (code
, ins
->dreg
, X86_EAX
, 4);
3839 #ifdef MONO_ARCH_SIMD_INTRINSICS
3841 x86_sse_alu_ps_reg_reg (code
, X86_SSE_ADD
, ins
->sreg1
, ins
->sreg2
);
3844 x86_sse_alu_ps_reg_reg (code
, X86_SSE_DIV
, ins
->sreg1
, ins
->sreg2
);
3847 x86_sse_alu_ps_reg_reg (code
, X86_SSE_MUL
, ins
->sreg1
, ins
->sreg2
);
3850 x86_sse_alu_ps_reg_reg (code
, X86_SSE_SUB
, ins
->sreg1
, ins
->sreg2
);
3853 x86_sse_alu_ps_reg_reg (code
, X86_SSE_MAX
, ins
->sreg1
, ins
->sreg2
);
3856 x86_sse_alu_ps_reg_reg (code
, X86_SSE_MIN
, ins
->sreg1
, ins
->sreg2
);
3859 g_assert (ins
->inst_c0
>= 0 && ins
->inst_c0
<= 7);
3860 x86_sse_alu_ps_reg_reg_imm (code
, X86_SSE_COMP
, ins
->sreg1
, ins
->sreg2
, ins
->inst_c0
);
3863 x86_sse_alu_ps_reg_reg (code
, X86_SSE_AND
, ins
->sreg1
, ins
->sreg2
);
3866 x86_sse_alu_ps_reg_reg (code
, X86_SSE_ANDN
, ins
->sreg1
, ins
->sreg2
);
3869 x86_sse_alu_ps_reg_reg (code
, X86_SSE_OR
, ins
->sreg1
, ins
->sreg2
);
3872 x86_sse_alu_ps_reg_reg (code
, X86_SSE_XOR
, ins
->sreg1
, ins
->sreg2
);
3875 x86_sse_alu_ps_reg_reg (code
, X86_SSE_SQRT
, ins
->dreg
, ins
->sreg1
);
3878 x86_sse_alu_ps_reg_reg (code
, X86_SSE_RSQRT
, ins
->dreg
, ins
->sreg1
);
3881 x86_sse_alu_ps_reg_reg (code
, X86_SSE_RCP
, ins
->dreg
, ins
->sreg1
);
3884 x86_sse_alu_sd_reg_reg (code
, X86_SSE_ADDSUB
, ins
->sreg1
, ins
->sreg2
);
3887 x86_sse_alu_sd_reg_reg (code
, X86_SSE_HADD
, ins
->sreg1
, ins
->sreg2
);
3890 x86_sse_alu_sd_reg_reg (code
, X86_SSE_HSUB
, ins
->sreg1
, ins
->sreg2
);
3893 x86_sse_alu_ss_reg_reg (code
, X86_SSE_MOVSHDUP
, ins
->dreg
, ins
->sreg1
);
3896 x86_sse_alu_ss_reg_reg (code
, X86_SSE_MOVSLDUP
, ins
->dreg
, ins
->sreg1
);
3899 case OP_PSHUFLEW_HIGH
:
3900 g_assert (ins
->inst_c0
>= 0 && ins
->inst_c0
<= 0xFF);
3901 x86_pshufw_reg_reg (code
, ins
->dreg
, ins
->sreg1
, ins
->inst_c0
, 1);
3903 case OP_PSHUFLEW_LOW
:
3904 g_assert (ins
->inst_c0
>= 0 && ins
->inst_c0
<= 0xFF);
3905 x86_pshufw_reg_reg (code
, ins
->dreg
, ins
->sreg1
, ins
->inst_c0
, 0);
3908 g_assert (ins
->inst_c0
>= 0 && ins
->inst_c0
<= 0xFF);
3909 x86_sse_shift_reg_imm (code
, X86_SSE_PSHUFD
, ins
->dreg
, ins
->sreg1
, ins
->inst_c0
);
3913 x86_sse_alu_pd_reg_reg (code
, X86_SSE_ADD
, ins
->sreg1
, ins
->sreg2
);
3916 x86_sse_alu_pd_reg_reg (code
, X86_SSE_DIV
, ins
->sreg1
, ins
->sreg2
);
3919 x86_sse_alu_pd_reg_reg (code
, X86_SSE_MUL
, ins
->sreg1
, ins
->sreg2
);
3922 x86_sse_alu_pd_reg_reg (code
, X86_SSE_SUB
, ins
->sreg1
, ins
->sreg2
);
3925 x86_sse_alu_pd_reg_reg (code
, X86_SSE_MAX
, ins
->sreg1
, ins
->sreg2
);
3928 x86_sse_alu_pd_reg_reg (code
, X86_SSE_MIN
, ins
->sreg1
, ins
->sreg2
);
3931 g_assert (ins
->inst_c0
>= 0 && ins
->inst_c0
<= 7);
3932 x86_sse_alu_pd_reg_reg_imm (code
, X86_SSE_COMP
, ins
->sreg1
, ins
->sreg2
, ins
->inst_c0
);
3935 x86_sse_alu_pd_reg_reg (code
, X86_SSE_AND
, ins
->sreg1
, ins
->sreg2
);
3938 x86_sse_alu_pd_reg_reg (code
, X86_SSE_ANDN
, ins
->sreg1
, ins
->sreg2
);
3941 x86_sse_alu_pd_reg_reg (code
, X86_SSE_OR
, ins
->sreg1
, ins
->sreg2
);
3944 x86_sse_alu_pd_reg_reg (code
, X86_SSE_XOR
, ins
->sreg1
, ins
->sreg2
);
3947 x86_sse_alu_pd_reg_reg (code
, X86_SSE_SQRT
, ins
->dreg
, ins
->sreg1
);
3950 x86_sse_alu_pd_reg_reg (code
, X86_SSE_ADDSUB
, ins
->sreg1
, ins
->sreg2
);
3953 x86_sse_alu_pd_reg_reg (code
, X86_SSE_HADD
, ins
->sreg1
, ins
->sreg2
);
3956 x86_sse_alu_pd_reg_reg (code
, X86_SSE_HSUB
, ins
->sreg1
, ins
->sreg2
);
3959 x86_sse_alu_sd_reg_reg (code
, X86_SSE_MOVDDUP
, ins
->dreg
, ins
->sreg1
);
3962 case OP_EXTRACT_MASK
:
3963 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PMOVMSKB
, ins
->dreg
, ins
->sreg1
);
3967 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PAND
, ins
->sreg1
, ins
->sreg2
);
3970 x86_sse_alu_pd_reg_reg (code
, X86_SSE_POR
, ins
->sreg1
, ins
->sreg2
);
3973 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PXOR
, ins
->sreg1
, ins
->sreg2
);
3977 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PADDB
, ins
->sreg1
, ins
->sreg2
);
3980 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PADDW
, ins
->sreg1
, ins
->sreg2
);
3983 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PADDD
, ins
->sreg1
, ins
->sreg2
);
3986 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PADDQ
, ins
->sreg1
, ins
->sreg2
);
3990 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PSUBB
, ins
->sreg1
, ins
->sreg2
);
3993 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PSUBW
, ins
->sreg1
, ins
->sreg2
);
3996 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PSUBD
, ins
->sreg1
, ins
->sreg2
);
3999 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PSUBQ
, ins
->sreg1
, ins
->sreg2
);
4003 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PMAXUB
, ins
->sreg1
, ins
->sreg2
);
4006 x86_sse_alu_sse41_reg_reg (code
, X86_SSE_PMAXUW
, ins
->sreg1
, ins
->sreg2
);
4009 x86_sse_alu_sse41_reg_reg (code
, X86_SSE_PMAXUD
, ins
->sreg1
, ins
->sreg2
);
4013 x86_sse_alu_sse41_reg_reg (code
, X86_SSE_PMAXSB
, ins
->sreg1
, ins
->sreg2
);
4016 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PMAXSW
, ins
->sreg1
, ins
->sreg2
);
4019 x86_sse_alu_sse41_reg_reg (code
, X86_SSE_PMAXSD
, ins
->sreg1
, ins
->sreg2
);
4023 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PAVGB
, ins
->sreg1
, ins
->sreg2
);
4026 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PAVGW
, ins
->sreg1
, ins
->sreg2
);
4030 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PMINUB
, ins
->sreg1
, ins
->sreg2
);
4033 x86_sse_alu_sse41_reg_reg (code
, X86_SSE_PMINUW
, ins
->sreg1
, ins
->sreg2
);
4036 x86_sse_alu_sse41_reg_reg (code
, X86_SSE_PMINUD
, ins
->sreg1
, ins
->sreg2
);
4040 x86_sse_alu_sse41_reg_reg (code
, X86_SSE_PMINSB
, ins
->sreg1
, ins
->sreg2
);
4043 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PMINSW
, ins
->sreg1
, ins
->sreg2
);
4046 x86_sse_alu_sse41_reg_reg (code
, X86_SSE_PMINSD
, ins
->sreg1
, ins
->sreg2
);
4050 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PCMPEQB
, ins
->sreg1
, ins
->sreg2
);
4053 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PCMPEQW
, ins
->sreg1
, ins
->sreg2
);
4056 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PCMPEQD
, ins
->sreg1
, ins
->sreg2
);
4059 x86_sse_alu_sse41_reg_reg (code
, X86_SSE_PCMPEQQ
, ins
->sreg1
, ins
->sreg2
);
4063 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PCMPGTB
, ins
->sreg1
, ins
->sreg2
);
4066 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PCMPGTW
, ins
->sreg1
, ins
->sreg2
);
4069 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PCMPGTD
, ins
->sreg1
, ins
->sreg2
);
4072 x86_sse_alu_sse41_reg_reg (code
, X86_SSE_PCMPGTQ
, ins
->sreg1
, ins
->sreg2
);
4075 case OP_PSUM_ABS_DIFF
:
4076 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PSADBW
, ins
->sreg1
, ins
->sreg2
);
4079 case OP_UNPACK_LOWB
:
4080 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PUNPCKLBW
, ins
->sreg1
, ins
->sreg2
);
4082 case OP_UNPACK_LOWW
:
4083 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PUNPCKLWD
, ins
->sreg1
, ins
->sreg2
);
4085 case OP_UNPACK_LOWD
:
4086 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PUNPCKLDQ
, ins
->sreg1
, ins
->sreg2
);
4088 case OP_UNPACK_LOWQ
:
4089 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PUNPCKLQDQ
, ins
->sreg1
, ins
->sreg2
);
4091 case OP_UNPACK_LOWPS
:
4092 x86_sse_alu_ps_reg_reg (code
, X86_SSE_UNPCKL
, ins
->sreg1
, ins
->sreg2
);
4094 case OP_UNPACK_LOWPD
:
4095 x86_sse_alu_pd_reg_reg (code
, X86_SSE_UNPCKL
, ins
->sreg1
, ins
->sreg2
);
4098 case OP_UNPACK_HIGHB
:
4099 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PUNPCKHBW
, ins
->sreg1
, ins
->sreg2
);
4101 case OP_UNPACK_HIGHW
:
4102 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PUNPCKHWD
, ins
->sreg1
, ins
->sreg2
);
4104 case OP_UNPACK_HIGHD
:
4105 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PUNPCKHDQ
, ins
->sreg1
, ins
->sreg2
);
4107 case OP_UNPACK_HIGHQ
:
4108 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PUNPCKHQDQ
, ins
->sreg1
, ins
->sreg2
);
4110 case OP_UNPACK_HIGHPS
:
4111 x86_sse_alu_ps_reg_reg (code
, X86_SSE_UNPCKH
, ins
->sreg1
, ins
->sreg2
);
4113 case OP_UNPACK_HIGHPD
:
4114 x86_sse_alu_pd_reg_reg (code
, X86_SSE_UNPCKH
, ins
->sreg1
, ins
->sreg2
);
4118 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PACKSSWB
, ins
->sreg1
, ins
->sreg2
);
4121 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PACKSSDW
, ins
->sreg1
, ins
->sreg2
);
4124 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PACKUSWB
, ins
->sreg1
, ins
->sreg2
);
4127 x86_sse_alu_sse41_reg_reg (code
, X86_SSE_PACKUSDW
, ins
->sreg1
, ins
->sreg2
);
4130 case OP_PADDB_SAT_UN
:
4131 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PADDUSB
, ins
->sreg1
, ins
->sreg2
);
4133 case OP_PSUBB_SAT_UN
:
4134 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PSUBUSB
, ins
->sreg1
, ins
->sreg2
);
4136 case OP_PADDW_SAT_UN
:
4137 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PADDUSW
, ins
->sreg1
, ins
->sreg2
);
4139 case OP_PSUBW_SAT_UN
:
4140 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PSUBUSW
, ins
->sreg1
, ins
->sreg2
);
4144 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PADDSB
, ins
->sreg1
, ins
->sreg2
);
4147 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PSUBSB
, ins
->sreg1
, ins
->sreg2
);
4150 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PADDSW
, ins
->sreg1
, ins
->sreg2
);
4153 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PSUBSW
, ins
->sreg1
, ins
->sreg2
);
4157 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PMULLW
, ins
->sreg1
, ins
->sreg2
);
4160 x86_sse_alu_sse41_reg_reg (code
, X86_SSE_PMULLD
, ins
->sreg1
, ins
->sreg2
);
4163 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PMULUDQ
, ins
->sreg1
, ins
->sreg2
);
4165 case OP_PMULW_HIGH_UN
:
4166 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PMULHUW
, ins
->sreg1
, ins
->sreg2
);
4169 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PMULHW
, ins
->sreg1
, ins
->sreg2
);
4173 x86_sse_shift_reg_imm (code
, X86_SSE_PSHIFTW
, X86_SSE_SHR
, ins
->dreg
, ins
->inst_imm
);
4176 x86_sse_shift_reg_reg (code
, X86_SSE_PSRLW_REG
, ins
->dreg
, ins
->sreg2
);
4180 x86_sse_shift_reg_imm (code
, X86_SSE_PSHIFTW
, X86_SSE_SAR
, ins
->dreg
, ins
->inst_imm
);
4183 x86_sse_shift_reg_reg (code
, X86_SSE_PSRAW_REG
, ins
->dreg
, ins
->sreg2
);
4187 x86_sse_shift_reg_imm (code
, X86_SSE_PSHIFTW
, X86_SSE_SHL
, ins
->dreg
, ins
->inst_imm
);
4190 x86_sse_shift_reg_reg (code
, X86_SSE_PSLLW_REG
, ins
->dreg
, ins
->sreg2
);
4194 x86_sse_shift_reg_imm (code
, X86_SSE_PSHIFTD
, X86_SSE_SHR
, ins
->dreg
, ins
->inst_imm
);
4197 x86_sse_shift_reg_reg (code
, X86_SSE_PSRLD_REG
, ins
->dreg
, ins
->sreg2
);
4201 x86_sse_shift_reg_imm (code
, X86_SSE_PSHIFTD
, X86_SSE_SAR
, ins
->dreg
, ins
->inst_imm
);
4204 x86_sse_shift_reg_reg (code
, X86_SSE_PSRAD_REG
, ins
->dreg
, ins
->sreg2
);
4208 x86_sse_shift_reg_imm (code
, X86_SSE_PSHIFTD
, X86_SSE_SHL
, ins
->dreg
, ins
->inst_imm
);
4211 x86_sse_shift_reg_reg (code
, X86_SSE_PSLLD_REG
, ins
->dreg
, ins
->sreg2
);
4215 x86_sse_shift_reg_imm (code
, X86_SSE_PSHIFTQ
, X86_SSE_SHR
, ins
->dreg
, ins
->inst_imm
);
4218 x86_sse_shift_reg_reg (code
, X86_SSE_PSRLQ_REG
, ins
->dreg
, ins
->sreg2
);
4222 x86_sse_shift_reg_imm (code
, X86_SSE_PSHIFTQ
, X86_SSE_SHL
, ins
->dreg
, ins
->inst_imm
);
4225 x86_sse_shift_reg_reg (code
, X86_SSE_PSLLQ_REG
, ins
->dreg
, ins
->sreg2
);
4229 x86_movd_xreg_reg (code
, ins
->dreg
, ins
->sreg1
);
4232 x86_movd_reg_xreg (code
, ins
->dreg
, ins
->sreg1
);
4236 x86_movd_reg_xreg (code
, ins
->dreg
, ins
->sreg1
);
4238 x86_shift_reg_imm (code
, X86_SHR
, ins
->dreg
, ins
->inst_c0
* 8);
4239 x86_widen_reg (code
, ins
->dreg
, ins
->dreg
, ins
->opcode
== OP_EXTRACT_I1
, FALSE
);
4243 x86_movd_reg_xreg (code
, ins
->dreg
, ins
->sreg1
);
4245 x86_shift_reg_imm (code
, X86_SHR
, ins
->dreg
, 16);
4246 x86_widen_reg (code
, ins
->dreg
, ins
->dreg
, ins
->opcode
== OP_EXTRACT_I2
, TRUE
);
4250 x86_sse_alu_pd_membase_reg (code
, X86_SSE_MOVHPD_MEMBASE_REG
, ins
->backend
.spill_var
->inst_basereg
, ins
->backend
.spill_var
->inst_offset
, ins
->sreg1
);
4252 x86_sse_alu_sd_membase_reg (code
, X86_SSE_MOVSD_MEMBASE_REG
, ins
->backend
.spill_var
->inst_basereg
, ins
->backend
.spill_var
->inst_offset
, ins
->sreg1
);
4253 x86_fld_membase (code
, ins
->backend
.spill_var
->inst_basereg
, ins
->backend
.spill_var
->inst_offset
, TRUE
);
4257 x86_sse_alu_pd_reg_reg_imm (code
, X86_SSE_PINSRW
, ins
->sreg1
, ins
->sreg2
, ins
->inst_c0
);
4259 case OP_EXTRACTX_U2
:
4260 x86_sse_alu_pd_reg_reg_imm (code
, X86_SSE_PEXTRW
, ins
->dreg
, ins
->sreg1
, ins
->inst_c0
);
4262 case OP_INSERTX_U1_SLOW
:
4263 /*sreg1 is the extracted ireg (scratch)
4264 /sreg2 is the to be inserted ireg (scratch)
4265 /dreg is the xreg to receive the value*/
4267 /*clear the bits from the extracted word*/
4268 x86_alu_reg_imm (code
, X86_AND
, ins
->sreg1
, ins
->inst_c0
& 1 ? 0x00FF : 0xFF00);
4269 /*shift the value to insert if needed*/
4270 if (ins
->inst_c0
& 1)
4271 x86_shift_reg_imm (code
, X86_SHL
, ins
->sreg2
, 8);
4272 /*join them together*/
4273 x86_alu_reg_reg (code
, X86_OR
, ins
->sreg1
, ins
->sreg2
);
4274 x86_sse_alu_pd_reg_reg_imm (code
, X86_SSE_PINSRW
, ins
->dreg
, ins
->sreg1
, ins
->inst_c0
/ 2);
4276 case OP_INSERTX_I4_SLOW
:
4277 x86_sse_alu_pd_reg_reg_imm (code
, X86_SSE_PINSRW
, ins
->dreg
, ins
->sreg2
, ins
->inst_c0
* 2);
4278 x86_shift_reg_imm (code
, X86_SHR
, ins
->sreg2
, 16);
4279 x86_sse_alu_pd_reg_reg_imm (code
, X86_SSE_PINSRW
, ins
->dreg
, ins
->sreg2
, ins
->inst_c0
* 2 + 1);
4282 case OP_INSERTX_R4_SLOW
:
4283 x86_fst_membase (code
, ins
->backend
.spill_var
->inst_basereg
, ins
->backend
.spill_var
->inst_offset
, FALSE
, TRUE
);
4284 /*TODO if inst_c0 == 0 use movss*/
4285 x86_sse_alu_pd_reg_membase_imm (code
, X86_SSE_PINSRW
, ins
->dreg
, ins
->backend
.spill_var
->inst_basereg
, ins
->backend
.spill_var
->inst_offset
+ 0, ins
->inst_c0
* 2);
4286 x86_sse_alu_pd_reg_membase_imm (code
, X86_SSE_PINSRW
, ins
->dreg
, ins
->backend
.spill_var
->inst_basereg
, ins
->backend
.spill_var
->inst_offset
+ 2, ins
->inst_c0
* 2 + 1);
4288 case OP_INSERTX_R8_SLOW
:
4289 x86_fst_membase (code
, ins
->backend
.spill_var
->inst_basereg
, ins
->backend
.spill_var
->inst_offset
, TRUE
, TRUE
);
4291 x86_sse_alu_pd_reg_membase (code
, X86_SSE_MOVHPD_REG_MEMBASE
, ins
->dreg
, ins
->backend
.spill_var
->inst_basereg
, ins
->backend
.spill_var
->inst_offset
);
4293 x86_sse_alu_pd_reg_membase (code
, X86_SSE_MOVSD_REG_MEMBASE
, ins
->dreg
, ins
->backend
.spill_var
->inst_basereg
, ins
->backend
.spill_var
->inst_offset
);
4296 case OP_STOREX_MEMBASE_REG
:
4297 case OP_STOREX_MEMBASE
:
4298 x86_movups_membase_reg (code
, ins
->dreg
, ins
->inst_offset
, ins
->sreg1
);
4300 case OP_LOADX_MEMBASE
:
4301 x86_movups_reg_membase (code
, ins
->dreg
, ins
->sreg1
, ins
->inst_offset
);
4303 case OP_LOADX_ALIGNED_MEMBASE
:
4304 x86_movaps_reg_membase (code
, ins
->dreg
, ins
->sreg1
, ins
->inst_offset
);
4306 case OP_STOREX_ALIGNED_MEMBASE_REG
:
4307 x86_movaps_membase_reg (code
, ins
->dreg
, ins
->inst_offset
, ins
->sreg1
);
4309 case OP_STOREX_NTA_MEMBASE_REG
:
4310 x86_sse_alu_reg_membase (code
, X86_SSE_MOVNTPS
, ins
->dreg
, ins
->sreg1
, ins
->inst_offset
);
4312 case OP_PREFETCH_MEMBASE
:
4313 x86_sse_alu_reg_membase (code
, X86_SSE_PREFETCH
, ins
->backend
.arg_info
, ins
->sreg1
, ins
->inst_offset
);
4317 /*FIXME the peephole pass should have killed this*/
4318 if (ins
->dreg
!= ins
->sreg1
)
4319 x86_movaps_reg_reg (code
, ins
->dreg
, ins
->sreg1
);
4322 x86_sse_alu_pd_reg_reg (code
, X86_SSE_PXOR
, ins
->dreg
, ins
->dreg
);
4324 case OP_ICONV_TO_R8_RAW
:
4325 x86_mov_membase_reg (code
, ins
->backend
.spill_var
->inst_basereg
, ins
->backend
.spill_var
->inst_offset
, ins
->sreg1
, 4);
4326 x86_fld_membase (code
, ins
->backend
.spill_var
->inst_basereg
, ins
->backend
.spill_var
->inst_offset
, FALSE
);
4329 case OP_FCONV_TO_R8_X
:
4330 x86_fst_membase (code
, ins
->backend
.spill_var
->inst_basereg
, ins
->backend
.spill_var
->inst_offset
, TRUE
, TRUE
);
4331 x86_movsd_reg_membase (code
, ins
->dreg
, ins
->backend
.spill_var
->inst_basereg
, ins
->backend
.spill_var
->inst_offset
);
4334 case OP_XCONV_R8_TO_I4
:
4335 x86_cvttsd2si (code
, ins
->dreg
, ins
->sreg1
);
4336 switch (ins
->backend
.source_opcode
) {
4337 case OP_FCONV_TO_I1
:
4338 x86_widen_reg (code
, ins
->dreg
, ins
->dreg
, TRUE
, FALSE
);
4340 case OP_FCONV_TO_U1
:
4341 x86_widen_reg (code
, ins
->dreg
, ins
->dreg
, FALSE
, FALSE
);
4343 case OP_FCONV_TO_I2
:
4344 x86_widen_reg (code
, ins
->dreg
, ins
->dreg
, TRUE
, TRUE
);
4346 case OP_FCONV_TO_U2
:
4347 x86_widen_reg (code
, ins
->dreg
, ins
->dreg
, FALSE
, TRUE
);
4353 /*FIXME this causes a partial register stall, maybe it would not be that bad to use shift + mask + or*/
4354 /*The +4 is to get a mov ?h, ?l over the same reg.*/
4355 x86_mov_reg_reg (code
, ins
->dreg
+ 4, ins
->dreg
, 1);
4356 x86_sse_alu_pd_reg_reg_imm (code
, X86_SSE_PINSRW
, ins
->dreg
, ins
->sreg1
, 0);
4357 x86_sse_alu_pd_reg_reg_imm (code
, X86_SSE_PINSRW
, ins
->dreg
, ins
->sreg1
, 1);
4358 x86_sse_shift_reg_imm (code
, X86_SSE_PSHUFD
, ins
->dreg
, ins
->dreg
, 0);
4361 x86_sse_alu_pd_reg_reg_imm (code
, X86_SSE_PINSRW
, ins
->dreg
, ins
->sreg1
, 0);
4362 x86_sse_alu_pd_reg_reg_imm (code
, X86_SSE_PINSRW
, ins
->dreg
, ins
->sreg1
, 1);
4363 x86_sse_shift_reg_imm (code
, X86_SSE_PSHUFD
, ins
->dreg
, ins
->dreg
, 0);
4366 x86_movd_xreg_reg (code
, ins
->dreg
, ins
->sreg1
);
4367 x86_sse_shift_reg_imm (code
, X86_SSE_PSHUFD
, ins
->dreg
, ins
->dreg
, 0);
4370 x86_fst_membase (code
, ins
->backend
.spill_var
->inst_basereg
, ins
->backend
.spill_var
->inst_offset
, FALSE
, TRUE
);
4371 x86_movd_xreg_membase (code
, ins
->dreg
, ins
->backend
.spill_var
->inst_basereg
, ins
->backend
.spill_var
->inst_offset
);
4372 x86_sse_shift_reg_imm (code
, X86_SSE_PSHUFD
, ins
->dreg
, ins
->dreg
, 0);
4375 x86_fst_membase (code
, ins
->backend
.spill_var
->inst_basereg
, ins
->backend
.spill_var
->inst_offset
, TRUE
, TRUE
);
4376 x86_movsd_reg_membase (code
, ins
->dreg
, ins
->backend
.spill_var
->inst_basereg
, ins
->backend
.spill_var
->inst_offset
);
4377 x86_sse_shift_reg_imm (code
, X86_SSE_PSHUFD
, ins
->dreg
, ins
->dreg
, 0x44);
4380 case OP_LIVERANGE_START
: {
4381 if (cfg
->verbose_level
> 1)
4382 printf ("R%d START=0x%x\n", MONO_VARINFO (cfg
, ins
->inst_c0
)->vreg
, (int)(code
- cfg
->native_code
));
4383 MONO_VARINFO (cfg
, ins
->inst_c0
)->live_range_start
= code
- cfg
->native_code
;
4386 case OP_LIVERANGE_END
: {
4387 if (cfg
->verbose_level
> 1)
4388 printf ("R%d END=0x%x\n", MONO_VARINFO (cfg
, ins
->inst_c0
)->vreg
, (int)(code
- cfg
->native_code
));
4389 MONO_VARINFO (cfg
, ins
->inst_c0
)->live_range_end
= code
- cfg
->native_code
;
4393 g_warning ("unknown opcode %s\n", mono_inst_name (ins
->opcode
));
4394 g_assert_not_reached ();
4397 if (G_UNLIKELY ((code
- cfg
->native_code
- offset
) > max_len
)) {
4398 g_warning ("wrong maximal instruction length of instruction %s (expected %d, got %d)",
4399 mono_inst_name (ins
->opcode
), max_len
, code
- cfg
->native_code
- offset
);
4400 g_assert_not_reached ();
4406 cfg
->code_len
= code
- cfg
->native_code
;
4409 #endif /* DISABLE_JIT */
4412 mono_arch_register_lowlevel_calls (void)
4417 mono_arch_patch_code (MonoMethod
*method
, MonoDomain
*domain
, guint8
*code
, MonoJumpInfo
*ji
, gboolean run_cctors
)
4419 MonoJumpInfo
*patch_info
;
4420 gboolean compile_aot
= !run_cctors
;
4422 for (patch_info
= ji
; patch_info
; patch_info
= patch_info
->next
) {
4423 unsigned char *ip
= patch_info
->ip
.i
+ code
;
4424 const unsigned char *target
;
4426 target
= mono_resolve_patch_target (method
, domain
, code
, patch_info
, run_cctors
);
4429 switch (patch_info
->type
) {
4430 case MONO_PATCH_INFO_BB
:
4431 case MONO_PATCH_INFO_LABEL
:
4434 /* No need to patch these */
4439 switch (patch_info
->type
) {
4440 case MONO_PATCH_INFO_IP
:
4441 *((gconstpointer
*)(ip
)) = target
;
4443 case MONO_PATCH_INFO_CLASS_INIT
: {
4445 /* Might already been changed to a nop */
4446 x86_call_code (code
, 0);
4447 x86_patch (ip
, target
);
4450 case MONO_PATCH_INFO_ABS
:
4451 case MONO_PATCH_INFO_METHOD
:
4452 case MONO_PATCH_INFO_METHOD_JUMP
:
4453 case MONO_PATCH_INFO_INTERNAL_METHOD
:
4454 case MONO_PATCH_INFO_BB
:
4455 case MONO_PATCH_INFO_LABEL
:
4456 case MONO_PATCH_INFO_RGCTX_FETCH
:
4457 case MONO_PATCH_INFO_GENERIC_CLASS_INIT
:
4458 case MONO_PATCH_INFO_MONITOR_ENTER
:
4459 case MONO_PATCH_INFO_MONITOR_EXIT
:
4460 x86_patch (ip
, target
);
4462 case MONO_PATCH_INFO_NONE
:
4465 guint32 offset
= mono_arch_get_patch_offset (ip
);
4466 *((gconstpointer
*)(ip
+ offset
)) = target
;
4474 mono_arch_emit_prolog (MonoCompile
*cfg
)
4476 MonoMethod
*method
= cfg
->method
;
4478 MonoMethodSignature
*sig
;
4480 int alloc_size
, pos
, max_offset
, i
, cfa_offset
;
4482 gboolean need_stack_frame
;
4484 cfg
->code_size
= MAX (mono_method_get_header (method
)->code_size
* 4, 10240);
4486 if (cfg
->prof_options
& MONO_PROFILE_ENTER_LEAVE
)
4487 cfg
->code_size
+= 512;
4489 code
= cfg
->native_code
= g_malloc (cfg
->code_size
);
4491 /* Offset between RSP and the CFA */
4495 cfa_offset
= sizeof (gpointer
);
4496 mono_emit_unwind_op_def_cfa (cfg
, code
, X86_ESP
, sizeof (gpointer
));
4497 // IP saved at CFA - 4
4498 /* There is no IP reg on x86 */
4499 mono_emit_unwind_op_offset (cfg
, code
, X86_NREG
, -cfa_offset
);
4501 need_stack_frame
= needs_stack_frame (cfg
);
4503 if (need_stack_frame
) {
4504 x86_push_reg (code
, X86_EBP
);
4505 cfa_offset
+= sizeof (gpointer
);
4506 mono_emit_unwind_op_def_cfa_offset (cfg
, code
, cfa_offset
);
4507 mono_emit_unwind_op_offset (cfg
, code
, X86_EBP
, - cfa_offset
);
4508 x86_mov_reg_reg (code
, X86_EBP
, X86_ESP
, 4);
4509 mono_emit_unwind_op_def_cfa_reg (cfg
, code
, X86_EBP
);
4512 alloc_size
= cfg
->stack_offset
;
4515 if (method
->wrapper_type
== MONO_WRAPPER_NATIVE_TO_MANAGED
) {
4516 /* Might need to attach the thread to the JIT or change the domain for the callback */
4517 if (appdomain_tls_offset
!= -1 && lmf_tls_offset
!= -1) {
4518 guint8
*buf
, *no_domain_branch
;
4520 code
= mono_x86_emit_tls_get (code
, X86_EAX
, appdomain_tls_offset
);
4521 x86_alu_reg_imm (code
, X86_CMP
, X86_EAX
, GPOINTER_TO_UINT (cfg
->domain
));
4522 no_domain_branch
= code
;
4523 x86_branch8 (code
, X86_CC_NE
, 0, 0);
4524 code
= mono_x86_emit_tls_get ( code
, X86_EAX
, lmf_tls_offset
);
4525 x86_test_reg_reg (code
, X86_EAX
, X86_EAX
);
4527 x86_branch8 (code
, X86_CC_NE
, 0, 0);
4528 x86_patch (no_domain_branch
, code
);
4529 x86_push_imm (code
, cfg
->domain
);
4530 code
= emit_call (cfg
, code
, MONO_PATCH_INFO_INTERNAL_METHOD
, (gpointer
)"mono_jit_thread_attach");
4531 x86_alu_reg_imm (code
, X86_ADD
, X86_ESP
, 4);
4532 x86_patch (buf
, code
);
4534 /* The TLS key actually contains a pointer to the MonoJitTlsData structure */
4535 /* FIXME: Add a separate key for LMF to avoid this */
4536 x86_alu_reg_imm (code
, X86_ADD
, X86_EAX
, G_STRUCT_OFFSET (MonoJitTlsData
, lmf
));
4540 g_assert (!cfg
->compile_aot
);
4541 x86_push_imm (code
, cfg
->domain
);
4542 code
= emit_call (cfg
, code
, MONO_PATCH_INFO_INTERNAL_METHOD
, (gpointer
)"mono_jit_thread_attach");
4543 x86_alu_reg_imm (code
, X86_ADD
, X86_ESP
, 4);
4547 if (method
->save_lmf
) {
4548 pos
+= sizeof (MonoLMF
);
4550 if (cfg
->compile_aot
)
4551 cfg
->disable_aot
= TRUE
;
4553 /* save the current IP */
4554 mono_add_patch_info (cfg
, code
+ 1 - cfg
->native_code
, MONO_PATCH_INFO_IP
, NULL
);
4555 x86_push_imm_template (code
);
4556 cfa_offset
+= sizeof (gpointer
);
4558 /* save all caller saved regs */
4559 x86_push_reg (code
, X86_EBP
);
4560 cfa_offset
+= sizeof (gpointer
);
4561 x86_push_reg (code
, X86_ESI
);
4562 cfa_offset
+= sizeof (gpointer
);
4563 mono_emit_unwind_op_offset (cfg
, code
, X86_ESI
, - cfa_offset
);
4564 x86_push_reg (code
, X86_EDI
);
4565 cfa_offset
+= sizeof (gpointer
);
4566 mono_emit_unwind_op_offset (cfg
, code
, X86_EDI
, - cfa_offset
);
4567 x86_push_reg (code
, X86_EBX
);
4568 cfa_offset
+= sizeof (gpointer
);
4569 mono_emit_unwind_op_offset (cfg
, code
, X86_EBX
, - cfa_offset
);
4571 if ((lmf_tls_offset
!= -1) && !is_win32
&& !optimize_for_xen
) {
4573 * Optimized version which uses the mono_lmf TLS variable instead of indirection
4574 * through the mono_lmf_addr TLS variable.
4576 /* %eax = previous_lmf */
4577 x86_prefix (code
, X86_GS_PREFIX
);
4578 x86_mov_reg_mem (code
, X86_EAX
, lmf_tls_offset
, 4);
4579 /* skip esp + method_info + lmf */
4580 x86_alu_reg_imm (code
, X86_SUB
, X86_ESP
, 12);
4581 /* push previous_lmf */
4582 x86_push_reg (code
, X86_EAX
);
4584 x86_prefix (code
, X86_GS_PREFIX
);
4585 x86_mov_mem_reg (code
, lmf_tls_offset
, X86_ESP
, 4);
4587 /* get the address of lmf for the current thread */
4589 * This is performance critical so we try to use some tricks to make
4593 if (lmf_addr_tls_offset
!= -1) {
4594 /* Load lmf quicky using the GS register */
4595 code
= mono_x86_emit_tls_get (code
, X86_EAX
, lmf_addr_tls_offset
);
4597 /* The TLS key actually contains a pointer to the MonoJitTlsData structure */
4598 /* FIXME: Add a separate key for LMF to avoid this */
4599 x86_alu_reg_imm (code
, X86_ADD
, X86_EAX
, G_STRUCT_OFFSET (MonoJitTlsData
, lmf
));
4602 code
= emit_call (cfg
, code
, MONO_PATCH_INFO_INTERNAL_METHOD
, (gpointer
)"mono_get_lmf_addr");
4605 /* Skip esp + method info */
4606 x86_alu_reg_imm (code
, X86_SUB
, X86_ESP
, 8);
4609 x86_push_reg (code
, X86_EAX
);
4610 /* push *lfm (previous_lmf) */
4611 x86_push_membase (code
, X86_EAX
, 0);
4613 x86_mov_membase_reg (code
, X86_EAX
, 0, X86_ESP
, 4);
4617 if (cfg
->used_int_regs
& (1 << X86_EBX
)) {
4618 x86_push_reg (code
, X86_EBX
);
4620 cfa_offset
+= sizeof (gpointer
);
4621 mono_emit_unwind_op_offset (cfg
, code
, X86_EBX
, - cfa_offset
);
4624 if (cfg
->used_int_regs
& (1 << X86_EDI
)) {
4625 x86_push_reg (code
, X86_EDI
);
4627 cfa_offset
+= sizeof (gpointer
);
4628 mono_emit_unwind_op_offset (cfg
, code
, X86_EDI
, - cfa_offset
);
4631 if (cfg
->used_int_regs
& (1 << X86_ESI
)) {
4632 x86_push_reg (code
, X86_ESI
);
4634 cfa_offset
+= sizeof (gpointer
);
4635 mono_emit_unwind_op_offset (cfg
, code
, X86_ESI
, - cfa_offset
);
4641 /* the original alloc_size is already aligned: there is %ebp and retip pushed, so realign */
4642 if (mono_do_x86_stack_align
&& need_stack_frame
) {
4643 int tot
= alloc_size
+ pos
+ 4; /* ret ip */
4644 if (need_stack_frame
)
4646 tot
&= MONO_ARCH_FRAME_ALIGNMENT
- 1;
4648 alloc_size
+= MONO_ARCH_FRAME_ALIGNMENT
- tot
;
4652 /* See mono_emit_stack_alloc */
4653 #if defined(TARGET_WIN32) || defined(MONO_ARCH_SIGSEGV_ON_ALTSTACK)
4654 guint32 remaining_size
= alloc_size
;
4655 /*FIXME handle unbounded code expansion, we should use a loop in case of more than X interactions*/
4656 guint32 required_code_size
= ((remaining_size
/ 0x1000) + 1) * 8; /*8 is the max size of x86_alu_reg_imm + x86_test_membase_reg*/
4657 guint32 offset
= code
- cfg
->native_code
;
4658 if (G_UNLIKELY (required_code_size
>= (cfg
->code_size
- offset
))) {
4659 while (required_code_size
>= (cfg
->code_size
- offset
))
4660 cfg
->code_size
*= 2;
4661 cfg
->native_code
= g_realloc (cfg
->native_code
, cfg
->code_size
);
4662 code
= cfg
->native_code
+ offset
;
4663 mono_jit_stats
.code_reallocs
++;
4665 while (remaining_size
>= 0x1000) {
4666 x86_alu_reg_imm (code
, X86_SUB
, X86_ESP
, 0x1000);
4667 x86_test_membase_reg (code
, X86_ESP
, 0, X86_ESP
);
4668 remaining_size
-= 0x1000;
4671 x86_alu_reg_imm (code
, X86_SUB
, X86_ESP
, remaining_size
);
4673 x86_alu_reg_imm (code
, X86_SUB
, X86_ESP
, alloc_size
);
4676 g_assert (need_stack_frame
);
4679 if (cfg
->method
->wrapper_type
== MONO_WRAPPER_NATIVE_TO_MANAGED
||
4680 cfg
->method
->wrapper_type
== MONO_WRAPPER_RUNTIME_INVOKE
) {
4681 x86_alu_reg_imm (code
, X86_AND
, X86_ESP
, -MONO_ARCH_FRAME_ALIGNMENT
);
4684 #if DEBUG_STACK_ALIGNMENT
4685 /* check the stack is aligned */
4686 if (need_stack_frame
&& method
->wrapper_type
== MONO_WRAPPER_NONE
) {
4687 x86_mov_reg_reg (code
, X86_ECX
, X86_ESP
, 4);
4688 x86_alu_reg_imm (code
, X86_AND
, X86_ECX
, MONO_ARCH_FRAME_ALIGNMENT
- 1);
4689 x86_alu_reg_imm (code
, X86_CMP
, X86_ECX
, 0);
4690 x86_branch_disp (code
, X86_CC_EQ
, 3, FALSE
);
4691 x86_breakpoint (code
);
4695 /* compute max_offset in order to use short forward jumps */
4697 if (cfg
->opt
& MONO_OPT_BRANCH
) {
4698 for (bb
= cfg
->bb_entry
; bb
; bb
= bb
->next_bb
) {
4700 bb
->max_offset
= max_offset
;
4702 if (cfg
->prof_options
& MONO_PROFILE_COVERAGE
)
4704 /* max alignment for loops */
4705 if ((cfg
->opt
& MONO_OPT_LOOP
) && bb_is_loop_start (bb
))
4706 max_offset
+= LOOP_ALIGNMENT
;
4708 MONO_BB_FOR_EACH_INS (bb
, ins
) {
4709 if (ins
->opcode
== OP_LABEL
)
4710 ins
->inst_c1
= max_offset
;
4712 max_offset
+= ((guint8
*)ins_get_spec (ins
->opcode
))[MONO_INST_LEN
];
4717 /* store runtime generic context */
4718 if (cfg
->rgctx_var
) {
4719 g_assert (cfg
->rgctx_var
->opcode
== OP_REGOFFSET
&& cfg
->rgctx_var
->inst_basereg
== X86_EBP
);
4721 x86_mov_membase_reg (code
, X86_EBP
, cfg
->rgctx_var
->inst_offset
, MONO_ARCH_RGCTX_REG
, 4);
4724 if (mono_jit_trace_calls
!= NULL
&& mono_trace_eval (method
))
4725 code
= mono_arch_instrument_prolog (cfg
, mono_trace_enter_method
, code
, TRUE
);
4727 /* load arguments allocated to register from the stack */
4728 sig
= mono_method_signature (method
);
4731 for (i
= 0; i
< sig
->param_count
+ sig
->hasthis
; ++i
) {
4732 inst
= cfg
->args
[pos
];
4733 if (inst
->opcode
== OP_REGVAR
) {
4734 g_assert (need_stack_frame
);
4735 x86_mov_reg_membase (code
, inst
->dreg
, X86_EBP
, inst
->inst_offset
, 4);
4736 if (cfg
->verbose_level
> 2)
4737 g_print ("Argument %d assigned to register %s\n", pos
, mono_arch_regname (inst
->dreg
));
4742 cfg
->code_len
= code
- cfg
->native_code
;
4744 g_assert (cfg
->code_len
< cfg
->code_size
);
4750 mono_arch_emit_epilog (MonoCompile
*cfg
)
4752 MonoMethod
*method
= cfg
->method
;
4753 MonoMethodSignature
*sig
= mono_method_signature (method
);
4755 guint32 stack_to_pop
;
4757 int max_epilog_size
= 16;
4759 gboolean need_stack_frame
= needs_stack_frame (cfg
);
4761 if (cfg
->method
->save_lmf
)
4762 max_epilog_size
+= 128;
4764 while (cfg
->code_len
+ max_epilog_size
> (cfg
->code_size
- 16)) {
4765 cfg
->code_size
*= 2;
4766 cfg
->native_code
= g_realloc (cfg
->native_code
, cfg
->code_size
);
4767 mono_jit_stats
.code_reallocs
++;
4770 code
= cfg
->native_code
+ cfg
->code_len
;
4772 if (mono_jit_trace_calls
!= NULL
&& mono_trace_eval (method
))
4773 code
= mono_arch_instrument_epilog (cfg
, mono_trace_leave_method
, code
, TRUE
);
4775 /* the code restoring the registers must be kept in sync with OP_JMP */
4778 if (method
->save_lmf
) {
4779 gint32 prev_lmf_reg
;
4780 gint32 lmf_offset
= -sizeof (MonoLMF
);
4782 /* check if we need to restore protection of the stack after a stack overflow */
4783 if (mono_get_jit_tls_offset () != -1) {
4785 code
= mono_x86_emit_tls_get (code
, X86_ECX
, mono_get_jit_tls_offset ());
4786 /* we load the value in a separate instruction: this mechanism may be
4787 * used later as a safer way to do thread interruption
4789 x86_mov_reg_membase (code
, X86_ECX
, X86_ECX
, G_STRUCT_OFFSET (MonoJitTlsData
, restore_stack_prot
), 4);
4790 x86_alu_reg_imm (code
, X86_CMP
, X86_ECX
, 0);
4792 x86_branch8 (code
, X86_CC_Z
, 0, FALSE
);
4793 /* note that the call trampoline will preserve eax/edx */
4794 x86_call_reg (code
, X86_ECX
);
4795 x86_patch (patch
, code
);
4797 /* FIXME: maybe save the jit tls in the prolog */
4799 if ((lmf_tls_offset
!= -1) && !is_win32
&& !optimize_for_xen
) {
4801 * Optimized version which uses the mono_lmf TLS variable instead of indirection
4802 * through the mono_lmf_addr TLS variable.
4804 /* reg = previous_lmf */
4805 x86_mov_reg_membase (code
, X86_ECX
, X86_EBP
, lmf_offset
+ G_STRUCT_OFFSET (MonoLMF
, previous_lmf
), 4);
4807 /* lmf = previous_lmf */
4808 x86_prefix (code
, X86_GS_PREFIX
);
4809 x86_mov_mem_reg (code
, lmf_tls_offset
, X86_ECX
, 4);
4811 /* Find a spare register */
4812 switch (mini_type_get_underlying_type (cfg
->generic_sharing_context
, sig
->ret
)->type
) {
4815 prev_lmf_reg
= X86_EDI
;
4816 cfg
->used_int_regs
|= (1 << X86_EDI
);
4819 prev_lmf_reg
= X86_EDX
;
4823 /* reg = previous_lmf */
4824 x86_mov_reg_membase (code
, prev_lmf_reg
, X86_EBP
, lmf_offset
+ G_STRUCT_OFFSET (MonoLMF
, previous_lmf
), 4);
4827 x86_mov_reg_membase (code
, X86_ECX
, X86_EBP
, lmf_offset
+ G_STRUCT_OFFSET (MonoLMF
, lmf_addr
), 4);
4829 /* *(lmf) = previous_lmf */
4830 x86_mov_membase_reg (code
, X86_ECX
, 0, prev_lmf_reg
, 4);
4833 /* restore caller saved regs */
4834 if (cfg
->used_int_regs
& (1 << X86_EBX
)) {
4835 x86_mov_reg_membase (code
, X86_EBX
, X86_EBP
, lmf_offset
+ G_STRUCT_OFFSET (MonoLMF
, ebx
), 4);
4838 if (cfg
->used_int_regs
& (1 << X86_EDI
)) {
4839 x86_mov_reg_membase (code
, X86_EDI
, X86_EBP
, lmf_offset
+ G_STRUCT_OFFSET (MonoLMF
, edi
), 4);
4841 if (cfg
->used_int_regs
& (1 << X86_ESI
)) {
4842 x86_mov_reg_membase (code
, X86_ESI
, X86_EBP
, lmf_offset
+ G_STRUCT_OFFSET (MonoLMF
, esi
), 4);
4845 /* EBP is restored by LEAVE */
4847 if (cfg
->used_int_regs
& (1 << X86_EBX
)) {
4850 if (cfg
->used_int_regs
& (1 << X86_EDI
)) {
4853 if (cfg
->used_int_regs
& (1 << X86_ESI
)) {
4858 g_assert (need_stack_frame
);
4859 x86_lea_membase (code
, X86_ESP
, X86_EBP
, pos
);
4862 if (cfg
->used_int_regs
& (1 << X86_ESI
)) {
4863 x86_pop_reg (code
, X86_ESI
);
4865 if (cfg
->used_int_regs
& (1 << X86_EDI
)) {
4866 x86_pop_reg (code
, X86_EDI
);
4868 if (cfg
->used_int_regs
& (1 << X86_EBX
)) {
4869 x86_pop_reg (code
, X86_EBX
);
4873 /* Load returned vtypes into registers if needed */
4874 cinfo
= get_call_info (cfg
->generic_sharing_context
, cfg
->mempool
, sig
, FALSE
);
4875 if (cinfo
->ret
.storage
== ArgValuetypeInReg
) {
4876 for (quad
= 0; quad
< 2; quad
++) {
4877 switch (cinfo
->ret
.pair_storage
[quad
]) {
4879 x86_mov_reg_membase (code
, cinfo
->ret
.pair_regs
[quad
], cfg
->ret
->inst_basereg
, cfg
->ret
->inst_offset
+ (quad
* sizeof (gpointer
)), 4);
4881 case ArgOnFloatFpStack
:
4882 x86_fld_membase (code
, cfg
->ret
->inst_basereg
, cfg
->ret
->inst_offset
+ (quad
* sizeof (gpointer
)), FALSE
);
4884 case ArgOnDoubleFpStack
:
4885 x86_fld_membase (code
, cfg
->ret
->inst_basereg
, cfg
->ret
->inst_offset
+ (quad
* sizeof (gpointer
)), TRUE
);
4890 g_assert_not_reached ();
4895 if (need_stack_frame
)
4898 if (CALLCONV_IS_STDCALL (sig
)) {
4899 MonoJitArgumentInfo
*arg_info
= alloca (sizeof (MonoJitArgumentInfo
) * (sig
->param_count
+ 1));
4901 stack_to_pop
= mono_arch_get_argument_info (sig
, sig
->param_count
, arg_info
);
4902 } else if (MONO_TYPE_ISSTRUCT (mono_method_signature (cfg
->method
)->ret
) && (cinfo
->ret
.storage
== ArgOnStack
))
4908 g_assert (need_stack_frame
);
4909 x86_ret_imm (code
, stack_to_pop
);
4914 cfg
->code_len
= code
- cfg
->native_code
;
4916 g_assert (cfg
->code_len
< cfg
->code_size
);
4920 mono_arch_emit_exceptions (MonoCompile
*cfg
)
4922 MonoJumpInfo
*patch_info
;
4925 MonoClass
*exc_classes
[16];
4926 guint8
*exc_throw_start
[16], *exc_throw_end
[16];
4930 /* Compute needed space */
4931 for (patch_info
= cfg
->patch_info
; patch_info
; patch_info
= patch_info
->next
) {
4932 if (patch_info
->type
== MONO_PATCH_INFO_EXC
)
4937 * make sure we have enough space for exceptions
4938 * 16 is the size of two push_imm instructions and a call
4940 if (cfg
->compile_aot
)
4941 code_size
= exc_count
* 32;
4943 code_size
= exc_count
* 16;
4945 while (cfg
->code_len
+ code_size
> (cfg
->code_size
- 16)) {
4946 cfg
->code_size
*= 2;
4947 cfg
->native_code
= g_realloc (cfg
->native_code
, cfg
->code_size
);
4948 mono_jit_stats
.code_reallocs
++;
4951 code
= cfg
->native_code
+ cfg
->code_len
;
4954 for (patch_info
= cfg
->patch_info
; patch_info
; patch_info
= patch_info
->next
) {
4955 switch (patch_info
->type
) {
4956 case MONO_PATCH_INFO_EXC
: {
4957 MonoClass
*exc_class
;
4961 x86_patch (patch_info
->ip
.i
+ cfg
->native_code
, code
);
4963 exc_class
= mono_class_from_name (mono_defaults
.corlib
, "System", patch_info
->data
.name
);
4964 g_assert (exc_class
);
4965 throw_ip
= patch_info
->ip
.i
;
4967 /* Find a throw sequence for the same exception class */
4968 for (i
= 0; i
< nthrows
; ++i
)
4969 if (exc_classes
[i
] == exc_class
)
4972 x86_push_imm (code
, (exc_throw_end
[i
] - cfg
->native_code
) - throw_ip
);
4973 x86_jump_code (code
, exc_throw_start
[i
]);
4974 patch_info
->type
= MONO_PATCH_INFO_NONE
;
4979 /* Compute size of code following the push <OFFSET> */
4982 /*This is aligned to 16 bytes by the callee. This way we save a few bytes here.*/
4984 if ((code
- cfg
->native_code
) - throw_ip
< 126 - size
) {
4985 /* Use the shorter form */
4987 x86_push_imm (code
, 0);
4991 x86_push_imm (code
, 0xf0f0f0f0);
4996 exc_classes
[nthrows
] = exc_class
;
4997 exc_throw_start
[nthrows
] = code
;
5000 x86_push_imm (code
, exc_class
->type_token
- MONO_TOKEN_TYPE_DEF
);
5001 patch_info
->data
.name
= "mono_arch_throw_corlib_exception";
5002 patch_info
->type
= MONO_PATCH_INFO_INTERNAL_METHOD
;
5003 patch_info
->ip
.i
= code
- cfg
->native_code
;
5004 x86_call_code (code
, 0);
5005 x86_push_imm (buf
, (code
- cfg
->native_code
) - throw_ip
);
5010 exc_throw_end
[nthrows
] = code
;
5022 cfg
->code_len
= code
- cfg
->native_code
;
5024 g_assert (cfg
->code_len
< cfg
->code_size
);
5028 mono_arch_flush_icache (guint8
*code
, gint size
)
5034 mono_arch_flush_register_windows (void)
5039 mono_arch_is_inst_imm (gint64 imm
)
5045 * Support for fast access to the thread-local lmf structure using the GS
5046 * segment register on NPTL + kernel 2.6.x.
5049 static gboolean tls_offset_inited
= FALSE
;
5052 mono_arch_setup_jit_tls_data (MonoJitTlsData
*tls
)
5054 if (!tls_offset_inited
) {
5055 if (!getenv ("MONO_NO_TLS")) {
5058 * We need to init this multiple times, since when we are first called, the key might not
5059 * be initialized yet.
5061 appdomain_tls_offset
= mono_domain_get_tls_key ();
5062 lmf_tls_offset
= mono_get_jit_tls_key ();
5064 /* Only 64 tls entries can be accessed using inline code */
5065 if (appdomain_tls_offset
>= 64)
5066 appdomain_tls_offset
= -1;
5067 if (lmf_tls_offset
>= 64)
5068 lmf_tls_offset
= -1;
5071 optimize_for_xen
= access ("/proc/xen", F_OK
) == 0;
5073 tls_offset_inited
= TRUE
;
5074 appdomain_tls_offset
= mono_domain_get_tls_offset ();
5075 lmf_tls_offset
= mono_get_lmf_tls_offset ();
5076 lmf_addr_tls_offset
= mono_get_lmf_addr_tls_offset ();
5083 mono_arch_free_jit_tls_data (MonoJitTlsData
*tls
)
5087 #ifdef MONO_ARCH_HAVE_IMT
5089 // Linear handler, the bsearch head compare is shorter
5090 //[2 + 4] x86_alu_reg_imm (code, X86_CMP, ins->sreg1, ins->inst_imm);
5091 //[1 + 1] x86_branch8(inst,cond,imm,is_signed)
5092 // x86_patch(ins,target)
5093 //[1 + 5] x86_jump_mem(inst,mem)
5096 #define BR_SMALL_SIZE 2
5097 #define BR_LARGE_SIZE 5
5098 #define JUMP_IMM_SIZE 6
5099 #define ENABLE_WRONG_METHOD_CHECK 0
5103 imt_branch_distance (MonoIMTCheckItem
**imt_entries
, int start
, int target
)
5105 int i
, distance
= 0;
5106 for (i
= start
; i
< target
; ++i
)
5107 distance
+= imt_entries
[i
]->chunk_size
;
5112 * LOCKING: called with the domain lock held
5115 mono_arch_build_imt_thunk (MonoVTable
*vtable
, MonoDomain
*domain
, MonoIMTCheckItem
**imt_entries
, int count
,
5116 gpointer fail_tramp
)
5120 guint8
*code
, *start
;
5122 for (i
= 0; i
< count
; ++i
) {
5123 MonoIMTCheckItem
*item
= imt_entries
[i
];
5124 if (item
->is_equals
) {
5125 if (item
->check_target_idx
) {
5126 if (!item
->compare_done
)
5127 item
->chunk_size
+= CMP_SIZE
;
5128 item
->chunk_size
+= BR_SMALL_SIZE
+ JUMP_IMM_SIZE
;
5131 item
->chunk_size
+= CMP_SIZE
+ BR_SMALL_SIZE
+ JUMP_IMM_SIZE
* 2;
5133 item
->chunk_size
+= JUMP_IMM_SIZE
;
5134 #if ENABLE_WRONG_METHOD_CHECK
5135 item
->chunk_size
+= CMP_SIZE
+ BR_SMALL_SIZE
+ 1;
5140 item
->chunk_size
+= CMP_SIZE
+ BR_LARGE_SIZE
;
5141 imt_entries
[item
->check_target_idx
]->compare_done
= TRUE
;
5143 size
+= item
->chunk_size
;
5146 code
= mono_method_alloc_generic_virtual_thunk (domain
, size
);
5148 code
= mono_domain_code_reserve (domain
, size
);
5150 for (i
= 0; i
< count
; ++i
) {
5151 MonoIMTCheckItem
*item
= imt_entries
[i
];
5152 item
->code_target
= code
;
5153 if (item
->is_equals
) {
5154 if (item
->check_target_idx
) {
5155 if (!item
->compare_done
)
5156 x86_alu_reg_imm (code
, X86_CMP
, MONO_ARCH_IMT_REG
, (guint32
)item
->key
);
5157 item
->jmp_code
= code
;
5158 x86_branch8 (code
, X86_CC_NE
, 0, FALSE
);
5159 if (item
->has_target_code
)
5160 x86_jump_code (code
, item
->value
.target_code
);
5162 x86_jump_mem (code
, & (vtable
->vtable
[item
->value
.vtable_slot
]));
5165 x86_alu_reg_imm (code
, X86_CMP
, MONO_ARCH_IMT_REG
, (guint32
)item
->key
);
5166 item
->jmp_code
= code
;
5167 x86_branch8 (code
, X86_CC_NE
, 0, FALSE
);
5168 if (item
->has_target_code
)
5169 x86_jump_code (code
, item
->value
.target_code
);
5171 x86_jump_mem (code
, & (vtable
->vtable
[item
->value
.vtable_slot
]));
5172 x86_patch (item
->jmp_code
, code
);
5173 x86_jump_code (code
, fail_tramp
);
5174 item
->jmp_code
= NULL
;
5176 /* enable the commented code to assert on wrong method */
5177 #if ENABLE_WRONG_METHOD_CHECK
5178 x86_alu_reg_imm (code
, X86_CMP
, MONO_ARCH_IMT_REG
, (guint32
)item
->key
);
5179 item
->jmp_code
= code
;
5180 x86_branch8 (code
, X86_CC_NE
, 0, FALSE
);
5182 if (item
->has_target_code
)
5183 x86_jump_code (code
, item
->value
.target_code
);
5185 x86_jump_mem (code
, & (vtable
->vtable
[item
->value
.vtable_slot
]));
5186 #if ENABLE_WRONG_METHOD_CHECK
5187 x86_patch (item
->jmp_code
, code
);
5188 x86_breakpoint (code
);
5189 item
->jmp_code
= NULL
;
5194 x86_alu_reg_imm (code
, X86_CMP
, MONO_ARCH_IMT_REG
, (guint32
)item
->key
);
5195 item
->jmp_code
= code
;
5196 if (x86_is_imm8 (imt_branch_distance (imt_entries
, i
, item
->check_target_idx
)))
5197 x86_branch8 (code
, X86_CC_GE
, 0, FALSE
);
5199 x86_branch32 (code
, X86_CC_GE
, 0, FALSE
);
5202 /* patch the branches to get to the target items */
5203 for (i
= 0; i
< count
; ++i
) {
5204 MonoIMTCheckItem
*item
= imt_entries
[i
];
5205 if (item
->jmp_code
) {
5206 if (item
->check_target_idx
) {
5207 x86_patch (item
->jmp_code
, imt_entries
[item
->check_target_idx
]->code_target
);
5213 mono_stats
.imt_thunks_size
+= code
- start
;
5214 g_assert (code
- start
<= size
);
5218 char *buff
= g_strdup_printf ("thunk_for_class_%s_%s_entries_%d", vtable
->klass
->name_space
, vtable
->klass
->name
, count
);
5219 mono_disassemble_code (NULL
, (guint8
*)start
, code
- start
, buff
);
5228 mono_arch_find_imt_method (mgreg_t
*regs
, guint8
*code
)
5230 return (MonoMethod
*) regs
[MONO_ARCH_IMT_REG
];
5235 mono_arch_find_static_call_vtable (mgreg_t
*regs
, guint8
*code
)
5237 return (MonoVTable
*) regs
[MONO_ARCH_RGCTX_REG
];
5241 mono_arch_emit_inst_for_method (MonoCompile
*cfg
, MonoMethod
*cmethod
, MonoMethodSignature
*fsig
, MonoInst
**args
)
5243 MonoInst
*ins
= NULL
;
5246 if (cmethod
->klass
== mono_defaults
.math_class
) {
5247 if (strcmp (cmethod
->name
, "Sin") == 0) {
5249 } else if (strcmp (cmethod
->name
, "Cos") == 0) {
5251 } else if (strcmp (cmethod
->name
, "Tan") == 0) {
5253 } else if (strcmp (cmethod
->name
, "Atan") == 0) {
5255 } else if (strcmp (cmethod
->name
, "Sqrt") == 0) {
5257 } else if (strcmp (cmethod
->name
, "Abs") == 0 && fsig
->params
[0]->type
== MONO_TYPE_R8
) {
5259 } else if (strcmp (cmethod
->name
, "Round") == 0 && fsig
->param_count
== 1 && fsig
->params
[0]->type
== MONO_TYPE_R8
) {
5264 MONO_INST_NEW (cfg
, ins
, opcode
);
5265 ins
->type
= STACK_R8
;
5266 ins
->dreg
= mono_alloc_freg (cfg
);
5267 ins
->sreg1
= args
[0]->dreg
;
5268 MONO_ADD_INS (cfg
->cbb
, ins
);
5271 if (cfg
->opt
& MONO_OPT_CMOV
) {
5274 if (strcmp (cmethod
->name
, "Min") == 0) {
5275 if (fsig
->params
[0]->type
== MONO_TYPE_I4
)
5277 } else if (strcmp (cmethod
->name
, "Max") == 0) {
5278 if (fsig
->params
[0]->type
== MONO_TYPE_I4
)
5283 MONO_INST_NEW (cfg
, ins
, opcode
);
5284 ins
->type
= STACK_I4
;
5285 ins
->dreg
= mono_alloc_ireg (cfg
);
5286 ins
->sreg1
= args
[0]->dreg
;
5287 ins
->sreg2
= args
[1]->dreg
;
5288 MONO_ADD_INS (cfg
->cbb
, ins
);
5293 /* OP_FREM is not IEEE compatible */
5294 else if (strcmp (cmethod
->name
, "IEEERemainder") == 0) {
5295 MONO_INST_NEW (cfg
, ins
, OP_FREM
);
5296 ins
->inst_i0
= args
[0];
5297 ins
->inst_i1
= args
[1];
5306 mono_arch_print_tree (MonoInst
*tree
, int arity
)
5311 MonoInst
* mono_arch_get_domain_intrinsic (MonoCompile
* cfg
)
5317 if (appdomain_tls_offset
== -1)
5320 MONO_INST_NEW (cfg
, ins
, OP_TLS_GET
);
5321 ins
->inst_offset
= appdomain_tls_offset
;
5326 mono_arch_get_patch_offset (guint8
*code
)
5328 if ((code
[0] == 0x8b) && (x86_modrm_mod (code
[1]) == 0x2))
5330 else if ((code
[0] == 0xba))
5332 else if ((code
[0] == 0x68))
5335 else if ((code
[0] == 0xff) && (x86_modrm_reg (code
[1]) == 0x6))
5336 /* push <OFFSET>(<REG>) */
5338 else if ((code
[0] == 0xff) && (x86_modrm_reg (code
[1]) == 0x2))
5339 /* call *<OFFSET>(<REG>) */
5341 else if ((code
[0] == 0xdd) || (code
[0] == 0xd9))
5344 else if ((code
[0] == 0x58) && (code
[1] == 0x05))
5345 /* pop %eax; add <OFFSET>, %eax */
5347 else if ((code
[0] >= 0x58) && (code
[0] <= 0x58 + X86_NREG
) && (code
[1] == 0x81))
5348 /* pop <REG>; add <OFFSET>, <REG> */
5350 else if ((code
[0] >= 0xb8) && (code
[0] < 0xb8 + 8))
5351 /* mov <REG>, imm */
5354 g_assert_not_reached ();
5360 * mono_breakpoint_clean_code:
5362 * Copy @size bytes from @code - @offset to the buffer @buf. If the debugger inserted software
5363 * breakpoints in the original code, they are removed in the copy.
5365 * Returns TRUE if no sw breakpoint was present.
5368 mono_breakpoint_clean_code (guint8
*method_start
, guint8
*code
, int offset
, guint8
*buf
, int size
)
5371 gboolean can_write
= TRUE
;
5373 * If method_start is non-NULL we need to perform bound checks, since we access memory
5374 * at code - offset we could go before the start of the method and end up in a different
5375 * page of memory that is not mapped or read incorrect data anyway. We zero-fill the bytes
5378 if (!method_start
|| code
- offset
>= method_start
) {
5379 memcpy (buf
, code
- offset
, size
);
5381 int diff
= code
- method_start
;
5382 memset (buf
, 0, size
);
5383 memcpy (buf
+ offset
- diff
, method_start
, diff
+ size
- offset
);
5386 for (i
= 0; i
< MONO_BREAKPOINT_ARRAY_SIZE
; ++i
) {
5387 int idx
= mono_breakpoint_info_index
[i
];
5391 ptr
= mono_breakpoint_info
[idx
].address
;
5392 if (ptr
>= code
&& ptr
< code
+ size
) {
5393 guint8 saved_byte
= mono_breakpoint_info
[idx
].saved_byte
;
5395 /*g_print ("patching %p with 0x%02x (was: 0x%02x)\n", ptr, saved_byte, buf [ptr - code]);*/
5396 buf
[ptr
- code
] = saved_byte
;
5403 mono_arch_get_vcall_slot (guint8
*code
, mgreg_t
*regs
, int *displacement
)
5409 mono_breakpoint_clean_code (NULL
, code
, 8, buf
, sizeof (buf
));
5417 * A given byte sequence can match more than case here, so we have to be
5418 * really careful about the ordering of the cases. Longer sequences
5420 * There are two types of calls:
5421 * - direct calls: 0xff address_byte 8/32 bits displacement
5422 * - indirect calls: nop nop nop <call>
5423 * The nops make sure we don't confuse the instruction preceeding an indirect
5424 * call with a direct call.
5426 if ((code
[1] != 0xe8) && (code
[3] == 0xff) && ((code
[4] & 0x18) == 0x10) && ((code
[4] >> 6) == 1)) {
5427 reg
= code
[4] & 0x07;
5428 disp
= (signed char)code
[5];
5429 } else if ((code
[0] == 0xff) && ((code
[1] & 0x18) == 0x10) && ((code
[1] >> 6) == 2)) {
5430 reg
= code
[1] & 0x07;
5431 disp
= *((gint32
*)(code
+ 2));
5432 } else if ((code
[1] == 0xe8)) {
5434 } else if ((code
[4] == 0xff) && (((code
[5] >> 6) & 0x3) == 0) && (((code
[5] >> 3) & 0x7) == 2)) {
5436 * This is a interface call
5437 * 8b 40 30 mov 0x30(%eax),%eax
5438 * ff 10 call *(%eax)
5441 reg
= code
[5] & 0x07;
5446 *displacement
= disp
;
5447 return (gpointer
)regs
[reg
];
5451 * mono_x86_get_this_arg_offset:
5453 * Return the offset of the stack location where this is passed during a virtual
5457 mono_x86_get_this_arg_offset (MonoGenericSharingContext
*gsctx
, MonoMethodSignature
*sig
)
5459 CallInfo
*cinfo
= NULL
;
5462 if (MONO_TYPE_ISSTRUCT (sig
->ret
)) {
5463 cinfo
= get_call_info (gsctx
, NULL
, sig
, FALSE
);
5465 offset
= cinfo
->args
[0].offset
;
5474 mono_arch_get_this_arg_from_call (MonoGenericSharingContext
*gsctx
, MonoMethodSignature
*sig
,
5475 mgreg_t
*regs
, guint8
*code
)
5477 guint32 esp
= regs
[X86_ESP
];
5478 CallInfo
*cinfo
= NULL
;
5483 * Avoid expensive calls to get_generic_context_from_code () + get_call_info
5486 if (MONO_TYPE_ISSTRUCT (sig
->ret
)) {
5488 gsctx
= mono_get_generic_context_from_code (code
);
5489 cinfo
= get_call_info (gsctx
, NULL
, sig
, FALSE
);
5491 offset
= cinfo
->args
[0].offset
;
5497 * The stack looks like:
5500 * <possible vtype return address>
5502 * <4 pointers pushed by mono_arch_create_trampoline_code ()>
5504 res
= (((MonoObject
**)esp
) [5 + (offset
/ 4)]);
5510 #define MAX_ARCH_DELEGATE_PARAMS 10
5513 mono_arch_get_delegate_invoke_impl (MonoMethodSignature
*sig
, gboolean has_target
)
5515 guint8
*code
, *start
;
5517 if (sig
->param_count
> MAX_ARCH_DELEGATE_PARAMS
)
5520 /* FIXME: Support more cases */
5521 if (MONO_TYPE_ISSTRUCT (sig
->ret
))
5525 * The stack contains:
5531 static guint8
* cached
= NULL
;
5535 start
= code
= mono_global_codeman_reserve (64);
5537 /* Replace the this argument with the target */
5538 x86_mov_reg_membase (code
, X86_EAX
, X86_ESP
, 4, 4);
5539 x86_mov_reg_membase (code
, X86_ECX
, X86_EAX
, G_STRUCT_OFFSET (MonoDelegate
, target
), 4);
5540 x86_mov_membase_reg (code
, X86_ESP
, 4, X86_ECX
, 4);
5541 x86_jump_membase (code
, X86_EAX
, G_STRUCT_OFFSET (MonoDelegate
, method_ptr
));
5543 g_assert ((code
- start
) < 64);
5545 mono_debug_add_delegate_trampoline (start
, code
- start
);
5547 mono_memory_barrier ();
5551 static guint8
* cache
[MAX_ARCH_DELEGATE_PARAMS
+ 1] = {NULL
};
5553 /* 8 for mov_reg and jump, plus 8 for each parameter */
5554 int code_reserve
= 8 + (sig
->param_count
* 8);
5556 for (i
= 0; i
< sig
->param_count
; ++i
)
5557 if (!mono_is_regsize_var (sig
->params
[i
]))
5560 code
= cache
[sig
->param_count
];
5565 * The stack contains:
5566 * <args in reverse order>
5571 * <args in reverse order>
5574 * without unbalancing the stack.
5575 * So move each arg up a spot in the stack (overwriting un-needed 'this' arg)
5576 * and leaving original spot of first arg as placeholder in stack so
5577 * when callee pops stack everything works.
5580 start
= code
= mono_global_codeman_reserve (code_reserve
);
5582 /* store delegate for access to method_ptr */
5583 x86_mov_reg_membase (code
, X86_ECX
, X86_ESP
, 4, 4);
5586 for (i
= 0; i
< sig
->param_count
; ++i
) {
5587 x86_mov_reg_membase (code
, X86_EAX
, X86_ESP
, (i
+2)*4, 4);
5588 x86_mov_membase_reg (code
, X86_ESP
, (i
+1)*4, X86_EAX
, 4);
5591 x86_jump_membase (code
, X86_ECX
, G_STRUCT_OFFSET (MonoDelegate
, method_ptr
));
5593 g_assert ((code
- start
) < code_reserve
);
5595 mono_debug_add_delegate_trampoline (start
, code
- start
);
5597 mono_memory_barrier ();
5599 cache
[sig
->param_count
] = start
;
5606 mono_arch_context_get_int_reg (MonoContext
*ctx
, int reg
)
5609 case X86_EAX
: return (gpointer
)ctx
->eax
;
5610 case X86_EBX
: return (gpointer
)ctx
->ebx
;
5611 case X86_ECX
: return (gpointer
)ctx
->ecx
;
5612 case X86_EDX
: return (gpointer
)ctx
->edx
;
5613 case X86_ESP
: return (gpointer
)ctx
->esp
;
5614 case X86_EBP
: return (gpointer
)ctx
->ebp
;
5615 case X86_ESI
: return (gpointer
)ctx
->esi
;
5616 case X86_EDI
: return (gpointer
)ctx
->edi
;
5617 default: g_assert_not_reached ();
5621 #ifdef MONO_ARCH_SIMD_INTRINSICS
5624 get_float_to_x_spill_area (MonoCompile
*cfg
)
5626 if (!cfg
->fconv_to_r8_x_var
) {
5627 cfg
->fconv_to_r8_x_var
= mono_compile_create_var (cfg
, &mono_defaults
.double_class
->byval_arg
, OP_LOCAL
);
5628 cfg
->fconv_to_r8_x_var
->flags
|= MONO_INST_VOLATILE
; /*FIXME, use the don't regalloc flag*/
5630 return cfg
->fconv_to_r8_x_var
;
5634 * Convert all fconv opts that MONO_OPT_SSE2 would get wrong.
5637 mono_arch_decompose_opts (MonoCompile
*cfg
, MonoInst
*ins
)
5640 int dreg
, src_opcode
;
5642 if (!(cfg
->opt
& MONO_OPT_SSE2
) || !(cfg
->opt
& MONO_OPT_SIMD
) || COMPILE_LLVM (cfg
))
5645 switch (src_opcode
= ins
->opcode
) {
5646 case OP_FCONV_TO_I1
:
5647 case OP_FCONV_TO_U1
:
5648 case OP_FCONV_TO_I2
:
5649 case OP_FCONV_TO_U2
:
5650 case OP_FCONV_TO_I4
:
5657 /* dreg is the IREG and sreg1 is the FREG */
5658 MONO_INST_NEW (cfg
, fconv
, OP_FCONV_TO_R8_X
);
5659 fconv
->klass
= NULL
; /*FIXME, what can I use here as the Mono.Simd lib might not be loaded yet*/
5660 fconv
->sreg1
= ins
->sreg1
;
5661 fconv
->dreg
= mono_alloc_ireg (cfg
);
5662 fconv
->type
= STACK_VTYPE
;
5663 fconv
->backend
.spill_var
= get_float_to_x_spill_area (cfg
);
5665 mono_bblock_insert_before_ins (cfg
->cbb
, ins
, fconv
);
5669 ins
->opcode
= OP_XCONV_R8_TO_I4
;
5671 ins
->klass
= mono_defaults
.int32_class
;
5672 ins
->sreg1
= fconv
->dreg
;
5674 ins
->type
= STACK_I4
;
5675 ins
->backend
.source_opcode
= src_opcode
;
5678 #endif /* #ifdef MONO_ARCH_SIMD_INTRINSICS */
5681 mono_arch_decompose_long_opts (MonoCompile
*cfg
, MonoInst
*long_ins
)
5686 if (long_ins
->opcode
== OP_LNEG
) {
5688 MONO_EMIT_NEW_UNALU (cfg
, OP_INEG
, ins
->dreg
+ 1, ins
->sreg1
+ 1);
5689 MONO_EMIT_NEW_BIALU_IMM (cfg
, OP_ADC_IMM
, ins
->dreg
+ 2, ins
->sreg1
+ 2, 0);
5690 MONO_EMIT_NEW_UNALU (cfg
, OP_INEG
, ins
->dreg
+ 2, ins
->dreg
+ 2);
5695 #ifdef MONO_ARCH_SIMD_INTRINSICS
5697 if (!(cfg
->opt
& MONO_OPT_SIMD
))
5700 /*TODO move this to simd-intrinsic.c once we support sse 4.1 dword extractors since we need the runtime caps info */
5701 switch (long_ins
->opcode
) {
5703 vreg
= long_ins
->sreg1
;
5705 if (long_ins
->inst_c0
) {
5706 MONO_INST_NEW (cfg
, ins
, OP_PSHUFLED
);
5707 ins
->klass
= long_ins
->klass
;
5708 ins
->sreg1
= long_ins
->sreg1
;
5710 ins
->type
= STACK_VTYPE
;
5711 ins
->dreg
= vreg
= alloc_ireg (cfg
);
5712 MONO_ADD_INS (cfg
->cbb
, ins
);
5715 MONO_INST_NEW (cfg
, ins
, OP_EXTRACT_I4
);
5716 ins
->klass
= mono_defaults
.int32_class
;
5718 ins
->type
= STACK_I4
;
5719 ins
->dreg
= long_ins
->dreg
+ 1;
5720 MONO_ADD_INS (cfg
->cbb
, ins
);
5722 MONO_INST_NEW (cfg
, ins
, OP_PSHUFLED
);
5723 ins
->klass
= long_ins
->klass
;
5724 ins
->sreg1
= long_ins
->sreg1
;
5725 ins
->inst_c0
= long_ins
->inst_c0
? 3 : 1;
5726 ins
->type
= STACK_VTYPE
;
5727 ins
->dreg
= vreg
= alloc_ireg (cfg
);
5728 MONO_ADD_INS (cfg
->cbb
, ins
);
5730 MONO_INST_NEW (cfg
, ins
, OP_EXTRACT_I4
);
5731 ins
->klass
= mono_defaults
.int32_class
;
5733 ins
->type
= STACK_I4
;
5734 ins
->dreg
= long_ins
->dreg
+ 2;
5735 MONO_ADD_INS (cfg
->cbb
, ins
);
5737 long_ins
->opcode
= OP_NOP
;
5739 case OP_INSERTX_I8_SLOW
:
5740 MONO_INST_NEW (cfg
, ins
, OP_INSERTX_I4_SLOW
);
5741 ins
->dreg
= long_ins
->dreg
;
5742 ins
->sreg1
= long_ins
->dreg
;
5743 ins
->sreg2
= long_ins
->sreg2
+ 1;
5744 ins
->inst_c0
= long_ins
->inst_c0
* 2;
5745 MONO_ADD_INS (cfg
->cbb
, ins
);
5747 MONO_INST_NEW (cfg
, ins
, OP_INSERTX_I4_SLOW
);
5748 ins
->dreg
= long_ins
->dreg
;
5749 ins
->sreg1
= long_ins
->dreg
;
5750 ins
->sreg2
= long_ins
->sreg2
+ 2;
5751 ins
->inst_c0
= long_ins
->inst_c0
* 2 + 1;
5752 MONO_ADD_INS (cfg
->cbb
, ins
);
5754 long_ins
->opcode
= OP_NOP
;
5757 MONO_INST_NEW (cfg
, ins
, OP_ICONV_TO_X
);
5758 ins
->dreg
= long_ins
->dreg
;
5759 ins
->sreg1
= long_ins
->sreg1
+ 1;
5760 ins
->klass
= long_ins
->klass
;
5761 ins
->type
= STACK_VTYPE
;
5762 MONO_ADD_INS (cfg
->cbb
, ins
);
5764 MONO_INST_NEW (cfg
, ins
, OP_INSERTX_I4_SLOW
);
5765 ins
->dreg
= long_ins
->dreg
;
5766 ins
->sreg1
= long_ins
->dreg
;
5767 ins
->sreg2
= long_ins
->sreg1
+ 2;
5769 ins
->klass
= long_ins
->klass
;
5770 ins
->type
= STACK_VTYPE
;
5771 MONO_ADD_INS (cfg
->cbb
, ins
);
5773 MONO_INST_NEW (cfg
, ins
, OP_PSHUFLED
);
5774 ins
->dreg
= long_ins
->dreg
;
5775 ins
->sreg1
= long_ins
->dreg
;;
5776 ins
->inst_c0
= 0x44; /*Magic number for swizzling (X,Y,X,Y)*/
5777 ins
->klass
= long_ins
->klass
;
5778 ins
->type
= STACK_VTYPE
;
5779 MONO_ADD_INS (cfg
->cbb
, ins
);
5781 long_ins
->opcode
= OP_NOP
;
5784 #endif /* MONO_ARCH_SIMD_INTRINSICS */
5788 #define DBG_SIGNAL SIGBUS
5790 #define DBG_SIGNAL SIGSEGV
5793 /* Soft Debug support */
5794 #ifdef MONO_ARCH_SOFT_DEBUG_SUPPORTED
5797 * mono_arch_set_breakpoint:
5799 * Set a breakpoint at the native code corresponding to JI at NATIVE_OFFSET.
5800 * The location should contain code emitted by OP_SEQ_POINT.
5803 mono_arch_set_breakpoint (MonoJitInfo
*ji
, guint8
*ip
)
5808 * In production, we will use int3 (has to fix the size in the md
5809 * file). But that could confuse gdb, so during development, we emit a SIGSEGV
5812 g_assert (code
[0] == 0x90);
5813 x86_alu_reg_mem (code
, X86_CMP
, X86_EAX
, (guint32
)bp_trigger_page
);
5817 * mono_arch_clear_breakpoint:
5819 * Clear the breakpoint at IP.
5822 mono_arch_clear_breakpoint (MonoJitInfo
*ji
, guint8
*ip
)
5827 for (i
= 0; i
< 6; ++i
)
5832 * mono_arch_start_single_stepping:
5834 * Start single stepping.
5837 mono_arch_start_single_stepping (void)
5839 mono_mprotect (ss_trigger_page
, mono_pagesize (), 0);
5843 * mono_arch_stop_single_stepping:
5845 * Stop single stepping.
5848 mono_arch_stop_single_stepping (void)
5850 mono_mprotect (ss_trigger_page
, mono_pagesize (), MONO_MMAP_READ
);
5854 * mono_arch_is_single_step_event:
5856 * Return whenever the machine state in SIGCTX corresponds to a single
5860 mono_arch_is_single_step_event (void *info
, void *sigctx
)
5863 EXCEPTION_RECORD
* einfo
= (EXCEPTION_RECORD
*)info
; /* Sometimes the address is off by 4 */
5864 if ((einfo
->ExceptionInformation
[1] >= ss_trigger_page
&& (guint8
*)einfo
->ExceptionInformation
[1] <= (guint8
*)ss_trigger_page
+ 128))
5869 siginfo_t
* sinfo
= (siginfo_t
*) info
;
5870 /* Sometimes the address is off by 4 */
5871 if (sinfo
->si_signo
== DBG_SIGNAL
&& (sinfo
->si_addr
>= ss_trigger_page
&& (guint8
*)sinfo
->si_addr
<= (guint8
*)ss_trigger_page
+ 128))
5879 mono_arch_is_breakpoint_event (void *info
, void *sigctx
)
5882 EXCEPTION_RECORD
* einfo
= (EXCEPTION_RECORD
*)info
; /* Sometimes the address is off by 4 */
5883 if ((einfo
->ExceptionInformation
[1] >= bp_trigger_page
&& (guint8
*)einfo
->ExceptionInformation
[1] <= (guint8
*)bp_trigger_page
+ 128))
5888 siginfo_t
* sinfo
= (siginfo_t
*)info
;
5889 /* Sometimes the address is off by 4 */
5890 if (sinfo
->si_signo
== DBG_SIGNAL
&& (sinfo
->si_addr
>= bp_trigger_page
&& (guint8
*)sinfo
->si_addr
<= (guint8
*)bp_trigger_page
+ 128))
5898 * mono_arch_get_ip_for_breakpoint:
5900 * See mini-amd64.c for docs.
5903 mono_arch_get_ip_for_breakpoint (MonoJitInfo
*ji
, MonoContext
*ctx
)
5905 guint8
*ip
= MONO_CONTEXT_GET_IP (ctx
);
5910 #define BREAKPOINT_SIZE 6
5913 * mono_arch_get_ip_for_single_step:
5915 * See mini-amd64.c for docs.
5918 mono_arch_get_ip_for_single_step (MonoJitInfo
*ji
, MonoContext
*ctx
)
5920 guint8
*ip
= MONO_CONTEXT_GET_IP (ctx
);
5922 /* Size of x86_alu_reg_imm */
5929 * mono_arch_skip_breakpoint:
5931 * See mini-amd64.c for docs.
5934 mono_arch_skip_breakpoint (MonoContext
*ctx
)
5936 MONO_CONTEXT_SET_IP (ctx
, (guint8
*)MONO_CONTEXT_GET_IP (ctx
) + BREAKPOINT_SIZE
);
5940 * mono_arch_skip_single_step:
5942 * See mini-amd64.c for docs.
5945 mono_arch_skip_single_step (MonoContext
*ctx
)
5947 MONO_CONTEXT_SET_IP (ctx
, (guint8
*)MONO_CONTEXT_GET_IP (ctx
) + 6);
5951 * mono_arch_get_seq_point_info:
5953 * See mini-amd64.c for docs.
5956 mono_arch_get_seq_point_info (MonoDomain
*domain
, guint8
*code
)