instr-shift.lisp

   1 ;;;;------------------------------------------------------------------
   2 ;;;;
   3 ;;;;    Copyright (C) 20012000, 2002,
   4 ;;;;    Department of Computer Science, University of Tromso, Norway
   5 ;;;;
   6 ;;;; Filename:      instr-shift.lisp
   7 ;;;; Description:   Shifting operations
   8 ;;;; Author:        Frode Vatvedt Fjeld <frodef@acm.org>
   9 ;;;; Created at:    Tue May  2 10:56:33 2000
  10 ;;;; Distribution:  See the accompanying file COPYING.
  11 ;;;;
  12 ;;;; $Id: instr-shift.lisp,v 1.2 2004/01/16 11:54:14 ffjeld Exp $
  13 ;;;;
  14 ;;;;------------------------------------------------------------------
  15
  16 (in-package "IA-X86-INSTR")
  17
  18 ;;; ----------------------------------------------------------------
  19 ;;;                            SAL
  20 ;;; ----------------------------------------------------------------
  21
  22 (def-instr shl (instruction))
  23
  24 (def-instr shlb (shl)
  25   (:digit (#xd0 4) 0 (1 r/m8))
  26   (:digit (#xd2 4) 0 (cl r/m8))
  27   (:digit (#xc0 4) 1 (imm8 r/m8)))
  28
  29 (def-instr shlw (shl)
  30   (:digit (#xd1 4) 0 (1 r/m16) :operand-mode :16-bit)
  31   (:digit (#xd3 4) 0 (cl r/m16) :operand-mode :16-bit)
  32   (:digit (#xc1 4) 1 (imm8 r/m16) :operand-mode :16-bit))
  33
  34 (def-instr shll (shl)
  35   (:digit (#xd1 4) 0 (1 r/m32) :operand-mode :32-bit)
  36   (:digit (#xd3 4) 0 (cl r/m32) :operand-mode :32-bit)
  37   (:digit (#xc1 4) 1 (imm8 r/m32) :operand-mode :32-bit))
  38
  39 ;;; ----------------------------------------------------------------
  40 ;;;                            SAR
  41 ;;; ----------------------------------------------------------------
  42
  43 ;;; Shift arithmethic right
  44
  45 (def-instr sar (instruction))
  46
  47 (def-instr sarb (sar)
  48   (:digit (#xd0 7) 0 (1 r/m8))
  49   (:digit (#xd2 7) 0 (cl r/m8))
  50   (:digit (#xc0 7) 1 (imm8 r/m8)))
  51
  52 (def-instr sarw (sar)
  53   (:digit (#xd1 7) 0 (1 r/m16) :operand-mode :16-bit)
  54   (:digit (#xd3 7) 0 (cl r/m16) :operand-mode :16-bit)
  55   (:digit (#xc1 7) 1 (imm8 r/m16) :operand-mode :16-bit))
  56
  57 (def-instr sarl (sar)
  58   (:digit (#xd1 7) 0 (1 r/m32) :operand-mode :32-bit)
  59   (:digit (#xd3 7) 0 (cl r/m32) :operand-mode :32-bit)
  60   (:digit (#xc1 7) 1 (imm8 r/m32) :operand-mode :32-bit))
  61
  62 ;;; Shift right
  63
  64 (def-instr shr (instruction))
  65 (def-instr shrb (shr)
  66   (:digit (#xd0 5) 0 (1 r/m8))
  67   (:digit (#xd2 5) 0 (cl r/m8))
  68   (:digit (#xc0 5) 1 (imm8 r/m8)))
  69
  70 (def-instr shrw (shr)
  71   (:digit (#xd1 5) 0 (1 r/m16) :operand-mode :16-bit)
  72   (:digit (#xd3 5) 0 (cl r/m16) :operand-mode :16-bit)
  73   (:digit (#xc1 5) 1 (imm8 r/m16) :operand-mode :16-bit))
  74
  75 (def-instr shrl (shr)
  76   (:digit (#xd1 5) 0 (1 r/m32) :operand-mode :32-bit)
  77   (:digit (#xd3 5) 0 (cl r/m32) :operand-mode :32-bit)
  78   (:digit (#xc1 5) 1 (imm8 r/m32) :operand-mode :32-bit))
  79
  80
  81 ;;; Double Precision Shift Left
  82
  83 (def-instr shld (instruction))
  84 (def-instr shldw (shld)
  85   (:r-imm #x0fa4 1 (imm8 r16 r/m16) :operand-mode :16-bit)
  86   (:r #x0fa5 (cl r16 r/m16) :operand-mode :16-bit))
  87
  88 (def-instr shldl (shld)
  89   (:r-imm #x0fa4 1 (imm8 r32 r/m32) :operand-mode :32-bit)
  90   (:r #x0fa5 (cl r32 r/m32) :operand-mode :32-bit))
  91
  92 ;;; Double Precision Shift Right
  93
  94 (def-instr shrd (instruction))
  95 (def-instr shrdw (shrd)
  96   (:r-imm #x0fac 1 (imm8 r16 r/m16) :operand-mode :16-bit)
  97   (:r #x0fad (cl r16 r/m16) :operand-mode :16-bit))
  98 (def-instr shrdl (shrd)
  99   (:r-imm #x0fac 1 (imm8 r32 r/m32) :operand-mode :32-bit)
 100   (:r #x0fad (cl r32 r/m32) :operand-mode :32-bit))
 101
 102
 103 ;;; Rotate left with CF
 104
 105 (def-instr rcl (instruction))
 106
 107 (def-instr rclb (shl)
 108   (:digit (#xd0 2) 0 (1 r/m8))
 109   (:digit (#xd2 2) 0 (cl r/m8))
 110   (:digit (#xc0 2) 1 (imm8 r/m8)))
 111
 112 (def-instr rclw (rcl)
 113   (:digit (#xd1 2) 0 (1 r/m16) :operand-mode :16-bit)
 114   (:digit (#xd3 2) 0 (cl r/m16) :operand-mode :16-bit)
 115   (:digit (#xc1 2) 1 (imm8 r/m16) :operand-mode :16-bit))
 116
 117 (def-instr rcll (rcl)
 118   (:digit (#xd1 2) 0 (1 r/m32) :operand-mode :32-bit)
 119   (:digit (#xd3 2) 0 (cl r/m32) :operand-mode :32-bit)
 120   (:digit (#xc1 2) 1 (imm8 r/m32) :operand-mode :32-bit))
 121
 122 ;;; Rotate left without CF
 123
 124 (def-instr rol (instruction))
 125
 126 (def-instr rolb (shl)
 127   (:digit (#xd0 0) 0 (1 r/m8))
 128   (:digit (#xd2 0) 0 (cl r/m8))
 129   (:digit (#xc0 0) 1 (imm8 r/m8)))
 130
 131 (def-instr rolw (rol)
 132   (:digit (#xd1 0) 0 (1 r/m16) :operand-mode :16-bit)
 133   (:digit (#xd3 0) 0 (cl r/m16) :operand-mode :16-bit)
 134   (:digit (#xc1 0) 1 (imm8 r/m16) :operand-mode :16-bit))
 135
 136 (def-instr roll (rol)
 137   (:digit (#xd1 0) 0 (1 r/m32) :operand-mode :32-bit)
 138   (:digit (#xd3 0) 0 (cl r/m32) :operand-mode :32-bit)
 139   (:digit (#xc1 0) 1 (imm8 r/m32) :operand-mode :32-bit))
 140
 141 ;;; Rotate right without CF
 142
 143 (def-instr ror (instruction))
 144
 145 (def-instr rorb (shl)
 146   (:digit (#xd0 1) 0 (1 r/m8))
 147   (:digit (#xd2 1) 0 (cl r/m8))
 148   (:digit (#xc0 1) 1 (imm8 r/m8)))
 149
 150 (def-instr rorw (ror)
 151   (:digit (#xd1 1) 0 (1 r/m16) :operand-mode :16-bit)
 152   (:digit (#xd3 1) 0 (cl r/m16) :operand-mode :16-bit)
 153   (:digit (#xc1 1) 1 (imm8 r/m16) :operand-mode :16-bit))
 154
 155 (def-instr rorl (ror)
 156   (:digit (#xd1 1) 0 (1 r/m32) :operand-mode :32-bit)
 157   (:digit (#xd3 1) 0 (cl r/m32) :operand-mode :32-bit)
 158   (:digit (#xc1 1) 1 (imm8 r/m32) :operand-mode :32-bit))
 159