| blob | d31caaebc382a26136d03a8caa681e46357c3a03 |
1 !
2 ! ***** BEGIN LICENSE BLOCK *****
3 ! Version: MPL 1.1/GPL 2.0/LGPL 2.1
4 !
5 ! The contents of this file are subject to the Mozilla Public License Version
6 ! 1.1 (the "License"); you may not use this file except in compliance with
7 ! the License. You may obtain a copy of the License at
8 ! http://www.mozilla.org/MPL/
9 !
10 ! Software distributed under the License is distributed on an "AS IS" basis,
11 ! WITHOUT WARRANTY OF ANY KIND, either express or implied. See the License
12 ! for the specific language governing rights and limitations under the
13 ! License.
14 !
15 ! The Original Code is vis inline macros (32 bit). (vis_32.il 3.3).
16 !
17 ! The Initial Developer of the Original Code is
18 ! Sun Microsystems Inc.
19 ! Portions created by the Initial Developer are Copyright (C) 1995-2000
20 ! the Initial Developer. All Rights Reserved.
21 !
22 ! Contributor(s):
23 !
24 ! Alternatively, the contents of this file may be used under the terms of
25 ! either the GNU General Public License Version 2 or later (the "GPL"), or
26 ! the GNU Lesser General Public License Version 2.1 or later (the "LGPL"),
27 ! in which case the provisions of the GPL or the LGPL are applicable instead
28 ! of those above. If you wish to allow use of your version of this file only
29 ! under the terms of either the GPL or the LGPL, and not to allow others to
30 ! use your version of this file under the terms of the MPL, indicate your
31 ! decision by deleting the provisions above and replace them with the notice
32 ! and other provisions required by the GPL or the LGPL. If you do not delete
33 ! the provisions above, a recipient may use your version of this file under
34 ! the terms of any one of the MPL, the GPL or the LGPL.
35 !
36 ! ***** END LICENSE BLOCK *****
37 ! $Id: vis_32.il,v 1.3 2004/04/27 23:04:36 gerv%gerv.net Exp $
39 ! The interface to the VIS instructions as declared below (and in the VIS
40 ! User's Manual) will not change, but the macro implementation might change
41 ! in the future.
43 !--------------------------------------------------------------------
44 ! Pure edge handling instructions
45 !
46 ! int vis_edge8(void */*frs1*/, void */*frs2*/);
47 !
48 .inline vis_edge8,8
49 edge8 %o0,%o1,%o0
50 .end
51 !
52 ! int vis_edge8l(void */*frs1*/, void */*frs2*/);
53 !
54 .inline vis_edge8l,8
55 edge8l %o0,%o1,%o0
56 .end
57 !
58 ! int vis_edge16(void */*frs1*/, void */*frs2*/);
59 !
60 .inline vis_edge16,8
61 edge16 %o0,%o1,%o0
62 .end
63 !
64 ! int vis_edge16l(void */*frs1*/, void */*frs2*/);
65 !
66 .inline vis_edge16l,8
67 edge16l %o0,%o1,%o0
68 .end
69 !
70 ! int vis_edge32(void */*frs1*/, void */*frs2*/);
71 !
72 .inline vis_edge32,8
73 edge32 %o0,%o1,%o0
74 .end
75 !
76 ! int vis_edge32l(void */*frs1*/, void */*frs2*/);
77 !
78 .inline vis_edge32l,8
79 edge32l %o0,%o1,%o0
80 .end
82 !--------------------------------------------------------------------
83 ! Edge handling instructions with negative return values if cc set
84 !
85 ! int vis_edge8cc(void */*frs1*/, void */*frs2*/);
86 !
87 .inline vis_edge8cc,8
88 edge8 %o0,%o1,%o0
89 mov 0,%o1
90 movgu %icc,-1024,%o1
91 or %o1,%o0,%o0
92 .end
93 !
94 ! int vis_edge8lcc(void */*frs1*/, void */*frs2*/);
95 !
96 .inline vis_edge8lcc,8
97 edge8l %o0,%o1,%o0
98 mov 0,%o1
99 movgu %icc,-1024,%o1
100 or %o1,%o0,%o0
101 .end
102 !
103 ! int vis_edge16cc(void */*frs1*/, void */*frs2*/);
104 !
105 .inline vis_edge16cc,8
106 edge16 %o0,%o1,%o0
107 mov 0,%o1
108 movgu %icc,-1024,%o1
109 or %o1,%o0,%o0
110 .end
111 !
112 ! int vis_edge16lcc(void */*frs1*/, void */*frs2*/);
113 !
114 .inline vis_edge16lcc,8
115 edge16l %o0,%o1,%o0
116 mov 0,%o1
117 movgu %icc,-1024,%o1
118 or %o1,%o0,%o0
119 .end
120 !
121 ! int vis_edge32cc(void */*frs1*/, void */*frs2*/);
122 !
123 .inline vis_edge32cc,8
124 edge32 %o0,%o1,%o0
125 mov 0,%o1
126 movgu %icc,-1024,%o1
127 or %o1,%o0,%o0
128 .end
129 !
130 ! int vis_edge32lcc(void */*frs1*/, void */*frs2*/);
131 !
132 .inline vis_edge32lcc,8
133 edge32l %o0,%o1,%o0
134 mov 0,%o1
135 movgu %icc,-1024,%o1
136 or %o1,%o0,%o0
137 .end
139 !--------------------------------------------------------------------
140 ! Alignment instructions
141 !
142 ! void *vis_alignaddr(void */*rs1*/, int /*rs2*/);
143 !
144 .inline vis_alignaddr,8
145 alignaddr %o0,%o1,%o0
146 .end
147 !
148 ! void *vis_alignaddrl(void */*rs1*/, int /*rs2*/);
149 !
150 .inline vis_alignaddrl,8
151 alignaddrl %o0,%o1,%o0
152 .end
153 !
154 ! double vis_faligndata(double /*frs1*/, double /*frs2*/);
155 !
156 .inline vis_faligndata,16
157 std %o0,[%sp+0x48]
158 ldd [%sp+0x48],%f4
159 std %o2,[%sp+0x48]
160 ldd [%sp+0x48],%f10
161 faligndata %f4,%f10,%f0
162 .end
164 !--------------------------------------------------------------------
165 ! Partitioned comparison instructions
166 !
167 ! int vis_fcmple16(double /*frs1*/, double /*frs2*/);
168 !
169 .inline vis_fcmple16,16
170 std %o0,[%sp+0x48]
171 ldd [%sp+0x48],%f4
172 std %o2,[%sp+0x48]
173 ldd [%sp+0x48],%f10
174 fcmple16 %f4,%f10,%o0
175 .end
176 !
177 ! int vis_fcmpne16(double /*frs1*/, double /*frs2*/);
178 !
179 .inline vis_fcmpne16,16
180 std %o0,[%sp+0x48]
181 ldd [%sp+0x48],%f4
182 std %o2,[%sp+0x48]
183 ldd [%sp+0x48],%f10
184 fcmpne16 %f4,%f10,%o0
185 .end
186 !
187 ! int vis_fcmple32(double /*frs1*/, double /*frs2*/);
188 !
189 .inline vis_fcmple32,16
190 std %o0,[%sp+0x48]
191 ldd [%sp+0x48],%f4
192 std %o2,[%sp+0x48]
193 ldd [%sp+0x48],%f10
194 fcmple32 %f4,%f10,%o0
195 .end
196 !
197 ! int vis_fcmpne32(double /*frs1*/, double /*frs2*/);
198 !
199 .inline vis_fcmpne32,16
200 std %o0,[%sp+0x48]
201 ldd [%sp+0x48],%f4
202 std %o2,[%sp+0x48]
203 ldd [%sp+0x48],%f10
204 fcmpne32 %f4,%f10,%o0
205 .end
206 !
207 ! int vis_fcmpgt16(double /*frs1*/, double /*frs2*/);
208 !
209 .inline vis_fcmpgt16,16
210 std %o0,[%sp+0x48]
211 ldd [%sp+0x48],%f4
212 std %o2,[%sp+0x48]
213 ldd [%sp+0x48],%f10
214 fcmpgt16 %f4,%f10,%o0
215 .end
216 !
217 ! int vis_fcmpeq16(double /*frs1*/, double /*frs2*/);
218 !
219 .inline vis_fcmpeq16,16
220 std %o0,[%sp+0x48]
221 ldd [%sp+0x48],%f4
222 std %o2,[%sp+0x48]
223 ldd [%sp+0x48],%f10
224 fcmpeq16 %f4,%f10,%o0
225 .end
226 !
227 ! int vis_fcmpgt32(double /*frs1*/, double /*frs2*/);
228 !
229 .inline vis_fcmpgt32,16
230 std %o0,[%sp+0x48]
231 ldd [%sp+0x48],%f4
232 std %o2,[%sp+0x48]
233 ldd [%sp+0x48],%f10
234 fcmpgt32 %f4,%f10,%o0
235 .end
236 !
237 ! int vis_fcmpeq32(double /*frs1*/, double /*frs2*/);
238 !
239 .inline vis_fcmpeq32,16
240 std %o0,[%sp+0x48]
241 ldd [%sp+0x48],%f4
242 std %o2,[%sp+0x48]
243 ldd [%sp+0x48],%f10
244 fcmpeq32 %f4,%f10,%o0
245 .end
247 !--------------------------------------------------------------------
248 ! Partitioned arithmetic
249 !
250 ! double vis_fmul8x16(float /*frs1*/, double /*frs2*/);
251 !
252 .inline vis_fmul8x16,12
253 st %o0,[%sp+0x44]
254 ld [%sp+0x44],%f4
255 st %o1,[%sp+0x48]
256 st %o2,[%sp+0x4c]
257 ldd [%sp+0x48],%f10
258 fmul8x16 %f4,%f10,%f0
259 .end
260 !
261 ! double vis_fmul8x16_dummy(float /*frs1*/, int /*dummy*/, double /*frs2*/);
262 !
263 .inline vis_fmul8x16_dummy,16
264 st %o0,[%sp+0x44]
265 ld [%sp+0x44],%f4
266 std %o2,[%sp+0x48]
267 ldd [%sp+0x48],%f10
268 fmul8x16 %f4,%f10,%f0
269 .end
270 !
271 ! double vis_fmul8x16au(float /*frs1*/, float /*frs2*/);
272 !
273 .inline vis_fmul8x16au,8
274 st %o0,[%sp+0x48]
275 ld [%sp+0x48],%f4
276 st %o1,[%sp+0x48]
277 ld [%sp+0x48],%f10
278 fmul8x16au %f4,%f10,%f0
279 .end
280 !
281 ! double vis_fmul8x16al(float /*frs1*/, float /*frs2*/);
282 !
283 .inline vis_fmul8x16al,8
284 st %o0,[%sp+0x44]
285 ld [%sp+0x44],%f4
286 st %o1,[%sp+0x48]
287 ld [%sp+0x48],%f10
288 fmul8x16al %f4,%f10,%f0
289 .end
290 !
291 ! double vis_fmul8sux16(double /*frs1*/, double /*frs2*/);
292 !
293 .inline vis_fmul8sux16,16
294 std %o0,[%sp+0x48]
295 ldd [%sp+0x48],%f4
296 std %o2,[%sp+0x48]
297 ldd [%sp+0x48],%f10
298 fmul8sux16 %f4,%f10,%f0
299 .end
300 !
301 ! double vis_fmul8ulx16(double /*frs1*/, double /*frs2*/);
302 !
303 .inline vis_fmul8ulx16,16
304 std %o0,[%sp+0x48]
305 ldd [%sp+0x48],%f4
306 std %o2,[%sp+0x48]
307 ldd [%sp+0x48],%f10
308 fmul8ulx16 %f4,%f10,%f0
309 .end
310 !
311 ! double vis_fmuld8sux16(float /*frs1*/, float /*frs2*/);
312 !
313 .inline vis_fmuld8sux16,8
314 st %o0,[%sp+0x48]
315 ld [%sp+0x48],%f4
316 st %o1,[%sp+0x48]
317 ld [%sp+0x48],%f10
318 fmuld8sux16 %f4,%f10,%f0
319 .end
320 !
321 ! double vis_fmuld8ulx16(float /*frs1*/, float /*frs2*/);
322 !
323 .inline vis_fmuld8ulx16,8
324 st %o0,[%sp+0x48]
325 ld [%sp+0x48],%f4
326 st %o1,[%sp+0x48]
327 ld [%sp+0x48],%f10
328 fmuld8ulx16 %f4,%f10,%f0
329 .end
330 !
331 ! double vis_fpadd16(double /*frs1*/, double /*frs2*/);
332 !
333 .inline vis_fpadd16,16
334 std %o0,[%sp+0x40]
335 ldd [%sp+0x40],%f4
336 std %o2,[%sp+0x48]
337 ldd [%sp+0x48],%f10
338 fpadd16 %f4,%f10,%f0
339 .end
340 !
341 ! float vis_fpadd16s(float /*frs1*/, float /*frs2*/);
342 !
343 .inline vis_fpadd16s,8
344 st %o0,[%sp+0x48]
345 ld [%sp+0x48],%f4
346 st %o1,[%sp+0x48]
347 ld [%sp+0x48],%f10
348 fpadd16s %f4,%f10,%f0
349 .end
350 !
351 ! double vis_fpadd32(double /*frs1*/, double /*frs2*/);
352 !
353 .inline vis_fpadd32,16
354 std %o0,[%sp+0x48]
355 ldd [%sp+0x48],%f4
356 std %o2,[%sp+0x48]
357 ldd [%sp+0x48],%f10
358 fpadd32 %f4,%f10,%f0
359 .end
360 !
361 ! float vis_fpadd32s(float /*frs1*/, float /*frs2*/);
362 !
363 .inline vis_fpadd32s,8
364 st %o0,[%sp+0x48]
365 ld [%sp+0x48],%f4
366 st %o1,[%sp+0x48]
367 ld [%sp+0x48],%f10
368 fpadd32s %f4,%f10,%f0
369 .end
370 !
371 ! double vis_fpsub16(double /*frs1*/, double /*frs2*/);
372 !
373 .inline vis_fpsub16,16
374 std %o0,[%sp+0x48]
375 ldd [%sp+0x48],%f4
376 std %o2,[%sp+0x48]
377 ldd [%sp+0x48],%f10
378 fpsub16 %f4,%f10,%f0
379 .end
380 !
381 ! float vis_fpsub16s(float /*frs1*/, float /*frs2*/);
382 !
383 .inline vis_fpsub16s,8
384 st %o0,[%sp+0x48]
385 ld [%sp+0x48],%f4
386 st %o1,[%sp+0x48]
387 ld [%sp+0x48],%f10
388 fpsub16s %f4,%f10,%f0
389 .end
390 !
391 ! double vis_fpsub32(double /*frs1*/, double /*frs2*/);
392 !
393 .inline vis_fpsub32,16
394 std %o0,[%sp+0x48]
395 ldd [%sp+0x48],%f4
396 std %o2,[%sp+0x48]
397 ldd [%sp+0x48],%f10
398 fpsub32 %f4,%f10,%f0
399 .end
400 !
401 ! float vis_fpsub32s(float /*frs1*/, float /*frs2*/);
402 !
403 .inline vis_fpsub32s,8
404 st %o0,[%sp+0x48]
405 ld [%sp+0x48],%f4
406 st %o1,[%sp+0x48]
407 ld [%sp+0x48],%f10
408 fpsub32s %f4,%f10,%f0
409 .end
411 !--------------------------------------------------------------------
412 ! Pixel packing
413 !
414 ! float vis_fpack16(double /*frs2*/);
415 !
416 .inline vis_fpack16,8
417 std %o0,[%sp+0x48]
418 ldd [%sp+0x48],%f4
419 fpack16 %f4,%f0
420 .end
422 !
423 ! double vis_fpack16_pair(double /*frs2*/, double /*frs2*/);
424 !
425 .inline vis_fpack16_pair,16
426 std %o0,[%sp+0x48]
427 ldd [%sp+0x48],%f4
428 std %o2,[%sp+0x48]
429 ldd [%sp+0x48],%f10
430 fpack16 %f4,%f0
431 fpack16 %f10,%f1
432 .end
433 !
434 ! void vis_st2_fpack16(double, double, double *)
435 !
436 .inline vis_st2_fpack16,20
437 std %o0,[%sp+0x48]
438 ldd [%sp+0x48],%f4
439 std %o2,[%sp+0x48]
440 ldd [%sp+0x48],%f10
441 fpack16 %f4,%f0
442 fpack16 %f10,%f1
443 st %f0,[%o4+0]
444 st %f1,[%o4+4]
445 .end
446 !
447 ! void vis_std_fpack16(double, double, double *)
448 !
449 .inline vis_std_fpack16,20
450 std %o0,[%sp+0x48]
451 ldd [%sp+0x48],%f4
452 std %o2,[%sp+0x48]
453 ldd [%sp+0x48],%f10
454 fpack16 %f4,%f0
455 fpack16 %f10,%f1
456 std %f0,[%o4]
457 .end
458 !
459 ! void vis_st2_fpackfix(double, double, double *)
460 !
461 .inline vis_st2_fpackfix,20
462 std %o0,[%sp+0x48]
463 ldd [%sp+0x48],%f4
464 std %o2,[%sp+0x48]
465 ldd [%sp+0x48],%f10
466 fpackfix %f4,%f0
467 fpackfix %f10,%f1
468 st %f0,[%o4+0]
469 st %f1,[%o4+4]
470 .end
471 !
472 ! double vis_fpack16_to_hi(double /*frs1*/, double /*frs2*/);
473 !
474 .inline vis_fpack16_to_hi,16
475 std %o0,[%sp+0x48]
476 ldd [%sp+0x48],%f0
477 std %o2,[%sp+0x48]
478 ldd [%sp+0x48],%f4
479 fpack16 %f4,%f0
480 .end
482 ! double vis_fpack16_to_lo(double /*frs1*/, double /*frs2*/);
483 !
484 .inline vis_fpack16_to_lo,16
485 std %o0,[%sp+0x48]
486 ldd [%sp+0x48],%f0
487 std %o2,[%sp+0x48]
488 ldd [%sp+0x48],%f4
489 fpack16 %f4,%f3
490 fmovs %f3,%f1 /* without this, optimizer goes wrong */
491 .end
493 !
494 ! double vis_fpack32(double /*frs1*/, double /*frs2*/);
495 !
496 .inline vis_fpack32,16
497 std %o0,[%sp+0x48]
498 ldd [%sp+0x48],%f4
499 std %o2,[%sp+0x48]
500 ldd [%sp+0x48],%f10
501 fpack32 %f4,%f10,%f0
502 .end
503 !
504 ! float vis_fpackfix(double /*frs2*/);
505 !
506 .inline vis_fpackfix,8
507 std %o0,[%sp+0x48]
508 ldd [%sp+0x48],%f4
509 fpackfix %f4,%f0
510 .end
511 !
512 ! double vis_fpackfix_pair(double /*frs2*/, double /*frs2*/);
513 !
514 .inline vis_fpackfix_pair,16
515 std %o0,[%sp+0x48]
516 ldd [%sp+0x48],%f4
517 std %o2,[%sp+0x48]
518 ldd [%sp+0x48],%f6
519 fpackfix %f4,%f0
520 fpackfix %f6,%f1
521 .end
523 !--------------------------------------------------------------------
524 ! Motion estimation
525 !
526 ! double vis_pdist(double /*frs1*/, double /*frs2*/, double /*frd*/);
527 !
528 .inline vis_pdist,24
529 std %o4,[%sp+0x48]
530 ldd [%sp+0x48],%f0
531 std %o0,[%sp+0x48]
532 ldd [%sp+0x48],%f4
533 std %o2,[%sp+0x48]
534 ldd [%sp+0x48],%f10
535 pdist %f4,%f10,%f0
536 .end
538 !--------------------------------------------------------------------
539 ! Channel merging
540 !
541 ! double vis_fpmerge(float /*frs1*/, float /*frs2*/);
542 !
543 .inline vis_fpmerge,8
544 st %o0,[%sp+0x48]
545 ld [%sp+0x48],%f4
546 st %o1,[%sp+0x48]
547 ld [%sp+0x48],%f10
548 fpmerge %f4,%f10,%f0
549 .end
551 !--------------------------------------------------------------------
552 ! Pixel expansion
553 !
554 ! double vis_fexpand(float /*frs2*/);
555 !
556 .inline vis_fexpand,4
557 st %o0,[%sp+0x48]
558 ld [%sp+0x48],%f4
559 fexpand %f4,%f0
560 .end
562 ! double vis_fexpand_hi(double /*frs2*/);
563 !
564 .inline vis_fexpand_hi,8
565 std %o0,[%sp+0x48]
566 ldd [%sp+0x48],%f4
567 fexpand %f4,%f0
568 .end
570 ! double vis_fexpand_lo(double /*frs2*/);
571 !
572 .inline vis_fexpand_lo,8
573 std %o0,[%sp+0x48]
574 ldd [%sp+0x48],%f4
575 fmovs %f5, %f2
576 fexpand %f2,%f0
577 .end
579 !--------------------------------------------------------------------
580 ! Bitwise logical operations
581 !
582 ! double vis_fnor(double /*frs1*/, double /*frs2*/);
583 !
584 .inline vis_fnor,16
585 std %o0,[%sp+0x48]
586 ldd [%sp+0x48],%f4
587 std %o2,[%sp+0x48]
588 ldd [%sp+0x48],%f10
589 fnor %f4,%f10,%f0
590 .end
591 !
592 ! float vis_fnors(float /*frs1*/, float /*frs2*/);
593 !
594 .inline vis_fnors,8
595 st %o0,[%sp+0x48]
596 ld [%sp+0x48],%f4
597 st %o1,[%sp+0x48]
598 ld [%sp+0x48],%f10
599 fnors %f4,%f10,%f0
600 .end
601 !
602 ! double vis_fandnot(double /*frs1*/, double /*frs2*/);
603 !
604 .inline vis_fandnot,16
605 std %o0,[%sp+0x48]
606 ldd [%sp+0x48],%f4
607 std %o2,[%sp+0x48]
608 ldd [%sp+0x48],%f10
609 fandnot1 %f4,%f10,%f0
610 .end
611 !
612 ! float vis_fandnots(float /*frs1*/, float /*frs2*/);
613 !
614 .inline vis_fandnots,8
615 st %o0,[%sp+0x48]
616 ld [%sp+0x48],%f4
617 st %o1,[%sp+0x48]
618 ld [%sp+0x48],%f10
619 fandnot1s %f4,%f10,%f0
620 .end
621 !
622 ! double vis_fnot(double /*frs1*/);
623 !
624 .inline vis_fnot,8
625 std %o0,[%sp+0x48]
626 ldd [%sp+0x48],%f4
627 fnot1 %f4,%f0
628 .end
629 !
630 ! float vis_fnots(float /*frs1*/);
631 !
632 .inline vis_fnots,4
633 st %o0,[%sp+0x48]
634 ld [%sp+0x48],%f4
635 fnot1s %f4,%f0
636 .end
637 !
638 ! double vis_fxor(double /*frs1*/, double /*frs2*/);
639 !
640 .inline vis_fxor,16
641 std %o0,[%sp+0x48]
642 ldd [%sp+0x48],%f4
643 std %o2,[%sp+0x48]
644 ldd [%sp+0x48],%f10
645 fxor %f4,%f10,%f0
646 .end
647 !
648 ! float vis_fxors(float /*frs1*/, float /*frs2*/);
649 !
650 .inline vis_fxors,8
651 st %o0,[%sp+0x48]
652 ld [%sp+0x48],%f4
653 st %o1,[%sp+0x48]
654 ld [%sp+0x48],%f10
655 fxors %f4,%f10,%f0
656 .end
657 !
658 ! double vis_fnand(double /*frs1*/, double /*frs2*/);
659 !
660 .inline vis_fnand,16
661 std %o0,[%sp+0x48]
662 ldd [%sp+0x48],%f4
663 std %o2,[%sp+0x48]
664 ldd [%sp+0x48],%f10
665 fnand %f4,%f10,%f0
666 .end
667 !
668 ! float vis_fnands(float /*frs1*/, float /*frs2*/);
669 !
670 .inline vis_fnands,8
671 st %o0,[%sp+0x48]
672 ld [%sp+0x48],%f4
673 st %o1,[%sp+0x48]
674 ld [%sp+0x48],%f10
675 fnands %f4,%f10,%f0
676 .end
677 !
678 ! double vis_fand(double /*frs1*/, double /*frs2*/);
679 !
680 .inline vis_fand,16
681 std %o0,[%sp+0x48]
682 ldd [%sp+0x48],%f4
683 std %o2,[%sp+0x48]
684 ldd [%sp+0x48],%f10
685 fand %f4,%f10,%f0
686 .end
687 !
688 ! float vis_fands(float /*frs1*/, float /*frs2*/);
689 !
690 .inline vis_fands,8
691 st %o0,[%sp+0x48]
692 ld [%sp+0x48],%f4
693 st %o1,[%sp+0x48]
694 ld [%sp+0x48],%f10
695 fands %f4,%f10,%f0
696 .end
697 !
698 ! double vis_fxnor(double /*frs1*/, double /*frs2*/);
699 !
700 .inline vis_fxnor,16
701 std %o0,[%sp+0x48]
702 ldd [%sp+0x48],%f4
703 std %o2,[%sp+0x48]
704 ldd [%sp+0x48],%f10
705 fxnor %f4,%f10,%f0
706 .end
707 !
708 ! float vis_fxnors(float /*frs1*/, float /*frs2*/);
709 !
710 .inline vis_fxnors,8
711 st %o0,[%sp+0x48]
712 ld [%sp+0x48],%f4
713 st %o1,[%sp+0x48]
714 ld [%sp+0x48],%f10
715 fxnors %f4,%f10,%f0
716 .end
717 !
718 ! double vis_fsrc(double /*frs1*/);
719 !
720 .inline vis_fsrc,8
721 std %o0,[%sp+0x48]
722 ldd [%sp+0x48],%f4
723 fsrc1 %f4,%f0
724 .end
725 !
726 ! float vis_fsrcs(float /*frs1*/);
727 !
728 .inline vis_fsrcs,4
729 st %o0,[%sp+0x48]
730 ld [%sp+0x48],%f4
731 fsrc1s %f4,%f0
732 .end
733 !
734 ! double vis_fornot(double /*frs1*/, double /*frs2*/);
735 !
736 .inline vis_fornot,16
737 std %o0,[%sp+0x48]
738 ldd [%sp+0x48],%f4
739 std %o2,[%sp+0x48]
740 ldd [%sp+0x48],%f10
741 fornot1 %f4,%f10,%f0
742 .end
743 !
744 ! float vis_fornots(float /*frs1*/, float /*frs2*/);
745 !
746 .inline vis_fornots,8
747 st %o0,[%sp+0x48]
748 ld [%sp+0x48],%f4
749 st %o1,[%sp+0x48]
750 ld [%sp+0x48],%f10
751 fornot1s %f4,%f10,%f0
752 .end
753 !
754 ! double vis_for(double /*frs1*/, double /*frs2*/);
755 !
756 .inline vis_for,16
757 std %o0,[%sp+0x48]
758 ldd [%sp+0x48],%f4
759 std %o2,[%sp+0x48]
760 ldd [%sp+0x48],%f10
761 for %f4,%f10,%f0
762 .end
763 !
764 ! float vis_fors(float /*frs1*/, float /*frs2*/);
765 !
766 .inline vis_fors,8
767 st %o0,[%sp+0x48]
768 ld [%sp+0x48],%f4
769 st %o1,[%sp+0x48]
770 ld [%sp+0x48],%f10
771 fors %f4,%f10,%f0
772 .end
773 !
774 ! double vis_fzero(/* void */)
775 !
776 .inline vis_fzero,0
777 fzero %f0
778 .end
779 !
780 ! float vis_fzeros(/* void */)
781 !
782 .inline vis_fzeros,0
783 fzeros %f0
784 .end
785 !
786 ! double vis_fone(/* void */)
787 !
788 .inline vis_fone,0
789 fone %f0
790 .end
791 !
792 ! float vis_fones(/* void */)
793 !
794 .inline vis_fones,0
795 fones %f0
796 .end
798 !--------------------------------------------------------------------
799 ! Partial store instructions
800 !
801 ! vis_stdfa_ASI_PST8P(double frd, void *rs1, int rmask)
802 !
803 .inline vis_stdfa_ASI_PST8P,16
804 std %o0,[%sp+0x48]
805 ldd [%sp+0x48],%f4
806 stda %f4,[%o2]%o3,0xc0 ! ASI_PST8_P
807 .end
808 !
809 ! vis_stdfa_ASI_PST8PL(double frd, void *rs1, int rmask)
810 !
811 .inline vis_stdfa_ASI_PST8PL,16
812 std %o0,[%sp+0x48]
813 ldd [%sp+0x48],%f4
814 stda %f4,[%o2]%o3,0xc8 ! ASI_PST8_PL
815 .end
816 !
817 ! vis_stdfa_ASI_PST8P_int_pair(void *rs1, void *rs2, void *rs3, int rmask);
818 !
819 .inline vis_stdfa_ASI_PST8P_int_pair,16
820 ld [%o0],%f4
821 ld [%o1],%f5
822 stda %f4,[%o2]%o3,0xc0 ! ASI_PST8_P
823 .end
824 !
825 ! vis_stdfa_ASI_PST8S(double frd, void *rs1, int rmask)
826 !
827 .inline vis_stdfa_ASI_PST8S,16
828 std %o0,[%sp+0x48]
829 ldd [%sp+0x48],%f4
830 stda %f4,[%o2]%o3,0xc1 ! ASI_PST8_S
831 .end
832 !
833 ! vis_stdfa_ASI_PST16P(double frd, void *rs1, int rmask)
834 !
835 .inline vis_stdfa_ASI_PST16P,16
836 std %o0,[%sp+0x48]
837 ldd [%sp+0x48],%f4
838 stda %f4,[%o2]%o3,0xc2 ! ASI_PST16_P
839 .end
840 !
841 ! vis_stdfa_ASI_PST16S(double frd, void *rs1, int rmask)
842 !
843 .inline vis_stdfa_ASI_PST16S,16
844 std %o0,[%sp+0x48]
845 ldd [%sp+0x48],%f4
846 stda %f4,[%o2]%o3,0xc3 ! ASI_PST16_S
847 .end
848 !
849 ! vis_stdfa_ASI_PST32P(double frd, void *rs1, int rmask)
850 !
851 .inline vis_stdfa_ASI_PST32P,16
852 std %o0,[%sp+0x48]
853 ldd [%sp+0x48],%f4
854 stda %f4,[%o2]%o3,0xc4 ! ASI_PST32_P
855 .end
856 !
857 ! vis_stdfa_ASI_PST32S(double frd, void *rs1, int rmask)
858 !
859 .inline vis_stdfa_ASI_PST32S,16
860 std %o0,[%sp+0x48]
861 ldd [%sp+0x48],%f4
862 stda %f4,[%o2]%o3,0xc5 ! ASI_PST32_S
863 .end
865 !--------------------------------------------------------------------
866 ! Short store instructions
867 !
868 ! vis_stdfa_ASI_FL8P(double frd, void *rs1)
869 !
870 .inline vis_stdfa_ASI_FL8P,12
871 std %o0,[%sp+0x48]
872 ldd [%sp+0x48],%f4
873 stda %f4,[%o2]0xd0 ! ASI_FL8_P
874 .end
875 !
876 ! vis_stdfa_ASI_FL8P_index(double frd, void *rs1, long index)
877 !
878 .inline vis_stdfa_ASI_FL8P_index,16
879 std %o0,[%sp+0x48]
880 ldd [%sp+0x48],%f4
881 stda %f4,[%o2+%o3]0xd0 ! ASI_FL8_P
882 .end
883 !
884 ! vis_stdfa_ASI_FL8S(double frd, void *rs1)
885 !
886 .inline vis_stdfa_ASI_FL8S,12
887 std %o0,[%sp+0x48]
888 ldd [%sp+0x48],%f4
889 stda %f4,[%o2]0xd1 ! ASI_FL8_S
890 .end
891 !
892 ! vis_stdfa_ASI_FL16P(double frd, void *rs1)
893 !
894 .inline vis_stdfa_ASI_FL16P,12
895 std %o0,[%sp+0x48]
896 ldd [%sp+0x48],%f4
897 stda %f4,[%o2]0xd2 ! ASI_FL16_P
898 .end
899 !
900 ! vis_stdfa_ASI_FL16P_index(double frd, void *rs1, long index)
901 !
902 .inline vis_stdfa_ASI_FL16P_index,16
903 std %o0,[%sp+0x48]
904 ldd [%sp+0x48],%f4
905 stda %f4,[%o2+%o3]0xd2 ! ASI_FL16_P
906 .end
907 !
908 ! vis_stdfa_ASI_FL16S(double frd, void *rs1)
909 !
910 .inline vis_stdfa_ASI_FL16S,12
911 std %o0,[%sp+0x48]
912 ldd [%sp+0x48],%f4
913 stda %f4,[%o2]0xd3 ! ASI_FL16_S
914 .end
915 !
916 ! vis_stdfa_ASI_FL8PL(double frd, void *rs1)
917 !
918 .inline vis_stdfa_ASI_FL8PL,12
919 std %o0,[%sp+0x48]
920 ldd [%sp+0x48],%f4
921 stda %f4,[%o2]0xd8 ! ASI_FL8_PL
922 .end
923 !
924 ! vis_stdfa_ASI_FL8SL(double frd, void *rs1)
925 !
926 .inline vis_stdfa_ASI_FL8SL,12
927 std %o0,[%sp+0x48]
928 ldd [%sp+0x48],%f4
929 stda %f4,[%o2]0xd9 ! ASI_FL8_SL
930 .end
931 !
932 ! vis_stdfa_ASI_FL16PL(double frd, void *rs1)
933 !
934 .inline vis_stdfa_ASI_FL16PL,12
935 std %o0,[%sp+0x48]
936 ldd [%sp+0x48],%f4
937 stda %f4,[%o2]0xda ! ASI_FL16_PL
938 .end
939 !
940 ! vis_stdfa_ASI_FL16SL(double frd, void *rs1)
941 !
942 .inline vis_stdfa_ASI_FL16SL,12
943 std %o0,[%sp+0x48]
944 ldd [%sp+0x48],%f4
945 stda %f4,[%o2]0xdb ! ASI_FL16_SL
946 .end
948 !--------------------------------------------------------------------
949 ! Short load instructions
950 !
951 ! double vis_lddfa_ASI_FL8P(void *rs1)
952 !
953 .inline vis_lddfa_ASI_FL8P,4
954 ldda [%o0]0xd0,%f4 ! ASI_FL8_P
955 fmovd %f4,%f0 ! Compiler can clean this up
956 .end
957 !
958 ! double vis_lddfa_ASI_FL8P_index(void *rs1, long index)
959 !
960 .inline vis_lddfa_ASI_FL8P_index,8
961 ldda [%o0+%o1]0xd0,%f4
962 fmovd %f4,%f0
963 .end
964 !
965 ! double vis_lddfa_ASI_FL8P_hi(void *rs1, unsigned int index)
966 !
967 .inline vis_lddfa_ASI_FL8P_hi,8
968 sra %o1,16,%o1
969 ldda [%o0+%o1]0xd0,%f4
970 fmovd %f4,%f0
971 .end
972 !
973 ! double vis_lddfa_ASI_FL8P_lo(void *rs1, unsigned int index)
974 !
975 .inline vis_lddfa_ASI_FL8P_lo,8
976 sll %o1,16,%o1
977 sra %o1,16,%o1
978 ldda [%o0+%o1]0xd0,%f4
979 fmovd %f4,%f0
980 .end
981 !
982 ! double vis_lddfa_ASI_FL8S(void *rs1)
983 !
984 .inline vis_lddfa_ASI_FL8S,4
985 ldda [%o0]0xd1,%f4 ! ASI_FL8_S
986 fmovd %f4,%f0
987 .end
988 !
989 ! double vis_lddfa_ASI_FL16P(void *rs1)
990 !
991 .inline vis_lddfa_ASI_FL16P,4
992 ldda [%o0]0xd2,%f4 ! ASI_FL16_P
993 fmovd %f4,%f0
994 .end
995 !
996 ! double vis_lddfa_ASI_FL16P_index(void *rs1, long index)
997 !
998 .inline vis_lddfa_ASI_FL16P_index,8
999 ldda [%o0+%o1]0xd2,%f4 ! ASI_FL16_P
1000 fmovd %f4,%f0
1001 .end
1002 !
1003 ! double vis_lddfa_ASI_FL16S(void *rs1)
1004 !
1005 .inline vis_lddfa_ASI_FL16S,4
1006 ldda [%o0]0xd3,%f4 ! ASI_FL16_S
1007 fmovd %f4,%f0
1008 .end
1009 !
1010 ! double vis_lddfa_ASI_FL8PL(void *rs1)
1011 !
1012 .inline vis_lddfa_ASI_FL8PL,4
1013 ldda [%o0]0xd8,%f4 ! ASI_FL8_PL
1014 fmovd %f4,%f0
1015 .end
1016 !
1017 ! double vis_lddfa_ASI_FL8PL_index(void *rs1, long index)
1018 !
1019 .inline vis_lddfa_ASI_FL8PL_index,8
1020 ldda [%o0+%o1]0xd8,%f4 ! ASI_FL8_PL
1021 fmovd %f4,%f0
1022 .end
1023 !
1024 ! double vis_lddfa_ASI_FL8SL(void *rs1)
1025 !
1026 .inline vis_lddfa_ASI_FL8SL,4
1027 ldda [%o0]0xd9,%f4 ! ASI_FL8_SL
1028 fmovd %f4,%f0
1029 .end
1030 !
1031 ! double vis_lddfa_ASI_FL16PL(void *rs1)
1032 !
1033 .inline vis_lddfa_ASI_FL16PL,4
1034 ldda [%o0]0xda,%f4 ! ASI_FL16_PL
1035 fmovd %f4,%f0
1036 .end
1037 !
1038 ! double vis_lddfa_ASI_FL16PL_index(void *rs1, long index)
1039 !
1040 .inline vis_lddfa_ASI_FL16PL_index,8
1041 ldda [%o0+%o1]0xda,%f4 ! ASI_FL16_PL
1042 fmovd %f4,%f0
1043 .end
1044 !
1045 ! double vis_lddfa_ASI_FL16SL(void *rs1)
1046 !
1047 .inline vis_lddfa_ASI_FL16SL,4
1048 ldda [%o0]0xdb,%f4 ! ASI_FL16_SL
1049 fmovd %f4,%f0
1050 .end
1052 !--------------------------------------------------------------------
1053 ! Graphics status register
1054 !
1055 ! unsigned int vis_read_gsr(void)
1056 !
1057 .inline vis_read_gsr,0
1058 rd %gsr,%o0
1059 .end
1060 !
1061 ! void vis_write_gsr(unsigned int /* GSR */)
1062 !
1063 .inline vis_write_gsr,4
1064 wr %g0,%o0,%gsr
1065 .end
1067 !--------------------------------------------------------------------
1068 ! Voxel texture mapping
1069 !
1070 ! unsigned long vis_array8(unsigned long long /*rs1 */, int /*rs2*/)
1071 !
1072 .inline vis_array8,12
1073 sllx %o0,32,%o0
1074 srl %o1,0,%o1 ! clear the most significant 32 bits of %o1
1075 or %o0,%o1,%o3 ! join %o0 and %o1 into %o3
1076 array8 %o3,%o2,%o0
1077 .end
1078 !
1079 ! unsigned long vis_array16(unsigned long long /*rs1*/, int /*rs2*/)
1080 !
1081 .inline vis_array16,12
1082 sllx %o0,32,%o0
1083 srl %o1,0,%o1 ! clear the most significant 32 bits of %o1
1084 or %o0,%o1,%o3 ! join %o0 and %o1 into %o3
1085 array16 %o3,%o2,%o0
1086 .end
1087 !
1088 ! unsigned long vis_array32(unsigned long long /*rs1*/, int /*rs2*/)
1089 !
1090 .inline vis_array32,12
1091 sllx %o0,32,%o0
1092 srl %o1,0,%o1 ! clear the most significant 32 bits of %o1
1093 or %o0,%o1,%o3 ! join %o0 and %o1 into %o3
1094 array32 %o3,%o2,%o0
1095 .end
1097 !--------------------------------------------------------------------
1098 ! Register aliasing and type casts
1099 !
1100 ! float vis_read_hi(double /* frs1 */);
1101 !
1102 .inline vis_read_hi,8
1103 std %o0,[%sp+0x48] ! store double frs1
1104 ldd [%sp+0x48],%f0 ! %f0:%f1 = double frs1; return %f0;
1105 .end
1106 !
1107 ! float vis_read_lo(double /* frs1 */);
1108 !
1109 .inline vis_read_lo,8
1110 std %o0,[%sp+0x48] ! store double frs1
1111 ldd [%sp+0x48],%f0 ! %f0:%f1 = double frs1;
1112 fmovs %f1,%f0 ! %f0 = low word (frs1); return %f0;
1113 .end
1114 !
1115 ! double vis_write_hi(double /* frs1 */, float /* frs2 */);
1116 !
1117 .inline vis_write_hi,12
1118 std %o0,[%sp+0x48] ! store double frs1;
1119 ldd [%sp+0x48],%f0 ! %f0:%f1 = double frs1;
1120 st %o2,[%sp+0x44] ! store float frs2;
1121 ld [%sp+0x44],%f2 ! %f2 = float frs2;
1122 fmovs %f2,%f0 ! %f0 = float frs2; return %f0:f1;
1123 .end
1124 !
1125 ! double vis_write_lo(double /* frs1 */, float /* frs2 */);
1126 !
1127 .inline vis_write_lo,12
1128 std %o0,[%sp+0x48] ! store double frs1;
1129 ldd [%sp+0x48],%f0 ! %f0:%f1 = double frs1;
1130 st %o2,[%sp+0x44] ! store float frs2;
1131 ld [%sp+0x44],%f2 ! %f2 = float frs2;
1132 fmovs %f2,%f1 ! %f1 = float frs2; return %f0:f1;
1133 .end
1134 !
1135 ! double vis_freg_pair(float /* frs1 */, float /* frs2 */);
1136 !
1137 .inline vis_freg_pair,8
1138 st %o0,[%sp+0x48] ! store float frs1
1139 ld [%sp+0x48],%f0
1140 st %o1,[%sp+0x48] ! store float frs2
1141 ld [%sp+0x48],%f1
1142 .end
1143 !
1144 ! float vis_to_float(unsigned int /*value*/);
1145 !
1146 .inline vis_to_float,4
1147 st %o0,[%sp+0x48]
1148 ld [%sp+0x48],%f0
1149 .end
1150 !
1151 ! double vis_to_double(unsigned int /*value1*/, unsigned int /*value2*/);
1152 !
1153 .inline vis_to_double,8
1154 std %o0,[%sp+0x48]
1155 ldd [%sp+0x48],%f0
1156 .end
1157 !
1158 ! double vis_to_double_dup(unsigned int /*value*/);
1159 !
1160 .inline vis_to_double_dup,4
1161 st %o0,[%sp+0x48]
1162 ld [%sp+0x48],%f1
1163 fmovs %f1,%f0 ! duplicate value
1164 .end
1165 !
1166 ! double vis_ll_to_double(unsigned long long /*value*/);
1167 !
1168 .inline vis_ll_to_double,8
1169 std %o0,[%sp+0x48]
1170 ldd [%sp+0x48],%f0
1171 .end
1173 !--------------------------------------------------------------------
1174 ! Address space identifier (ASI) register
1175 !
1176 ! unsigned int vis_read_asi(void)
1177 !
1178 .inline vis_read_asi,0
1179 rd %asi,%o0
1180 .end
1181 !
1182 ! void vis_write_asi(unsigned int /* ASI */)
1183 !
1184 .inline vis_write_asi,4
1185 wr %g0,%o0,%asi
1186 .end
1188 !--------------------------------------------------------------------
1189 ! Load/store from/into alternate space
1190 !
1191 ! float vis_ldfa_ASI_REG(void *rs1)
1192 !
1193 .inline vis_ldfa_ASI_REG,4
1194 lda [%o0+0]%asi,%f4
1195 fmovs %f4,%f0 ! Compiler can clean this up
1196 .end
1197 !
1198 ! float vis_ldfa_ASI_P(void *rs1)
1199 !
1200 .inline vis_ldfa_ASI_P,4
1201 lda [%o0]0x80,%f4 ! ASI_P
1202 fmovs %f4,%f0 ! Compiler can clean this up
1203 .end
1204 !
1205 ! float vis_ldfa_ASI_PL(void *rs1)
1206 !
1207 .inline vis_ldfa_ASI_PL,4
1208 lda [%o0]0x88,%f4 ! ASI_PL
1209 fmovs %f4,%f0 ! Compiler can clean this up
1210 .end
1211 !
1212 ! double vis_lddfa_ASI_REG(void *rs1)
1213 !
1214 .inline vis_lddfa_ASI_REG,4
1215 ldda [%o0+0]%asi,%f4
1216 fmovd %f4,%f0 ! Compiler can clean this up
1217 .end
1218 !
1219 ! double vis_lddfa_ASI_P(void *rs1)
1220 !
1221 .inline vis_lddfa_ASI_P,4
1222 ldda [%o0]0x80,%f4 ! ASI_P
1223 fmovd %f4,%f0 ! Compiler can clean this up
1224 .end
1225 !
1226 ! double vis_lddfa_ASI_PL(void *rs1)
1227 !
1228 .inline vis_lddfa_ASI_PL,4
1229 ldda [%o0]0x88,%f4 ! ASI_PL
1230 fmovd %f4,%f0 ! Compiler can clean this up
1231 .end
1232 !
1233 ! vis_stfa_ASI_REG(float frs, void *rs1)
1234 !
1235 .inline vis_stfa_ASI_REG,8
1236 st %o0,[%sp+0x48]
1237 ld [%sp+0x48],%f4
1238 sta %f4,[%o1+0]%asi
1239 .end
1240 !
1241 ! vis_stfa_ASI_P(float frs, void *rs1)
1242 !
1243 .inline vis_stfa_ASI_P,8
1244 st %o0,[%sp+0x48]
1245 ld [%sp+0x48],%f4
1246 sta %f4,[%o1]0x80 ! ASI_P
1247 .end
1248 !
1249 ! vis_stfa_ASI_PL(float frs, void *rs1)
1250 !
1251 .inline vis_stfa_ASI_PL,8
1252 st %o0,[%sp+0x48]
1253 ld [%sp+0x48],%f4
1254 sta %f4,[%o1]0x88 ! ASI_PL
1255 .end
1256 !
1257 ! vis_stdfa_ASI_REG(double frd, void *rs1)
1258 !
1259 .inline vis_stdfa_ASI_REG,12
1260 std %o0,[%sp+0x48]
1261 ldd [%sp+0x48],%f4
1262 stda %f4,[%o2+0]%asi
1263 .end
1264 !
1265 ! vis_stdfa_ASI_P(double frd, void *rs1)
1266 !
1267 .inline vis_stdfa_ASI_P,12
1268 std %o0,[%sp+0x48]
1269 ldd [%sp+0x48],%f4
1270 stda %f4,[%o2]0x80 ! ASI_P
1271 .end
1272 !
1273 ! vis_stdfa_ASI_PL(double frd, void *rs1)
1274 !
1275 .inline vis_stdfa_ASI_PL,12
1276 std %o0,[%sp+0x48]
1277 ldd [%sp+0x48],%f4
1278 stda %f4,[%o2]0x88 ! ASI_PL
1279 .end
1280 !
1281 ! unsigned short vis_lduha_ASI_REG(void *rs1)
1282 !
1283 .inline vis_lduha_ASI_REG,4
1284 lduha [%o0+0]%asi,%o0
1285 .end
1286 !
1287 ! unsigned short vis_lduha_ASI_P(void *rs1)
1288 !
1289 .inline vis_lduha_ASI_P,4
1290 lduha [%o0]0x80,%o0 ! ASI_P
1291 .end
1292 !
1293 ! unsigned short vis_lduha_ASI_PL(void *rs1)
1294 !
1295 .inline vis_lduha_ASI_PL,4
1296 lduha [%o0]0x88,%o0 ! ASI_PL
1297 .end
1298 !
1299 ! unsigned short vis_lduha_ASI_P_index(void *rs1, long index)
1300 !
1301 .inline vis_lduha_ASI_P_index,8
1302 lduha [%o0+%o1]0x80,%o0 ! ASI_P
1303 .end
1304 !
1305 ! unsigned short vis_lduha_ASI_PL_index(void *rs1, long index)
1306 !
1307 .inline vis_lduha_ASI_PL_index,8
1308 lduha [%o0+%o1]0x88,%o0 ! ASI_PL
1309 .end
1311 !--------------------------------------------------------------------
1312 ! Prefetch
1313 !
1314 ! void vis_prefetch_read(void * /*address*/);
1315 !
1316 .inline vis_prefetch_read,4
1317 prefetch [%o0+0],0
1318 .end
1319 !
1320 ! void vis_prefetch_write(void * /*address*/);
1321 !
1322 .inline vis_prefetch_write,4
1323 prefetch [%o0+0],2
1324 .end