| blob | 2470a25eba4fb3ee5c01576e680be1aca1342d8c |
1 !
2 ! ***** BEGIN LICENSE BLOCK *****
3 ! Version: MPL 1.1/GPL 2.0/LGPL 2.1
4 !
5 ! The contents of this file are subject to the Mozilla Public License Version
6 ! 1.1 (the "License"); you may not use this file except in compliance with
7 ! the License. You may obtain a copy of the License at
8 ! http://www.mozilla.org/MPL/
9 !
10 ! Software distributed under the License is distributed on an "AS IS" basis,
11 ! WITHOUT WARRANTY OF ANY KIND, either express or implied. See the License
12 ! for the specific language governing rights and limitations under the
13 ! License.
14 !
15 ! The Original Code is vis inline macros (64 bit). (vis_64.il 3.4).
16 !
17 ! The Initial Developer of the Original Code is
18 ! Sun Microsystems Inc.
19 ! Portions created by the Initial Developer are Copyright (C) 1998-2000
20 ! the Initial Developer. All Rights Reserved.
21 !
22 ! Contributor(s):
23 !
24 ! Alternatively, the contents of this file may be used under the terms of
25 ! either the GNU General Public License Version 2 or later (the "GPL"), or
26 ! the GNU Lesser General Public License Version 2.1 or later (the "LGPL"),
27 ! in which case the provisions of the GPL or the LGPL are applicable instead
28 ! of those above. If you wish to allow use of your version of this file only
29 ! under the terms of either the GPL or the LGPL, and not to allow others to
30 ! use your version of this file under the terms of the MPL, indicate your
31 ! decision by deleting the provisions above and replace them with the notice
32 ! and other provisions required by the GPL or the LGPL. If you do not delete
33 ! the provisions above, a recipient may use your version of this file under
34 ! the terms of any one of the MPL, the GPL or the LGPL.
35 !
36 ! ***** END LICENSE BLOCK *****
37 ! $Id: vis_64.il,v 1.3 2004/04/27 23:04:36 gerv%gerv.net Exp $
39 ! This file is to be used in place of vis.il in 64-bit builds.
41 !--------------------------------------------------------------------
42 ! Pure edge handling instructions
43 !
44 ! int vis_edge8(void */*frs1*/, void */*frs2*/);
45 !
46 .inline vis_edge8,16
47 edge8 %o0,%o1,%o0
48 .end
49 !
50 ! int vis_edge8l(void */*frs1*/, void */*frs2*/);
51 !
52 .inline vis_edge8l,16
53 edge8l %o0,%o1,%o0
54 .end
55 !
56 ! int vis_edge16(void */*frs1*/, void */*frs2*/);
57 !
58 .inline vis_edge16,16
59 edge16 %o0,%o1,%o0
60 .end
61 !
62 ! int vis_edge16l(void */*frs1*/, void */*frs2*/);
63 !
64 .inline vis_edge16l,16
65 edge16l %o0,%o1,%o0
66 .end
67 !
68 ! int vis_edge32(void */*frs1*/, void */*frs2*/);
69 !
70 .inline vis_edge32,16
71 edge32 %o0,%o1,%o0
72 .end
73 !
74 ! int vis_edge32l(void */*frs1*/, void */*frs2*/);
75 !
76 .inline vis_edge32l,16
77 edge32l %o0,%o1,%o0
78 .end
80 !--------------------------------------------------------------------
81 ! Edge handling instructions with negative return values if cc set
82 !
83 ! int vis_edge8cc(void */*frs1*/, void */*frs2*/);
84 !
85 .inline vis_edge8cc,16
86 edge8 %o0,%o1,%o0
87 mov 0,%o1
88 movgu %xcc,-1024,%o1
89 or %o1,%o0,%o0
90 .end
91 !
92 ! int vis_edge8lcc(void */*frs1*/, void */*frs2*/);
93 !
94 .inline vis_edge8lcc,16
95 edge8l %o0,%o1,%o0
96 mov 0,%o1
97 movgu %xcc,-1024,%o1
98 or %o1,%o0,%o0
99 .end
100 !
101 ! int vis_edge16cc(void */*frs1*/, void */*frs2*/);
102 !
103 .inline vis_edge16cc,16
104 edge16 %o0,%o1,%o0
105 mov 0,%o1
106 movgu %xcc,-1024,%o1
107 or %o1,%o0,%o0
108 .end
109 !
110 ! int vis_edge16lcc(void */*frs1*/, void */*frs2*/);
111 !
112 .inline vis_edge16lcc,16
113 edge16l %o0,%o1,%o0
114 mov 0,%o1
115 movgu %xcc,-1024,%o1
116 or %o1,%o0,%o0
117 .end
118 !
119 ! int vis_edge32cc(void */*frs1*/, void */*frs2*/);
120 !
121 .inline vis_edge32cc,16
122 edge32 %o0,%o1,%o0
123 mov 0,%o1
124 movgu %xcc,-1024,%o1
125 or %o1,%o0,%o0
126 .end
127 !
128 ! int vis_edge32lcc(void */*frs1*/, void */*frs2*/);
129 !
130 .inline vis_edge32lcc,16
131 edge32l %o0,%o1,%o0
132 mov 0,%o1
133 movgu %xcc,-1024,%o1
134 or %o1,%o0,%o0
135 .end
137 !--------------------------------------------------------------------
138 ! Alignment instructions
139 !
140 ! void *vis_alignaddr(void */*rs1*/, int /*rs2*/);
141 !
142 .inline vis_alignaddr,12
143 alignaddr %o0,%o1,%o0
144 .end
145 !
146 ! void *vis_alignaddrl(void */*rs1*/, int /*rs2*/);
147 !
148 .inline vis_alignaddrl,12
149 alignaddrl %o0,%o1,%o0
150 .end
151 !
152 ! double vis_faligndata(double /*frs1*/, double /*frs2*/);
153 !
154 .inline vis_faligndata,16
155 faligndata %f0,%f2,%f0
156 .end
158 !--------------------------------------------------------------------
159 ! Partitioned comparison instructions
160 !
161 ! int vis_fcmple16(double /*frs1*/, double /*frs2*/);
162 !
163 .inline vis_fcmple16,16
164 fcmple16 %f0,%f2,%o0
165 .end
166 !
167 ! int vis_fcmpne16(double /*frs1*/, double /*frs2*/);
168 !
169 .inline vis_fcmpne16,16
170 fcmpne16 %f0,%f2,%o0
171 .end
172 !
173 ! int vis_fcmple32(double /*frs1*/, double /*frs2*/);
174 !
175 .inline vis_fcmple32,16
176 fcmple32 %f0,%f2,%o0
177 .end
178 !
179 ! int vis_fcmpne32(double /*frs1*/, double /*frs2*/);
180 !
181 .inline vis_fcmpne32,16
182 fcmpne32 %f0,%f2,%o0
183 .end
184 !
185 ! int vis_fcmpgt16(double /*frs1*/, double /*frs2*/);
186 !
187 .inline vis_fcmpgt16,16
188 fcmpgt16 %f0,%f2,%o0
189 .end
190 !
191 ! int vis_fcmpeq16(double /*frs1*/, double /*frs2*/);
192 !
193 .inline vis_fcmpeq16,16
194 fcmpeq16 %f0,%f2,%o0
195 .end
196 !
197 ! int vis_fcmpgt32(double /*frs1*/, double /*frs2*/);
198 !
199 .inline vis_fcmpgt32,16
200 fcmpgt32 %f0,%f2,%o0
201 .end
202 !
203 ! int vis_fcmpeq32(double /*frs1*/, double /*frs2*/);
204 !
205 .inline vis_fcmpeq32,16
206 fcmpeq32 %f0,%f2,%o0
207 .end
209 !--------------------------------------------------------------------
210 ! Partitioned arithmetic
211 !
212 ! double vis_fmul8x16(float /*frs1*/, double /*frs2*/);
213 !
214 .inline vis_fmul8x16,12
215 fmul8x16 %f1,%f2,%f0
216 .end
217 !
218 ! double vis_fmul8x16_dummy(float /*frs1*/, int /*dummy*/, double /*frs2*/);
219 !
220 .inline vis_fmul8x16_dummy,16
221 fmul8x16 %f1,%f4,%f0
222 .end
223 !
224 ! double vis_fmul8x16au(float /*frs1*/, float /*frs2*/);
225 !
226 .inline vis_fmul8x16au,8
227 fmul8x16au %f1,%f3,%f0
228 .end
229 !
230 ! double vis_fmul8x16al(float /*frs1*/, float /*frs2*/);
231 !
232 .inline vis_fmul8x16al,8
233 fmul8x16al %f1,%f3,%f0
234 .end
235 !
236 ! double vis_fmul8sux16(double /*frs1*/, double /*frs2*/);
237 !
238 .inline vis_fmul8sux16,16
239 fmul8sux16 %f0,%f2,%f0
240 .end
241 !
242 ! double vis_fmul8ulx16(double /*frs1*/, double /*frs2*/);
243 !
244 .inline vis_fmul8ulx16,16
245 fmul8ulx16 %f0,%f2,%f0
246 .end
247 !
248 ! double vis_fmuld8sux16(float /*frs1*/, float /*frs2*/);
249 !
250 .inline vis_fmuld8sux16,8
251 fmuld8sux16 %f1,%f3,%f0
252 .end
253 !
254 ! double vis_fmuld8ulx16(float /*frs1*/, float /*frs2*/);
255 !
256 .inline vis_fmuld8ulx16,8
257 fmuld8ulx16 %f1,%f3,%f0
258 .end
259 !
260 ! double vis_fpadd16(double /*frs1*/, double /*frs2*/);
261 !
262 .inline vis_fpadd16,16
263 fpadd16 %f0,%f2,%f0
264 .end
265 !
266 ! float vis_fpadd16s(float /*frs1*/, float /*frs2*/);
267 !
268 .inline vis_fpadd16s,8
269 fpadd16s %f1,%f3,%f0
270 .end
271 !
272 ! double vis_fpadd32(double /*frs1*/, double /*frs2*/);
273 !
274 .inline vis_fpadd32,16
275 fpadd32 %f0,%f2,%f0
276 .end
277 !
278 ! float vis_fpadd32s(float /*frs1*/, float /*frs2*/);
279 !
280 .inline vis_fpadd32s,8
281 fpadd32s %f1,%f3,%f0
282 .end
283 !
284 ! double vis_fpsub16(double /*frs1*/, double /*frs2*/);
285 !
286 .inline vis_fpsub16,16
287 fpsub16 %f0,%f2,%f0
288 .end
289 !
290 ! float vis_fpsub16s(float /*frs1*/, float /*frs2*/);
291 !
292 .inline vis_fpsub16s,8
293 fpsub16s %f1,%f3,%f0
294 .end
295 !
296 ! double vis_fpsub32(double /*frs1*/, double /*frs2*/);
297 !
298 .inline vis_fpsub32,16
299 fpsub32 %f0,%f2,%f0
300 .end
301 !
302 ! float vis_fpsub32s(float /*frs1*/, float /*frs2*/);
303 !
304 .inline vis_fpsub32s,8
305 fpsub32s %f1,%f3,%f0
306 .end
308 !--------------------------------------------------------------------
309 ! Pixel packing
310 !
311 ! float vis_fpack16(double /*frs2*/);
312 !
313 .inline vis_fpack16,8
314 fpack16 %f0,%f0
315 .end
316 !
317 ! double vis_fpack16_pair(double /*frs2*/, double /*frs2*/);
318 !
319 .inline vis_fpack16_pair,16
320 fpack16 %f0,%f0
321 fpack16 %f2,%f1
322 .end
323 !
324 ! void vis_st2_fpack16(double, double, double *)
325 !
326 .inline vis_st2_fpack16,24
327 fpack16 %f0,%f0
328 fpack16 %f2,%f1
329 st %f0,[%o2+0]
330 st %f1,[%o2+4]
331 .end
332 !
333 ! void vis_std_fpack16(double, double, double *)
334 !
335 .inline vis_std_fpack16,24
336 fpack16 %f0,%f0
337 fpack16 %f2,%f1
338 std %f0,[%o2]
339 .end
340 !
341 ! void vis_st2_fpackfix(double, double, double *)
342 !
343 .inline vis_st2_fpackfix,24
344 fpackfix %f0,%f0
345 fpackfix %f2,%f1
346 st %f0,[%o2+0]
347 st %f1,[%o2+4]
348 .end
349 !
350 ! double vis_fpack16_to_hi(double /*frs1*/, double /*frs2*/);
351 !
352 .inline vis_fpack16_to_hi,16
353 fpack16 %f2,%f0
354 .end
356 ! double vis_fpack16_to_lo(double /*frs1*/, double /*frs2*/);
357 !
358 .inline vis_fpack16_to_lo,16
359 fpack16 %f2,%f3
360 fmovs %f3,%f1 /* without this, optimizer goes wrong */
361 .end
363 !
364 ! double vis_fpack32(double /*frs1*/, double /*frs2*/);
365 !
366 .inline vis_fpack32,16
367 fpack32 %f0,%f2,%f0
368 .end
369 !
370 ! float vis_fpackfix(double /*frs2*/);
371 !
372 .inline vis_fpackfix,8
373 fpackfix %f0,%f0
374 .end
375 !
376 ! double vis_fpackfix_pair(double /*frs2*/, double /*frs2*/);
377 !
378 .inline vis_fpackfix_pair,16
379 fpackfix %f0,%f0
380 fpackfix %f2,%f1
381 .end
383 !--------------------------------------------------------------------
384 ! Motion estimation
385 !
386 ! double vis_pxldist64(double accum /*frd*/, double pxls1 /*frs1*/,
387 ! double pxls2 /*frs2*/);
388 !
389 .inline vis_pxldist64,24
390 pdist %f2,%f4,%f0
391 .end
393 !--------------------------------------------------------------------
394 ! Channel merging
395 !
396 ! double vis_fpmerge(float /*frs1*/, float /*frs2*/);
397 !
398 .inline vis_fpmerge,8
399 fpmerge %f1,%f3,%f0
400 .end
402 !--------------------------------------------------------------------
403 ! Pixel expansion
404 !
405 ! double vis_fexpand(float /*frs2*/);
406 !
407 .inline vis_fexpand,4
408 fexpand %f1,%f0
409 .end
411 ! double vis_fexpand_hi(double /*frs2*/);
412 !
413 .inline vis_fexpand_hi,8
414 fexpand %f0,%f0
415 .end
417 ! double vis_fexpand_lo(double /*frs2*/);
418 !
419 .inline vis_fexpand_lo,8
420 fexpand %f1,%f0
421 .end
423 !--------------------------------------------------------------------
424 ! Bitwise logical operations
425 !
426 ! double vis_fnor(double /*frs1*/, double /*frs2*/);
427 !
428 .inline vis_fnor,16
429 fnor %f0,%f2,%f0
430 .end
431 !
432 ! float vis_fnors(float /*frs1*/, float /*frs2*/);
433 !
434 .inline vis_fnors,8
435 fnors %f1,%f3,%f0
436 .end
437 !
438 ! double vis_fandnot(double /*frs1*/, double /*frs2*/);
439 !
440 .inline vis_fandnot,16
441 fandnot1 %f0,%f2,%f0
442 .end
443 !
444 ! float vis_fandnots(float /*frs1*/, float /*frs2*/);
445 !
446 .inline vis_fandnots,8
447 fandnot1s %f1,%f3,%f0
448 .end
449 !
450 ! double vis_fnot(double /*frs1*/);
451 !
452 .inline vis_fnot,8
453 fnot1 %f0,%f0
454 .end
455 !
456 ! float vis_fnots(float /*frs1*/);
457 !
458 .inline vis_fnots,4
459 fnot1s %f1,%f0
460 .end
461 !
462 ! double vis_fxor(double /*frs1*/, double /*frs2*/);
463 !
464 .inline vis_fxor,16
465 fxor %f0,%f2,%f0
466 .end
467 !
468 ! float vis_fxors(float /*frs1*/, float /*frs2*/);
469 !
470 .inline vis_fxors,8
471 fxors %f1,%f3,%f0
472 .end
473 !
474 ! double vis_fnand(double /*frs1*/, double /*frs2*/);
475 !
476 .inline vis_fnand,16
477 fnand %f0,%f2,%f0
478 .end
479 !
480 ! float vis_fnands(float /*frs1*/, float /*frs2*/);
481 !
482 .inline vis_fnands,8
483 fnands %f1,%f3,%f0
484 .end
485 !
486 ! double vis_fand(double /*frs1*/, double /*frs2*/);
487 !
488 .inline vis_fand,16
489 fand %f0,%f2,%f0
490 .end
491 !
492 ! float vis_fands(float /*frs1*/, float /*frs2*/);
493 !
494 .inline vis_fands,8
495 fands %f1,%f3,%f0
496 .end
497 !
498 ! double vis_fxnor(double /*frs1*/, double /*frs2*/);
499 !
500 .inline vis_fxnor,16
501 fxnor %f0,%f2,%f0
502 .end
503 !
504 ! float vis_fxnors(float /*frs1*/, float /*frs2*/);
505 !
506 .inline vis_fxnors,8
507 fxnors %f1,%f3,%f0
508 .end
509 !
510 ! double vis_fsrc(double /*frs1*/);
511 !
512 .inline vis_fsrc,8
513 fsrc1 %f0,%f0
514 .end
515 !
516 ! float vis_fsrcs(float /*frs1*/);
517 !
518 .inline vis_fsrcs,4
519 fsrc1s %f1,%f0
520 .end
521 !
522 ! double vis_fornot(double /*frs1*/, double /*frs2*/);
523 !
524 .inline vis_fornot,16
525 fornot1 %f0,%f2,%f0
526 .end
527 !
528 ! float vis_fornots(float /*frs1*/, float /*frs2*/);
529 !
530 .inline vis_fornots,8
531 fornot1s %f1,%f3,%f0
532 .end
533 !
534 ! double vis_for(double /*frs1*/, double /*frs2*/);
535 !
536 .inline vis_for,16
537 for %f0,%f2,%f0
538 .end
539 !
540 ! float vis_fors(float /*frs1*/, float /*frs2*/);
541 !
542 .inline vis_fors,8
543 fors %f1,%f3,%f0
544 .end
545 !
546 ! double vis_fzero(/* void */)
547 !
548 .inline vis_fzero,0
549 fzero %f0
550 .end
551 !
552 ! float vis_fzeros(/* void */)
553 !
554 .inline vis_fzeros,0
555 fzeros %f0
556 .end
557 !
558 ! double vis_fone(/* void */)
559 !
560 .inline vis_fone,0
561 fone %f0
562 .end
563 !
564 ! float vis_fones(/* void */)
565 !
566 .inline vis_fones,0
567 fones %f0
568 .end
570 !--------------------------------------------------------------------
571 ! Partial store instructions
572 !
573 ! vis_stdfa_ASI_PST8P(double frd, void *rs1, int rmask)
574 !
575 .inline vis_stdfa_ASI_PST8P,20
576 stda %f0,[%o1]%o2,0xc0 ! ASI_PST8_P
577 .end
578 !
579 ! vis_stdfa_ASI_PST8PL(double frd, void *rs1, int rmask)
580 !
581 .inline vis_stdfa_ASI_PST8PL,20
582 stda %f0,[%o1]%o2,0xc8 ! ASI_PST8_PL
583 .end
584 !
585 ! vis_stdfa_ASI_PST8P_int_pair(void *rs1, void *rs2, void *rs3, int rmask);
586 !
587 .inline vis_stdfa_ASI_PST8P_int_pair,28
588 ld [%o0],%f4
589 ld [%o1],%f5
590 stda %f4,[%o2]%o3,0xc0 ! ASI_PST8_P
591 .end
592 !
593 ! vis_stdfa_ASI_PST8S(double frd, void *rs1, int rmask)
594 !
595 .inline vis_stdfa_ASI_PST8S,20
596 stda %f0,[%o1]%o2,0xc1 ! ASI_PST8_S
597 .end
598 !
599 ! vis_stdfa_ASI_PST16P(double frd, void *rs1, int rmask)
600 !
601 .inline vis_stdfa_ASI_PST16P,20
602 stda %f0,[%o1]%o2,0xc2 ! ASI_PST16_P
603 .end
604 !
605 ! vis_stdfa_ASI_PST16S(double frd, void *rs1, int rmask)
606 !
607 .inline vis_stdfa_ASI_PST16S,20
608 stda %f0,[%o1]%o2,0xc3 ! ASI_PST16_S
609 .end
610 !
611 ! vis_stdfa_ASI_PST32P(double frd, void *rs1, int rmask)
612 !
613 .inline vis_stdfa_ASI_PST32P,20
614 stda %f0,[%o1]%o2,0xc4 ! ASI_PST32_P
615 .end
616 !
617 ! vis_stdfa_ASI_PST32S(double frd, void *rs1, int rmask)
618 !
619 .inline vis_stdfa_ASI_PST32S,20
620 stda %f0,[%o1]%o2,0xc5 ! ASI_PST32_S
621 .end
623 !--------------------------------------------------------------------
624 ! Short store instructions
625 !
626 ! vis_stdfa_ASI_FL8P(double frd, void *rs1)
627 !
628 .inline vis_stdfa_ASI_FL8P,16
629 stda %f0,[%o1]0xd0 ! ASI_FL8_P
630 .end
631 !
632 ! vis_stdfa_ASI_FL8P_index(double frd, void *rs1, long index)
633 !
634 .inline vis_stdfa_ASI_FL8P_index,24
635 stda %f0,[%o1+%o2]0xd0 ! ASI_FL8_P
636 .end
637 !
638 ! vis_stdfa_ASI_FL8S(double frd, void *rs1)
639 !
640 .inline vis_stdfa_ASI_FL8S,16
641 stda %f0,[%o1]0xd1 ! ASI_FL8_S
642 .end
643 !
644 ! vis_stdfa_ASI_FL16P(double frd, void *rs1)
645 !
646 .inline vis_stdfa_ASI_FL16P,16
647 stda %f0,[%o1]0xd2 ! ASI_FL16_P
648 .end
649 !
650 ! vis_stdfa_ASI_FL16P_index(double frd, void *rs1, long index)
651 !
652 .inline vis_stdfa_ASI_FL16P_index,24
653 stda %f0,[%o1+%o2]0xd2 ! ASI_FL16_P
654 .end
655 !
656 ! vis_stdfa_ASI_FL16S(double frd, void *rs1)
657 !
658 .inline vis_stdfa_ASI_FL16S,16
659 stda %f0,[%o1]0xd3 ! ASI_FL16_S
660 .end
661 !
662 ! vis_stdfa_ASI_FL8PL(double frd, void *rs1)
663 !
664 .inline vis_stdfa_ASI_FL8PL,16
665 stda %f0,[%o1]0xd8 ! ASI_FL8_PL
666 .end
667 !
668 ! vis_stdfa_ASI_FL8SL(double frd, void *rs1)
669 !
670 .inline vis_stdfa_ASI_FL8SL,16
671 stda %f0,[%o1]0xd9 ! ASI_FL8_SL
672 .end
673 !
674 ! vis_stdfa_ASI_FL16PL(double frd, void *rs1)
675 !
676 .inline vis_stdfa_ASI_FL16PL,16
677 stda %f0,[%o1]0xda ! ASI_FL16_PL
678 .end
679 !
680 ! vis_stdfa_ASI_FL16SL(double frd, void *rs1)
681 !
682 .inline vis_stdfa_ASI_FL16SL,16
683 stda %f0,[%o1]0xdb ! ASI_FL16_SL
684 .end
686 !--------------------------------------------------------------------
687 ! Short load instructions
688 !
689 ! double vis_lddfa_ASI_FL8P(void *rs1)
690 !
691 .inline vis_lddfa_ASI_FL8P,8
692 ldda [%o0]0xd0,%f4 ! ASI_FL8_P
693 fmovd %f4,%f0 ! Compiler can clean this up
694 .end
695 !
696 ! double vis_lddfa_ASI_FL8P_index(void *rs1, long index)
697 !
698 .inline vis_lddfa_ASI_FL8P_index,16
699 ldda [%o0+%o1]0xd0,%f4
700 fmovd %f4,%f0
701 .end
702 !
703 ! double vis_lddfa_ASI_FL8P_hi(void *rs1, unsigned int index)
704 !
705 .inline vis_lddfa_ASI_FL8P_hi,12
706 sra %o1,16,%o1
707 ldda [%o0+%o1]0xd0,%f4
708 fmovd %f4,%f0
709 .end
710 !
711 ! double vis_lddfa_ASI_FL8P_lo(void *rs1, unsigned int index)
712 !
713 .inline vis_lddfa_ASI_FL8P_lo,12
714 sll %o1,16,%o1
715 sra %o1,16,%o1
716 ldda [%o0+%o1]0xd0,%f4
717 fmovd %f4,%f0
718 .end
719 !
720 ! double vis_lddfa_ASI_FL8S(void *rs1)
721 !
722 .inline vis_lddfa_ASI_FL8S,8
723 ldda [%o0]0xd1,%f4 ! ASI_FL8_S
724 fmovd %f4,%f0
725 .end
726 !
727 ! double vis_lddfa_ASI_FL16P(void *rs1)
728 !
729 .inline vis_lddfa_ASI_FL16P,8
730 ldda [%o0]0xd2,%f4 ! ASI_FL16_P
731 fmovd %f4,%f0
732 .end
733 !
734 ! double vis_lddfa_ASI_FL16P_index(void *rs1, long index)
735 !
736 .inline vis_lddfa_ASI_FL16P_index,16
737 ldda [%o0+%o1]0xd2,%f4 ! ASI_FL16_P
738 fmovd %f4,%f0
739 .end
740 !
741 ! double vis_lddfa_ASI_FL16S(void *rs1)
742 !
743 .inline vis_lddfa_ASI_FL16S,8
744 ldda [%o0]0xd3,%f4 ! ASI_FL16_S
745 fmovd %f4,%f0
746 .end
747 !
748 ! double vis_lddfa_ASI_FL8PL(void *rs1)
749 !
750 .inline vis_lddfa_ASI_FL8PL,8
751 ldda [%o0]0xd8,%f4 ! ASI_FL8_PL
752 fmovd %f4,%f0
753 .end
754 !
755 ! double vis_lddfa_ASI_FL8PL_index(void *rs1, long index)
756 !
757 .inline vis_lddfa_ASI_FL8PL_index,16
758 ldda [%o0+%o1]0xd8,%f4 ! ASI_FL8_PL
759 fmovd %f4,%f0
760 .end
761 !
762 ! double vis_lddfa_ASI_FL8SL(void *rs1)
763 !
764 .inline vis_lddfa_ASI_FL8SL,8
765 ldda [%o0]0xd9,%f4 ! ASI_FL8_SL
766 fmovd %f4,%f0
767 .end
768 !
769 ! double vis_lddfa_ASI_FL16PL(void *rs1)
770 !
771 .inline vis_lddfa_ASI_FL16PL,8
772 ldda [%o0]0xda,%f4 ! ASI_FL16_PL
773 fmovd %f4,%f0
774 .end
775 !
776 ! double vis_lddfa_ASI_FL16PL_index(void *rs1, long index)
777 !
778 .inline vis_lddfa_ASI_FL16PL_index,16
779 ldda [%o0+%o1]0xda,%f4 ! ASI_FL16_PL
780 fmovd %f4,%f0
781 .end
782 !
783 ! double vis_lddfa_ASI_FL16SL(void *rs1)
784 !
785 .inline vis_lddfa_ASI_FL16SL,8
786 ldda [%o0]0xdb,%f4 ! ASI_FL16_SL
787 fmovd %f4,%f0
788 .end
790 !--------------------------------------------------------------------
791 ! Graphics status register
792 !
793 ! unsigned int vis_read_gsr(void)
794 !
795 .inline vis_read_gsr,0
796 rd %gsr,%o0
797 .end
798 !
799 ! void vis_write_gsr(unsigned int /* GSR */)
800 !
801 .inline vis_write_gsr,4
802 wr %g0,%o0,%gsr
803 .end
805 !--------------------------------------------------------------------
806 ! Voxel texture mapping
807 !
808 ! unsigned long vis_array8(unsigned long long /*rs1 */, int /*rs2*/)
809 !
810 .inline vis_array8,12
811 array8 %o0,%o1,%o0
812 .end
813 !
814 ! unsigned long vis_array16(unsigned long long /*rs1*/, int /*rs2*/)
815 !
816 .inline vis_array16,12
817 array16 %o0,%o1,%o0
818 .end
819 !
820 ! unsigned long vis_array32(unsigned long long /*rs1*/, int /*rs2*/)
821 !
822 .inline vis_array32,12
823 array32 %o0,%o1,%o0
824 .end
826 !--------------------------------------------------------------------
827 ! Register aliasing and type casts
828 !
829 ! float vis_read_hi(double /* frs1 */);
830 !
831 .inline vis_read_hi,8
832 fmovs %f0,%f0
833 .end
834 !
835 ! float vis_read_lo(double /* frs1 */);
836 !
837 .inline vis_read_lo,8
838 fmovs %f1,%f0 ! %f0 = low word (frs1); return %f0;
839 .end
840 !
841 ! double vis_write_hi(double /* frs1 */, float /* frs2 */);
842 !
843 .inline vis_write_hi,12
844 fmovs %f3,%f0 ! %f3 = float frs2; return %f0:f1;
845 .end
846 !
847 ! double vis_write_lo(double /* frs1 */, float /* frs2 */);
848 !
849 .inline vis_write_lo,12
850 fmovs %f3,%f1 ! %f3 = float frs2; return %f0:f1;
851 .end
852 !
853 ! double vis_freg_pair(float /* frs1 */, float /* frs2 */);
854 !
855 .inline vis_freg_pair,8
856 fmovs %f1,%f0 ! %f1 = float frs1; put in hi;
857 fmovs %f3,%f1 ! %f3 = float frs2; put in lo; return %f0:f1;
858 .end
859 !
860 ! float vis_to_float(unsigned int /*value*/);
861 !
862 .inline vis_to_float,4
863 st %o0,[%sp+2183]
864 ld [%sp+2183],%f0
865 .end
866 !
867 ! double vis_to_double(unsigned int /*value1*/, unsigned int /*value2*/);
868 !
869 .inline vis_to_double,8
870 st %o0,[%sp+2183]
871 ld [%sp+2183],%f0
872 st %o1,[%sp+2183]
873 ld [%sp+2183],%f1
874 .end
875 !
876 ! double vis_to_double_dup(unsigned int /*value*/);
877 !
878 .inline vis_to_double_dup,4
879 st %o0,[%sp+2183]
880 ld [%sp+2183],%f1
881 fmovs %f1,%f0 ! duplicate value
882 .end
883 !
884 ! double vis_ll_to_double(unsigned long long /*value*/);
885 !
886 .inline vis_ll_to_double,8
887 stx %o0,[%sp+2183]
888 ldd [%sp+2183],%f0
889 .end
891 !--------------------------------------------------------------------
892 ! Address space identifier (ASI) register
893 !
894 ! unsigned int vis_read_asi(void)
895 !
896 .inline vis_read_asi,0
897 rd %asi,%o0
898 .end
899 !
900 ! void vis_write_asi(unsigned int /* ASI */)
901 !
902 .inline vis_write_asi,4
903 wr %g0,%o0,%asi
904 .end
906 !--------------------------------------------------------------------
907 ! Load/store from/into alternate space
908 !
909 ! float vis_ldfa_ASI_REG(void *rs1)
910 !
911 .inline vis_ldfa_ASI_REG,8
912 lda [%o0+0]%asi,%f4
913 fmovs %f4,%f0 ! Compiler can clean this up
914 .end
915 !
916 ! float vis_ldfa_ASI_P(void *rs1)
917 !
918 .inline vis_ldfa_ASI_P,8
919 lda [%o0]0x80,%f4 ! ASI_P
920 fmovs %f4,%f0 ! Compiler can clean this up
921 .end
922 !
923 ! float vis_ldfa_ASI_PL(void *rs1)
924 !
925 .inline vis_ldfa_ASI_PL,8
926 lda [%o0]0x88,%f4 ! ASI_PL
927 fmovs %f4,%f0 ! Compiler can clean this up
928 .end
929 !
930 ! double vis_lddfa_ASI_REG(void *rs1)
931 !
932 .inline vis_lddfa_ASI_REG,8
933 ldda [%o0+0]%asi,%f4
934 fmovd %f4,%f0 ! Compiler can clean this up
935 .end
936 !
937 ! double vis_lddfa_ASI_P(void *rs1)
938 !
939 .inline vis_lddfa_ASI_P,8
940 ldda [%o0]0x80,%f4 ! ASI_P
941 fmovd %f4,%f0 ! Compiler can clean this up
942 .end
943 !
944 ! double vis_lddfa_ASI_PL(void *rs1)
945 !
946 .inline vis_lddfa_ASI_PL,8
947 ldda [%o0]0x88,%f4 ! ASI_PL
948 fmovd %f4,%f0 ! Compiler can clean this up
949 .end
950 !
951 ! vis_stfa_ASI_REG(float frs, void *rs1)
952 !
953 .inline vis_stfa_ASI_REG,12
954 sta %f1,[%o1+0]%asi
955 .end
956 !
957 ! vis_stfa_ASI_P(float frs, void *rs1)
958 !
959 .inline vis_stfa_ASI_P,12
960 sta %f1,[%o1]0x80 ! ASI_P
961 .end
962 !
963 ! vis_stfa_ASI_PL(float frs, void *rs1)
964 !
965 .inline vis_stfa_ASI_PL,12
966 sta %f1,[%o1]0x88 ! ASI_PL
967 .end
968 !
969 ! vis_stdfa_ASI_REG(double frd, void *rs1)
970 !
971 .inline vis_stdfa_ASI_REG,16
972 stda %f0,[%o1+0]%asi
973 .end
974 !
975 ! vis_stdfa_ASI_P(double frd, void *rs1)
976 !
977 .inline vis_stdfa_ASI_P,16
978 stda %f0,[%o1]0x80 ! ASI_P
979 .end
980 !
981 ! vis_stdfa_ASI_PL(double frd, void *rs1)
982 !
983 .inline vis_stdfa_ASI_PL,16
984 stda %f0,[%o1]0x88 ! ASI_PL
985 .end
986 !
987 ! unsigned short vis_lduha_ASI_REG(void *rs1)
988 !
989 .inline vis_lduha_ASI_REG,8
990 lduha [%o0+0]%asi,%o0
991 .end
992 !
993 ! unsigned short vis_lduha_ASI_P(void *rs1)
994 !
995 .inline vis_lduha_ASI_P,8
996 lduha [%o0]0x80,%o0 ! ASI_P
997 .end
998 !
999 ! unsigned short vis_lduha_ASI_PL(void *rs1)
1000 !
1001 .inline vis_lduha_ASI_PL,8
1002 lduha [%o0]0x88,%o0 ! ASI_PL
1003 .end
1004 !
1005 ! unsigned short vis_lduha_ASI_P_index(void *rs1, long index)
1006 !
1007 .inline vis_lduha_ASI_P_index,16
1008 lduha [%o0+%o1]0x80,%o0 ! ASI_P
1009 .end
1010 !
1011 ! unsigned short vis_lduha_ASI_PL_index(void *rs1, long index)
1012 !
1013 .inline vis_lduha_ASI_PL_index,16
1014 lduha [%o0+%o1]0x88,%o0 ! ASI_PL
1015 .end
1017 !--------------------------------------------------------------------
1018 ! Prefetch
1019 !
1020 ! void vis_prefetch_read(void * /*address*/);
1021 !
1022 .inline vis_prefetch_read,8
1023 prefetch [%o0+0],0
1024 .end
1025 !
1026 ! void vis_prefetch_write(void * /*address*/);
1027 !
1028 .inline vis_prefetch_write,8
1029 prefetch [%o0+0],2
1030 .end