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18 <h4 class=
"subsection">Zilog Z8000
</h4>
20 <p>When configured for debugging Zilog Z8000 targets, GDB includes
23 <p>For the Z8000 family,
<code>target sim
</code> simulates either the Z8002 (the
24 unsegmented variant of the Z8000 architecture) or the Z8001 (the
25 segmented variant). The simulator recognizes which architecture is
26 appropriate by inspecting the object code.
29 <dt><code>target sim
</code><var>args
</var><code></code>
30 <dd>Debug programs on a simulated CPU. If the simulator supports setup
31 options, specify them via
<var>args
</var>.
34 <p>After specifying this target, you can debug programs for the simulated
35 CPU in the same style as programs for your host computer; use the
36 <code>file
</code> command to load a new program image, the
<code>run
</code> command
37 to run your program, and so on.
39 <p>As well as making available all the usual machine registers
40 (see
<a href=
"Registers.html#Registers">Registers
</a>), the Z8000 simulator provides three
41 additional items of information as specially named registers:
45 <br><dt><code>cycles
</code>
46 <dd>Counts clock-ticks in the simulator.
48 <br><dt><code>insts
</code>
49 <dd>Counts instructions run in the simulator.
51 <br><dt><code>time
</code>
52 <dd>Execution time in
60ths of a second.
56 <p>You can refer to these values in GDB expressions with the usual
57 conventions; for example,
<code>b
fputc
if
$cycles
>5000</code> sets a
58 conditional breakpoint that suspends only after at least
5000
59 simulated clock ticks.