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HEAD
Fix opcode for VADDSUBPS; operands for VBLEND; add SSE for AES ops
[nasm/avx512.git]
/
test
/
lar_lsl.asm
blob
a0a9c0ebca1628b089c1375c276b45ba6e347f37
1
;Testname=test; Arguments=-fbin -olar_lsl.bin; Files=stdout stderr lar_lsl.bin
2
3
; LAR/LSL
4
;---------
5
6
; 1x ; = invalid due to lack of REX
7
; 3x ; = invalid due to Mw
8
9
%
macro
m
1
10
11
bits
16
12
13
%
1
ax
,
ax
14
%
1
ax
,
eax
15
; %1 ax,rax
16
17
%
1
eax
,
ax
18
%
1
eax
,
eax
19
; %1 eax,rax
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21
; %1 rax, ax
22
; %1 rax,eax
23
; %1 rax,rax
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25
%
1
ax
, [
0
]
26
%
1
ax
,
word
[
0
]
27
;;; %1 ax,dword [0]
28
; %1 ax,qword [0]
29
30
%
1
eax
, [
0
]
31
%
1
eax
,
word
[
0
]
32
;;; %1 eax,dword [0]
33
; %1 eax,qword [0]
34
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; %1 rax, [0]
36
; %1 rax, word [0]
37
; %1 rax,dword [0]
38
; %1 rax,qword [0]
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40
bits
32
41
42
%
1
ax
,
ax
43
%
1
ax
,
eax
44
; %1 ax,rax
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46
%
1
eax
,
ax
47
%
1
eax
,
eax
48
; %1 eax,rax
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50
; %1 rax, ax
51
; %1 rax,eax
52
; %1 rax,rax
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54
%
1
ax
, [
0
]
55
%
1
ax
,
word
[
0
]
56
;;; %1 ax,dword [0]
57
; %1 ax,qword [0]
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59
%
1
eax
, [
0
]
60
%
1
eax
,
word
[
0
]
61
;;; %1 eax,dword [0]
62
; %1 eax,qword [0]
63
64
; %1 rax, [0]
65
; %1 rax, word [0]
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; %1 rax,dword [0]
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; %1 rax,qword [0]
68
69
bits
64
70
71
%
1
ax
,
ax
72
%
1
ax
,
eax
73
%
1
ax
,
rax
; $TODO: shouldn't emit REX.W $
74
75
%
1
eax
,
ax
76
%
1
eax
,
eax
77
%
1
eax
,
rax
; $TODO: shouldn't emit REX.W $
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79
%
1
rax
,
ax
80
%
1
rax
,
eax
81
%
1
rax
,
rax
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83
%
1
ax
, [
0
]
84
%
1
ax
,
word
[
0
]
85
;;; %1 ax,dword [0]
86
;;; %1 ax,qword [0]
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88
%
1
eax
, [
0
]
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%
1
eax
,
word
[
0
]
90
;;; %1 eax,dword [0]
91
;;; %1 eax,qword [0]
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93
%
1
rax
, [
0
]
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%
1
rax
,
word
[
0
]
95
;;; %1 rax,dword [0]
96
;;; %1 rax,qword [0]
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98
%
endmacro
99
100
m
lar
101
102
m
lsl
103
104
bits
16
105
lar
ax
,[
si
]
106
lar
ax
,[
esi
]
107
bits
32
108
lar
ax
,[
si
]
109
lar
ax
,[
esi
]
110
bits
64
111
lar
ax
,[
esi
]
112
lar
ax
,[
rsi
]
113
114
bits
16
115
lsl
ax
,[
si
]
116
lsl
ax
,[
esi
]
117
bits
32
118
lsl
ax
,[
si
]
119
lsl
ax
,[
esi
]
120
bits
64
121
lar
ax
,[
esi
]
122
lsl
ax
,[
rsi
]
123
124
; EOF