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Fix some MMX/SSE irregularities which interact with the 64-bit support
[nasm/avx512.git] / disasm.c
blob8c02db1a3fad1ee21d2e8f6c6abed9903674335a
1 /* disasm.c where all the _work_ gets done in the Netwide Disassembler
2 *
3 * The Netwide Assembler is copyright (C) 1996 Simon Tatham and
4 * Julian Hall. All rights reserved. The software is
5 * redistributable under the licence given in the file "Licence"
6 * distributed in the NASM archive.
7 *
8 * initial version 27/iii/95 by Simon Tatham
9 */
10
11 #include <stdio.h>
12 #include <string.h>
13 #include <inttypes.h>
14
15 #include "nasm.h"
16 #include "disasm.h"
17 #include "sync.h"
18 #include "insns.h"
19
20 #include "names.c"
21
22 extern struct itemplate **itable[];
23
24 /*
25 * Flags that go into the `segment' field of `insn' structures
26 * during disassembly.
27 */
28 #define SEG_RELATIVE 1
29 #define SEG_32BIT 2
30 #define SEG_RMREG 4
31 #define SEG_DISP8 8
32 #define SEG_DISP16 16
33 #define SEG_DISP32 32
34 #define SEG_NODISP 64
35 #define SEG_SIGNED 128
36 #define SEG_64BIT 256
37
38 #include "regdis.c"
39
40 #define getu8(x) (*(uint8_t *)(x))
41 #if defined(__i386__) || defined(__x86_64__)
42 /* Littleendian CPU which can handle unaligned references */
43 #define getu16(x) (*(uint16_t *)(x))
44 #define getu32(x) (*(uint32_t *)(x))
45 #define getu64(x) (*(uint64_t *)(x))
46 #else
47 static uint16_t getu16(uint8_t *data)
48 {
49 return (uint16_t)data[0] + ((uint16_t)data[1] << 8);
50 }
51 static uint32_t getu32(uint8_t *data)
52 {
53 return (uint32_t)getu16(data) + ((uint32_t)getu16(data+2) << 16);
54 }
55 static uint64_t getu64(uint8_t *data)
56 {
57 return (uint64_t)getu32(data) + ((uint64_t)getu32(data+4) << 32);
58 }
59 #endif
60
61 #define gets8(x) ((int8_t)getu8(x))
62 #define gets16(x) ((int16_t)getu16(x))
63 #define gets32(x) ((int32_t)getu32(x))
64 #define gets64(x) ((int64_t)getu64(x))
65
66 /* Important: regval must already have been adjusted for rex extensions */
67 static int whichreg(int32_t regflags, int regval, int rex)
68 {
69 if (!(REG_AL & ~regflags))
70 return R_AL;
71 if (!(REG_AX & ~regflags))
72 return R_AX;
73 if (!(REG_EAX & ~regflags))
74 return R_EAX;
75 if (!(REG_RAX & ~regflags))
76 return R_RAX;
77 if (!(REG_DL & ~regflags))
78 return R_DL;
79 if (!(REG_DX & ~regflags))
80 return R_DX;
81 if (!(REG_EDX & ~regflags))
82 return R_EDX;
83 if (!(REG_RDX & ~regflags))
84 return R_RDX;
85 if (!(REG_CL & ~regflags))
86 return R_CL;
87 if (!(REG_CX & ~regflags))
88 return R_CX;
89 if (!(REG_ECX & ~regflags))
90 return R_ECX;
91 if (!(REG_RCX & ~regflags))
92 return R_RCX;
93 if (!(FPU0 & ~regflags))
94 return R_ST0;
95 if (!(REG_CS & ~regflags))
96 return (regval == 1) ? R_CS : 0;
97 if (!(REG_DESS & ~regflags))
98 return (regval == 0 || regval == 2
99 || regval == 3 ? rd_sreg[regval] : 0);
100 if (!(REG_FSGS & ~regflags))
101 return (regval == 4 || regval == 5 ? rd_sreg[regval] : 0);
102 if (!(REG_SEG67 & ~regflags))
103 return (regval == 6 || regval == 7 ? rd_sreg[regval] : 0);
104
105 /* All the entries below look up regval in an 16-entry array */
106 if (regval < 0 || regval > 15)
107 return 0;
108
109 if (!((REGMEM | BITS8) & ~regflags)) {
110 if (rex & REX_P)
111 return rd_reg8_rex[regval];
112 else
113 return rd_reg8[regval];
114 }
115 if (!((REGMEM | BITS16) & ~regflags))
116 return rd_reg16[regval];
117 if (!((REGMEM | BITS32) & ~regflags))
118 return rd_reg32[regval];
119 if (!((REGMEM | BITS64) & ~regflags))
120 return rd_reg64[regval];
121 if (!(REG_SREG & ~regflags))
122 return rd_sreg[regval & 7]; /* Ignore REX */
123 if (!(REG_CREG & ~regflags))
124 return rd_creg[regval];
125 if (!(REG_DREG & ~regflags))
126 return rd_dreg[regval];
127 if (!(REG_TREG & ~regflags)) {
128 if (rex & REX_P)
129 return 0; /* TR registers are ill-defined with rex */
130 return rd_treg[regval];
131 }
132 if (!(FPUREG & ~regflags))
133 return rd_fpureg[regval & 7]; /* Ignore REX */
134 if (!(MMXREG & ~regflags))
135 return rd_mmxreg[regval & 7]; /* Ignore REX */
136 if (!(XMMREG & ~regflags))
137 return rd_xmmreg[regval];
138
139 return 0;
140 }
141
142 static const char *whichcond(int condval)
143 {
144 static int conds[] = {
145 C_O, C_NO, C_C, C_NC, C_Z, C_NZ, C_NA, C_A,
146 C_S, C_NS, C_PE, C_PO, C_L, C_NL, C_NG, C_G
147 };
148 return conditions[conds[condval]];
149 }
150
151 /*
152 * Process an effective address (ModRM) specification.
153 */
154 static uint8_t *do_ea(uint8_t *data, int modrm, int asize,
155 int segsize, operand * op, int rex)
156 {
157 int mod, rm, scale, index, base;
158
159 mod = (modrm >> 6) & 03;
160 rm = modrm & 07;
161
162 if (mod == 3) { /* pure register version */
163 op->basereg = rm+(rex & REX_B ? 8 : 0);
164 op->segment |= SEG_RMREG;
165 return data;
166 }
167
168 op->addr_size = 0;
169 op->eaflags = 0;
170
171 if (asize == 16) {
172 /*
173 * <mod> specifies the displacement size (none, byte or
174 * word), and <rm> specifies the register combination.
175 * Exception: mod=0,rm=6 does not specify [BP] as one might
176 * expect, but instead specifies [disp16].
177 */
178 op->indexreg = op->basereg = -1;
179 op->scale = 1; /* always, in 16 bits */
180 switch (rm) {
181 case 0:
182 op->basereg = R_BX;
183 op->indexreg = R_SI;
184 break;
185 case 1:
186 op->basereg = R_BX;
187 op->indexreg = R_DI;
188 break;
189 case 2:
190 op->basereg = R_BP;
191 op->indexreg = R_SI;
192 break;
193 case 3:
194 op->basereg = R_BP;
195 op->indexreg = R_DI;
196 break;
197 case 4:
198 op->basereg = R_SI;
199 break;
200 case 5:
201 op->basereg = R_DI;
202 break;
203 case 6:
204 op->basereg = R_BP;
205 break;
206 case 7:
207 op->basereg = R_BX;
208 break;
209 }
210 if (rm == 6 && mod == 0) { /* special case */
211 op->basereg = -1;
212 if (segsize != 16)
213 op->addr_size = 16;
214 mod = 2; /* fake disp16 */
215 }
216 switch (mod) {
217 case 0:
218 op->segment |= SEG_NODISP;
219 break;
220 case 1:
221 op->segment |= SEG_DISP8;
222 op->offset = (int8_t)*data++;
223 break;
224 case 2:
225 op->segment |= SEG_DISP16;
226 op->offset = *data++;
227 op->offset |= ((unsigned)*data++) << 8;
228 break;
229 }
230 return data;
231 } else {
232 /*
233 * Once again, <mod> specifies displacement size (this time
234 * none, byte or *dword*), while <rm> specifies the base
235 * register. Again, [EBP] is missing, replaced by a pure
236 * disp32 (this time that's mod=0,rm=*5*) in 32-bit mode,
237 * and RIP-relative addressing in 64-bit mode.
238 *
239 * However, rm=4
240 * indicates not a single base register, but instead the
241 * presence of a SIB byte...
242 */
243 int a64 = asize == 64;
244
245 op->indexreg = -1;
246
247 if (a64)
248 op->basereg = rd_reg64[rm | ((rex & REX_B) ? 8 : 0)];
249 else
250 op->basereg = rd_reg32[rm | ((rex & REX_B) ? 8 : 0)];
251
252 if (rm == 5 && mod == 0) {
253 if (segsize == 64) {
254 op->eaflags |= EAF_REL;
255 op->segment |= SEG_RELATIVE;
256 mod = 2; /* fake disp32 */
257 }
258
259 if (asize != 64)
260 op->addr_size = asize;
261
262 op->basereg = -1;
263 mod = 2; /* fake disp32 */
264 }
265
266 if (rm == 4) { /* process SIB */
267 scale = (*data >> 6) & 03;
268 index = (*data >> 3) & 07;
269 base = *data & 07;
270 data++;
271
272 op->scale = 1 << scale;
273
274 if (index == 4)
275 op->indexreg = -1; /* ESP/RSP/R12 cannot be an index */
276 else if (a64)
277 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
278 else
279 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
280
281 if (base == 5 && mod == 0) {
282 op->basereg = -1;
283 mod = 2; /* Fake disp32 */
284 } else if (a64)
285 op->basereg = rd_reg64[base | ((rex & REX_B) ? 8 : 0)];
286 else
287 op->basereg = rd_reg32[base | ((rex & REX_B) ? 8 : 0)];
288
289 if (segsize != 32)
290 op->addr_size = 32;
291 }
292
293 switch (mod) {
294 case 0:
295 op->segment |= SEG_NODISP;
296 break;
297 case 1:
298 op->segment |= SEG_DISP8;
299 op->offset = gets8(data);
300 data++;
301 break;
302 case 2:
303 op->segment |= SEG_DISP32;
304 op->offset = getu32(data);
305 data += 4;
306 break;
307 }
308 return data;
309 }
310 }
311
312 /*
313 * Determine whether the instruction template in t corresponds to the data
314 * stream in data. Return the number of bytes matched if so.
315 */
316 static int matches(struct itemplate *t, uint8_t *data, int asize,
317 int osize, int segsize, int rep, insn * ins,
318 int rex, int *rexout, int lock)
319 {
320 uint8_t *r = (uint8_t *)(t->code);
321 uint8_t *origdata = data;
322 int a_used = FALSE, o_used = FALSE;
323 int drep = 0;
324
325 *rexout = rex;
326
327 if (t->flags & (segsize == 64 ? IF_NOLONG : IF_LONG))
328 return FALSE;
329
330 if (rep == 0xF2)
331 drep = P_REPNE;
332 else if (rep == 0xF3)
333 drep = P_REP;
334
335 while (*r) {
336 int c = *r++;
337
338 /* FIX: change this into a switch */
339 if (c >= 01 && c <= 03) {
340 while (c--)
341 if (*r++ != *data++)
342 return FALSE;
343 } else if (c == 04) {
344 switch (*data++) {
345 case 0x07:
346 ins->oprs[0].basereg = 0;
347 break;
348 case 0x17:
349 ins->oprs[0].basereg = 2;
350 break;
351 case 0x1F:
352 ins->oprs[0].basereg = 3;
353 break;
354 default:
355 return FALSE;
356 }
357 } else if (c == 05) {
358 switch (*data++) {
359 case 0xA1:
360 ins->oprs[0].basereg = 4;
361 break;
362 case 0xA9:
363 ins->oprs[0].basereg = 5;
364 break;
365 default:
366 return FALSE;
367 }
368 } else if (c == 06) {
369 switch (*data++) {
370 case 0x06:
371 ins->oprs[0].basereg = 0;
372 break;
373 case 0x0E:
374 ins->oprs[0].basereg = 1;
375 break;
376 case 0x16:
377 ins->oprs[0].basereg = 2;
378 break;
379 case 0x1E:
380 ins->oprs[0].basereg = 3;
381 break;
382 default:
383 return FALSE;
384 }
385 } else if (c == 07) {
386 switch (*data++) {
387 case 0xA0:
388 ins->oprs[0].basereg = 4;
389 break;
390 case 0xA8:
391 ins->oprs[0].basereg = 5;
392 break;
393 default:
394 return FALSE;
395 }
396 } else if (c >= 010 && c <= 012) {
397 int t = *r++, d = *data++;
398 if (d < t || d > t + 7)
399 return FALSE;
400 else {
401 ins->oprs[c - 010].basereg = (d-t)+(rex & REX_B ? 8 : 0);
402 ins->oprs[c - 010].segment |= SEG_RMREG;
403 }
404 } else if (c == 017) {
405 if (*data++)
406 return FALSE;
407 } else if (c >= 014 && c <= 016) {
408 ins->oprs[c - 014].offset = (int8_t)*data++;
409 ins->oprs[c - 014].segment |= SEG_SIGNED;
410 } else if (c >= 020 && c <= 022) {
411 ins->oprs[c - 020].offset = *data++;
412 } else if (c >= 024 && c <= 026) {
413 ins->oprs[c - 024].offset = *data++;
414 } else if (c >= 030 && c <= 032) {
415 ins->oprs[c - 030].offset = getu16(data);
416 data += 2;
417 } else if (c >= 034 && c <= 036) {
418 if (osize == 32) {
419 ins->oprs[c - 034].offset = getu32(data);
420 data += 4;
421 } else {
422 ins->oprs[c - 034].offset = getu16(data);
423 data += 2;
424 }
425 if (segsize != asize)
426 ins->oprs[c - 034].addr_size = asize;
427 } else if (c >= 040 && c <= 042) {
428 ins->oprs[c - 040].offset = getu32(data);
429 data += 4;
430 } else if (c >= 044 && c <= 046) {
431 switch (asize) {
432 case 16:
433 ins->oprs[c - 044].offset = getu16(data);
434 data += 2;
435 break;
436 case 32:
437 ins->oprs[c - 044].offset = getu32(data);
438 data += 4;
439 break;
440 case 64:
441 ins->oprs[c - 044].offset = getu64(data);
442 data += 8;
443 break;
444 }
445 if (segsize != asize)
446 ins->oprs[c - 044].addr_size = asize;
447 } else if (c >= 050 && c <= 052) {
448 ins->oprs[c - 050].offset = gets8(data++);
449 ins->oprs[c - 050].segment |= SEG_RELATIVE;
450 } else if (c >= 054 && c <= 056) {
451 ins->oprs[c - 054].offset = getu64(data);
452 data += 8;
453 } else if (c >= 060 && c <= 062) {
454 ins->oprs[c - 060].offset = gets16(data);
455 data += 2;
456 ins->oprs[c - 060].segment |= SEG_RELATIVE;
457 ins->oprs[c - 060].segment &= ~SEG_32BIT;
458 } else if (c >= 064 && c <= 066) {
459 if (osize == 16) {
460 ins->oprs[c - 064].offset = getu16(data);
461 data += 2;
462 ins->oprs[c - 064].segment &= ~(SEG_32BIT|SEG_64BIT);
463 } else if (osize == 32) {
464 ins->oprs[c - 064].offset = getu32(data);
465 data += 4;
466 ins->oprs[c - 064].segment &= ~SEG_64BIT;
467 ins->oprs[c - 064].segment |= SEG_32BIT;
468 }
469 if (segsize != osize) {
470 ins->oprs[c - 064].type =
471 (ins->oprs[c - 064].type & ~SIZE_MASK)
472 | ((osize == 16) ? BITS16 : BITS32);
473 }
474 } else if (c >= 070 && c <= 072) {
475 ins->oprs[c - 070].offset = getu32(data);
476 data += 4;
477 ins->oprs[c - 070].segment |= SEG_32BIT | SEG_RELATIVE;
478 } else if (c >= 0100 && c < 0130) {
479 int modrm = *data++;
480 ins->oprs[c & 07].basereg = ((modrm >> 3)&7)+(rex & REX_R ? 8 : 0);
481 ins->oprs[c & 07].segment |= SEG_RMREG;
482 data = do_ea(data, modrm, asize, segsize,
483 &ins->oprs[(c >> 3) & 07], rex);
484 } else if (c >= 0130 && c <= 0132) {
485 ins->oprs[c - 0130].offset = getu16(data);
486 data += 2;
487 } else if (c >= 0140 && c <= 0142) {
488 ins->oprs[c - 0140].offset = getu32(data);
489 data += 4;
490 } else if (c >= 0200 && c <= 0277) {
491 int modrm = *data++;
492 if (((modrm >> 3) & 07) != (c & 07))
493 return FALSE; /* spare field doesn't match up */
494 data = do_ea(data, modrm, asize, segsize,
495 &ins->oprs[(c >> 3) & 07], rex);
496 } else if (c >= 0300 && c <= 0302) {
497 a_used = TRUE;
498 } else if (c == 0310) {
499 if (asize != 16)
500 return FALSE;
501 else
502 a_used = TRUE;
503 } else if (c == 0311) {
504 if (asize == 16)
505 return FALSE;
506 else
507 a_used = TRUE;
508 } else if (c == 0312) {
509 if (asize != segsize)
510 return FALSE;
511 else
512 a_used = TRUE;
513 } else if (c == 0313) {
514 if (asize != 64)
515 return FALSE;
516 else
517 a_used = TRUE;
518 } else if (c == 0320) {
519 if (osize != 16)
520 return FALSE;
521 else
522 o_used = TRUE;
523 } else if (c == 0321) {
524 if (osize != 32)
525 return FALSE;
526 else
527 o_used = TRUE;
528 } else if (c == 0322) {
529 if (osize != (segsize == 16) ? 16 : 32)
530 return FALSE;
531 else
532 o_used = TRUE;
533 } else if (c == 0323) {
534 rex |= REX_W; /* 64-bit only instruction */
535 osize = 64;
536 } else if (c == 0324) {
537 if (!(rex & (REX_P|REX_W)) || osize != 64)
538 return FALSE;
539 } else if (c == 0330) {
540 int t = *r++, d = *data++;
541 if (d < t || d > t + 15)
542 return FALSE;
543 else
544 ins->condition = d - t;
545 } else if (c == 0331) {
546 if (rep)
547 return FALSE;
548 } else if (c == 0332) {
549 if (drep == P_REP)
550 drep = P_REPE;
551 } else if (c == 0333) {
552 if (rep != 0xF3)
553 return FALSE;
554 drep = 0;
555 } else if (c == 0334) {
556 if (lock) {
557 rex |= REX_R;
558 lock = 0;
559 }
560 }
561 }
562
563 /*
564 * Check for unused rep or a/o prefixes.
565 */
566 ins->nprefix = 0;
567 if (lock)
568 ins->prefixes[ins->nprefix++] = P_LOCK;
569 if (drep)
570 ins->prefixes[ins->nprefix++] = drep;
571 if (!a_used && asize != segsize)
572 ins->prefixes[ins->nprefix++] = asize == 16 ? P_A16 : P_A32;
573 if (!o_used && osize == ((segsize == 16) ? 32 : 16))
574 ins->prefixes[ins->nprefix++] = osize == 16 ? P_O16 : P_O32;
575
576 /* Fix: check for redundant REX prefixes */
577
578 *rexout = rex;
579 return data - origdata;
580 }
581
582 int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize,
583 int32_t offset, int autosync, uint32_t prefer)
584 {
585 struct itemplate **p, **best_p;
586 int length, best_length = 0;
587 char *segover;
588 int rep, lock, asize, osize, i, slen, colon, rex, rexout, best_rex;
589 uint8_t *origdata;
590 int works;
591 insn tmp_ins, ins;
592 uint32_t goodness, best;
593
594 /*
595 * Scan for prefixes.
596 */
597 asize = segsize;
598 osize = (segsize == 64) ? 32 : segsize;
599 rex = 0;
600 segover = NULL;
601 rep = lock = 0;
602 origdata = data;
603 for (;;) {
604 if (*data == 0xF3 || *data == 0xF2)
605 rep = *data++;
606 else if (*data == 0xF0)
607 lock = *data++;
608 else if (*data == 0x2E)
609 segover = "cs", data++;
610 else if (*data == 0x36)
611 segover = "ss", data++;
612 else if (*data == 0x3E)
613 segover = "ds", data++;
614 else if (*data == 0x26)
615 segover = "es", data++;
616 else if (*data == 0x64)
617 segover = "fs", data++;
618 else if (*data == 0x65)
619 segover = "gs", data++;
620 else if (*data == 0x66) {
621 osize = (segsize == 16) ? 32 : 16;
622 data++;
623 } else if (*data == 0x67) {
624 asize = (segsize == 32) ? 16 : 32;
625 data++;
626 } else if (segsize == 64 && (*data & 0xf0) == REX_P) {
627 rex = *data++;
628 if (rex & REX_W)
629 osize = 64;
630 break; /* REX is always the last prefix */
631 } else {
632 break;
633 }
634 }
635
636 tmp_ins.oprs[0].segment = tmp_ins.oprs[1].segment =
637 tmp_ins.oprs[2].segment =
638 tmp_ins.oprs[0].addr_size = tmp_ins.oprs[1].addr_size =
639 tmp_ins.oprs[2].addr_size = (segsize == 64 ? SEG_64BIT :
640 segsize == 32 ? SEG_32BIT : 0);
641 tmp_ins.condition = -1;
642 best = -1; /* Worst possible */
643 best_p = NULL;
644 best_rex = 0;
645 for (p = itable[*data]; *p; p++) {
646 if ((length = matches(*p, data, asize, osize, segsize, rep,
647 &tmp_ins, rex, &rexout, lock))) {
648 works = TRUE;
649 /*
650 * Final check to make sure the types of r/m match up.
651 * XXX: Need to make sure this is actually correct.
652 */
653 for (i = 0; i < (*p)->operands; i++) {
654 if (
655 /* If it's a mem-only EA but we have a register, die. */
656 ((tmp_ins.oprs[i].segment & SEG_RMREG) &&
657 !(MEMORY & ~(*p)->opd[i])) ||
658 /* If it's a reg-only EA but we have a memory ref, die. */
659 (!(tmp_ins.oprs[i].segment & SEG_RMREG) &&
660 !(REG_EA & ~(*p)->opd[i]) &&
661 !((*p)->opd[i] & REG_SMASK)) ||
662 /* Register type mismatch (eg FS vs REG_DESS): die. */
663 ((((*p)->opd[i] & (REGISTER | FPUREG)) ||
664 (tmp_ins.oprs[i].segment & SEG_RMREG)) &&
665 !whichreg((*p)->opd[i],
666 tmp_ins.oprs[i].basereg, rexout))) {
667 works = FALSE;
668 break;
669 }
670 }
671
672 if (works) {
673 goodness = ((*p)->flags & IF_PFMASK) ^ prefer;
674 if (goodness < best) {
675 /* This is the best one found so far */
676 best = goodness;
677 best_p = p;
678 best_length = length;
679 ins = tmp_ins;
680 best_rex = rexout;
681 }
682 }
683 }
684 }
685
686 if (!best_p)
687 return 0; /* no instruction was matched */
688
689 /* Pick the best match */
690 p = best_p;
691 length = best_length;
692 rex = best_rex;
693 if (best_rex & REX_W)
694 osize = 64;
695
696 slen = 0;
697
698 /* TODO: snprintf returns the value that the string would have if
699 * the buffer were long enough, and not the actual length of
700 * the returned string, so each instance of using the return
701 * value of snprintf should actually be checked to assure that
702 * the return value is "sane." Maybe a macro wrapper could
703 * be used for that purpose.
704 */
705 for (i = 0; i < ins.nprefix; i++)
706 switch (ins.prefixes[i]) {
707 case P_LOCK:
708 slen += snprintf(output + slen, outbufsize - slen, "lock ");
709 break;
710 case P_REP:
711 slen += snprintf(output + slen, outbufsize - slen, "rep ");
712 break;
713 case P_REPE:
714 slen += snprintf(output + slen, outbufsize - slen, "repe ");
715 break;
716 case P_REPNE:
717 slen += snprintf(output + slen, outbufsize - slen, "repne ");
718 break;
719 case P_A16:
720 slen += snprintf(output + slen, outbufsize - slen, "a16 ");
721 break;
722 case P_A32:
723 slen += snprintf(output + slen, outbufsize - slen, "a32 ");
724 break;
725 case P_O16:
726 slen += snprintf(output + slen, outbufsize - slen, "o16 ");
727 break;
728 case P_O32:
729 slen += snprintf(output + slen, outbufsize - slen, "o32 ");
730 break;
731 }
732
733 for (i = 0; i < elements(ico); i++)
734 if ((*p)->opcode == ico[i]) {
735 slen +=
736 snprintf(output + slen, outbufsize - slen, "%s%s", icn[i],
737 whichcond(ins.condition));
738 break;
739 }
740 if (i >= elements(ico))
741 slen +=
742 snprintf(output + slen, outbufsize - slen, "%s",
743 insn_names[(*p)->opcode]);
744 colon = FALSE;
745 length += data - origdata; /* fix up for prefixes */
746 for (i = 0; i < (*p)->operands; i++) {
747 output[slen++] = (colon ? ':' : i == 0 ? ' ' : ',');
748
749 if (ins.oprs[i].segment & SEG_RELATIVE) {
750 ins.oprs[i].offset += offset + length;
751 /*
752 * sort out wraparound
753 */
754 if (!(ins.oprs[i].segment & (SEG_32BIT|SEG_64BIT)))
755 ins.oprs[i].offset &= 0xffff;
756 /*
757 * add sync marker, if autosync is on
758 */
759 if (autosync)
760 add_sync(ins.oprs[i].offset, 0L);
761 }
762
763 if ((*p)->opd[i] & COLON)
764 colon = TRUE;
765 else
766 colon = FALSE;
767
768 if (((*p)->opd[i] & (REGISTER | FPUREG)) ||
769 (ins.oprs[i].segment & SEG_RMREG)) {
770 ins.oprs[i].basereg = whichreg((*p)->opd[i],
771 ins.oprs[i].basereg, rex);
772 if ((*p)->opd[i] & TO)
773 slen += snprintf(output + slen, outbufsize - slen, "to ");
774 slen += snprintf(output + slen, outbufsize - slen, "%s",
775 reg_names[ins.oprs[i].basereg -
776 EXPR_REG_START]);
777 } else if (!(UNITY & ~(*p)->opd[i])) {
778 output[slen++] = '1';
779 } else if ((*p)->opd[i] & IMMEDIATE) {
780 if ((*p)->opd[i] & BITS8) {
781 slen +=
782 snprintf(output + slen, outbufsize - slen, "byte ");
783 if (ins.oprs[i].segment & SEG_SIGNED) {
784 if (ins.oprs[i].offset < 0) {
785 ins.oprs[i].offset *= -1;
786 output[slen++] = '-';
787 } else
788 output[slen++] = '+';
789 }
790 } else if ((*p)->opd[i] & BITS16) {
791 slen +=
792 snprintf(output + slen, outbufsize - slen, "word ");
793 } else if ((*p)->opd[i] & BITS32) {
794 slen +=
795 snprintf(output + slen, outbufsize - slen, "dword ");
796 } else if ((*p)->opd[i] & BITS64) {
797 slen +=
798 snprintf(output + slen, outbufsize - slen, "qword ");
799 } else if ((*p)->opd[i] & NEAR) {
800 slen +=
801 snprintf(output + slen, outbufsize - slen, "near ");
802 } else if ((*p)->opd[i] & SHORT) {
803 slen +=
804 snprintf(output + slen, outbufsize - slen, "short ");
805 }
806 slen +=
807 snprintf(output + slen, outbufsize - slen, "0x%"PRIx64"",
808 ins.oprs[i].offset);
809 } else if (!(MEM_OFFS & ~(*p)->opd[i])) {
810 slen +=
811 snprintf(output + slen, outbufsize - slen, "[%s%s%s0x%"PRIx64"]",
812 ((const char*)segover ? (const char*)segover : ""), /* placate type mistmatch warning */
813 ((const char*)segover ? ":" : ""), /* by using (const char*) instead of uint8_t* */
814 (ins.oprs[i].addr_size ==
815 32 ? "dword " : ins.oprs[i].addr_size ==
816 16 ? "word " : ""), ins.oprs[i].offset);
817 segover = NULL;
818 } else if (!(REGMEM & ~(*p)->opd[i])) {
819 int started = FALSE;
820 if ((*p)->opd[i] & BITS8)
821 slen +=
822 snprintf(output + slen, outbufsize - slen, "byte ");
823 if ((*p)->opd[i] & BITS16)
824 slen +=
825 snprintf(output + slen, outbufsize - slen, "word ");
826 if ((*p)->opd[i] & BITS32)
827 slen +=
828 snprintf(output + slen, outbufsize - slen, "dword ");
829 if ((*p)->opd[i] & BITS64)
830 slen +=
831 snprintf(output + slen, outbufsize - slen, "qword ");
832 if ((*p)->opd[i] & BITS80)
833 slen +=
834 snprintf(output + slen, outbufsize - slen, "tword ");
835 if ((*p)->opd[i] & FAR)
836 slen += snprintf(output + slen, outbufsize - slen, "far ");
837 if ((*p)->opd[i] & NEAR)
838 slen +=
839 snprintf(output + slen, outbufsize - slen, "near ");
840 output[slen++] = '[';
841 if (ins.oprs[i].addr_size)
842 slen += snprintf(output + slen, outbufsize - slen, "%s",
843 (ins.oprs[i].addr_size == 64 ? "qword " :
844 ins.oprs[i].addr_size == 32 ? "dword " :
845 ins.oprs[i].addr_size == 16 ? "word " :
846 ""));
847 if (ins.oprs[i].eaflags & EAF_REL)
848 slen += snprintf(output + slen, outbufsize - slen, "rel ");
849 if (segover) {
850 slen +=
851 snprintf(output + slen, outbufsize - slen, "%s:",
852 segover);
853 segover = NULL;
854 }
855 if (ins.oprs[i].basereg != -1) {
856 slen += snprintf(output + slen, outbufsize - slen, "%s",
857 reg_names[(ins.oprs[i].basereg -
858 EXPR_REG_START)]);
859 started = TRUE;
860 }
861 if (ins.oprs[i].indexreg != -1) {
862 if (started)
863 output[slen++] = '+';
864 slen += snprintf(output + slen, outbufsize - slen, "%s",
865 reg_names[(ins.oprs[i].indexreg -
866 EXPR_REG_START)]);
867 if (ins.oprs[i].scale > 1)
868 slen +=
869 snprintf(output + slen, outbufsize - slen, "*%d",
870 ins.oprs[i].scale);
871 started = TRUE;
872 }
873 if (ins.oprs[i].segment & SEG_DISP8) {
874 int minus = 0;
875 int8_t offset = ins.oprs[i].offset;
876 if (offset < 0) {
877 minus = 1;
878 offset = -offset;
879 }
880 slen +=
881 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx8"",
882 minus ? "-" : "+", offset);
883 } else if (ins.oprs[i].segment & SEG_DISP16) {
884 int minus = 0;
885 int16_t offset = ins.oprs[i].offset;
886 if (offset < 0) {
887 minus = 1;
888 offset = -offset;
889 }
890 slen +=
891 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx16"",
892 minus ? "-" : started ? "+" : "", offset);
893 } else if (ins.oprs[i].segment & SEG_DISP32) {
894 char *prefix = "";
895 int32_t offset = ins.oprs[i].offset;
896 if (offset < 0) {
897 offset = -offset;
898 prefix = "-";
899 } else {
900 prefix = started ? "+" : "";
901 }
902 slen +=
903 snprintf(output + slen, outbufsize - slen,
904 "%s0x%"PRIx32"", prefix, offset);
905 }
906 output[slen++] = ']';
907 } else {
908 slen +=
909 snprintf(output + slen, outbufsize - slen, "<operand%d>",
910 i);
911 }
912 }
913 output[slen] = '\0';
914 if (segover) { /* unused segment override */
915 char *p = output;
916 int count = slen + 1;
917 while (count--)
918 p[count + 3] = p[count];
919 strncpy(output, segover, 2);
920 output[2] = ' ';
921 }
922 return length;
923 }
924
925 int32_t eatbyte(uint8_t *data, char *output, int outbufsize)
926 {
927 snprintf(output, outbufsize, "db 0x%02X", *data);
928 return 1;
929 }
Adding AVX-512 features