disasm.c

   1 /* disasm.c   where all the _work_ gets done in the Netwide Disassembler
   2  *
   3  * The Netwide Assembler is copyright (C) 1996 Simon Tatham and
   4  * Julian Hall. All rights reserved. The software is
   5  * redistributable under the licence given in the file "Licence"
   6  * distributed in the NASM archive.
   7  *
   8  * initial version 27/iii/95 by Simon Tatham
   9  */
  10
  11 #include <stdio.h>
  12 #include <string.h>
  13
  14 #include "nasm.h"
  15 #include "disasm.h"
  16 #include "sync.h"
  17 #include "insns.h"
  18
  19 #include "names.c"
  20
  21 extern struct itemplate **itable[];
  22
  23 /*
  24  * Flags that go into the `segment' field of `insn' structures
  25  * during disassembly.
  26  */
  27 #define SEG_RELATIVE 1
  28 #define SEG_32BIT 2
  29 #define SEG_RMREG 4
  30 #define SEG_DISP8 8
  31 #define SEG_DISP16 16
  32 #define SEG_DISP32 32
  33 #define SEG_NODISP 64
  34 #define SEG_SIGNED 128
  35
  36 static int whichreg(long regflags, int regval) {
  37     static int reg32[] = {
  38         R_EAX, R_ECX, R_EDX, R_EBX, R_ESP, R_EBP, R_ESI, R_EDI };
  39     static int reg16[] = {
  40         R_AX, R_CX, R_DX, R_BX, R_SP, R_BP, R_SI, R_DI };
  41     static int reg8[] = {
  42         R_AL, R_CL, R_DL, R_BL, R_AH, R_CH, R_DH, R_BH };
  43     static int sreg[] = {
  44         R_ES, R_CS, R_SS, R_DS, R_FS, R_GS, 0, 0 };
  45     static int creg[] = {
  46         R_CR0, 0, R_CR2, R_CR3, R_CR4, 0, 0, 0 };
  47     static int dreg[] = {
  48         R_DR0, R_DR1, R_DR2, R_DR3, 0, 0, R_DR6, R_DR7 };
  49     static int treg[] = {
  50         0, 0, 0, R_TR3, R_TR4, R_TR5, R_TR6, R_TR7 };
  51     static int fpureg[] = {
  52         R_ST0, R_ST1, R_ST2, R_ST3, R_ST4, R_ST5, R_ST6, R_ST7 };
  53     static int mmxreg[] = {
  54         R_MM0, R_MM1, R_MM2, R_MM3, R_MM4, R_MM5, R_MM6, R_MM7 };
  55
  56     if (!(REG_AL & ~regflags))
  57         return R_AL;
  58     if (!(REG_AX & ~regflags))
  59         return R_AX;
  60     if (!(REG_EAX & ~regflags))
  61         return R_EAX;
  62     if (!(REG_DX & ~regflags))
  63         return R_DX;
  64     if (!(REG_CL & ~regflags))
  65         return R_CL;
  66     if (!(REG_CX & ~regflags))
  67         return R_CX;
  68     if (!(REG_ECX & ~regflags))
  69         return R_ECX;
  70     if (!(REG_CR4 & ~regflags))
  71         return R_CR4;
  72     if (!(FPU0 & ~regflags))
  73         return R_ST0;
  74     if (!(REG_CS & ~regflags))
  75         return R_CS;
  76     if (!(REG_DESS & ~regflags))
  77         return (regval == 0 || regval == 2 || regval == 3 ? sreg[regval] : 0);
  78     if (!(REG_FSGS & ~regflags))
  79         return (regval == 4 || regval == 5 ? sreg[regval] : 0);
  80     if (!((REGMEM|BITS8) & ~regflags))
  81         return reg8[regval];
  82     if (!((REGMEM|BITS16) & ~regflags))
  83         return reg16[regval];
  84     if (!((REGMEM|BITS32) & ~regflags))
  85         return reg32[regval];
  86     if (!(REG_SREG & ~regflags))
  87         return sreg[regval];
  88     if (!(REG_CREG & ~regflags))
  89         return creg[regval];
  90     if (!(REG_DREG & ~regflags))
  91         return dreg[regval];
  92     if (!(REG_TREG & ~regflags))
  93         return treg[regval];
  94     if (!(FPUREG & ~regflags))
  95         return fpureg[regval];
  96     if (!(MMXREG & ~regflags))
  97         return mmxreg[regval];
  98     return 0;
  99 }
 100
 101 static char *whichcond(int condval) {
 102     static int conds[] = {
 103         C_O, C_NO, C_C, C_NC, C_Z, C_NZ, C_NA, C_A,
 104         C_S, C_NS, C_PE, C_PO, C_L, C_NL, C_NG, C_G
 105     };
 106     return conditions[conds[condval]];
 107 }
 108
 109 /*
 110  * Process an effective address (ModRM) specification.
 111  */
 112 static unsigned char *do_ea (unsigned char *data, int modrm, int asize,
 113                              int segsize, operand *op) {
 114     int mod, rm, scale, index, base;
 115
 116     mod = (modrm >> 6) & 03;
 117     rm = modrm & 07;
 118
 119     if (mod == 3) {                    /* pure register version */
 120         op->basereg = rm;
 121         op->segment |= SEG_RMREG;
 122         return data;
 123     }
 124
 125     op->addr_size = 0;
 126
 127     if (asize == 16) {
 128         /*
 129          * <mod> specifies the displacement size (none, byte or
 130          * word), and <rm> specifies the register combination.
 131          * Exception: mod=0,rm=6 does not specify [BP] as one might
 132          * expect, but instead specifies [disp16].
 133          */
 134         op->indexreg = op->basereg = -1;
 135         op->scale = 1;                 /* always, in 16 bits */
 136         switch (rm) {
 137           case 0: op->basereg = R_BX; op->indexreg = R_SI; break;
 138           case 1: op->basereg = R_BX; op->indexreg = R_DI; break;
 139           case 2: op->basereg = R_BP; op->indexreg = R_SI; break;
 140           case 3: op->basereg = R_BP; op->indexreg = R_DI; break;
 141           case 4: op->basereg = R_SI; break;
 142           case 5: op->basereg = R_DI; break;
 143           case 6: op->basereg = R_BP; break;
 144           case 7: op->basereg = R_BX; break;
 145         }
 146         if (rm == 6 && mod == 0) {     /* special case */
 147             op->basereg = -1;
 148             if (segsize != 16)
 149                 op->addr_size = 16;
 150             mod = 2;                   /* fake disp16 */
 151         }
 152         switch (mod) {
 153           case 0:
 154             op->segment |= SEG_NODISP;
 155             break;
 156           case 1:
 157             op->segment |= SEG_DISP8;
 158             op->offset = (signed char) *data++;
 159             break;
 160           case 2:
 161             op->segment |= SEG_DISP16;
 162             op->offset = *data++;
 163             op->offset |= (*data++) << 8;
 164             break;
 165         }
 166         return data;
 167     } else {
 168         /*
 169          * Once again, <mod> specifies displacement size (this time
 170          * none, byte or *dword*), while <rm> specifies the base
 171          * register. Again, [EBP] is missing, replaced by a pure
 172          * disp32 (this time that's mod=0,rm=*5*). However, rm=4
 173          * indicates not a single base register, but instead the
 174          * presence of a SIB byte...
 175          */
 176         op->indexreg = -1;
 177         switch (rm) {
 178           case 0: op->basereg = R_EAX; break;
 179           case 1: op->basereg = R_ECX; break;
 180           case 2: op->basereg = R_EDX; break;
 181           case 3: op->basereg = R_EBX; break;
 182           case 5: op->basereg = R_EBP; break;
 183           case 6: op->basereg = R_ESI; break;
 184           case 7: op->basereg = R_EDI; break;
 185         }
 186         if (rm == 5 && mod == 0) {
 187             op->basereg = -1;
 188             if (segsize != 32)
 189                 op->addr_size = 32;
 190             mod = 2;                   /* fake disp32 */
 191         }
 192         if (rm == 4) {                 /* process SIB */
 193             scale = (*data >> 6) & 03;
 194             index = (*data >> 3) & 07;
 195             base = *data & 07;
 196             data++;
 197
 198             op->scale = 1 << scale;
 199             switch (index) {
 200               case 0: op->indexreg = R_EAX; break;
 201               case 1: op->indexreg = R_ECX; break;
 202               case 2: op->indexreg = R_EDX; break;
 203               case 3: op->indexreg = R_EBX; break;
 204               case 4: op->indexreg = -1; break;
 205               case 5: op->indexreg = R_EBP; break;
 206               case 6: op->indexreg = R_ESI; break;
 207               case 7: op->indexreg = R_EDI; break;
 208             }
 209
 210             switch (base) {
 211               case 0: op->basereg = R_EAX; break;
 212               case 1: op->basereg = R_ECX; break;
 213               case 2: op->basereg = R_EDX; break;
 214               case 3: op->basereg = R_EBX; break;
 215               case 4: op->basereg = R_ESP; break;
 216               case 6: op->basereg = R_ESI; break;
 217               case 7: op->basereg = R_EDI; break;
 218               case 5:
 219                 if (mod == 0) {
 220                     mod = 2;
 221                     op->basereg = -1;
 222                 } else
 223                     op->basereg = R_EBP;
 224                 break;
 225             }
 226         }
 227         switch (mod) {
 228           case 0:
 229             op->segment |= SEG_NODISP;
 230             break;
 231           case 1:
 232             op->segment |= SEG_DISP8;
 233             op->offset = (signed char) *data++;
 234             break;
 235           case 2:
 236             op->segment |= SEG_DISP32;
 237             op->offset = *data++;
 238             op->offset |= (*data++) << 8;
 239             op->offset |= ((long) *data++) << 16;
 240             op->offset |= ((long) *data++) << 24;
 241             break;
 242         }
 243         return data;
 244     }
 245 }
 246
 247 /*
 248  * Determine whether the code string in r corresponds to the data
 249  * stream in data. Return the number of bytes matched if so.
 250  */
 251 static int matches (unsigned char *r, unsigned char *data, int asize,
 252                     int osize, int segsize, insn *ins) {
 253     unsigned char *origdata = data;
 254     int a_used = FALSE, o_used = FALSE;
 255
 256     while (*r) {
 257         int c = *r++;
 258         if (c >= 01 && c <= 03) {
 259             while (c--)
 260                 if (*r++ != *data++)
 261                     return FALSE;
 262         }
 263         if (c == 04) {
 264             switch (*data++) {
 265               case 0x07: ins->oprs[0].basereg = 0; break;
 266               case 0x17: ins->oprs[0].basereg = 2; break;
 267               case 0x1F: ins->oprs[0].basereg = 3; break;
 268               default: return FALSE;
 269             }
 270         }
 271         if (c == 05) {
 272             switch (*data++) {
 273               case 0xA1: ins->oprs[0].basereg = 4; break;
 274               case 0xA9: ins->oprs[0].basereg = 5; break;
 275               default: return FALSE;
 276             }
 277         }
 278         if (c == 06) {
 279             switch (*data++) {
 280               case 0x06: ins->oprs[0].basereg = 0; break;
 281               case 0x0E: ins->oprs[0].basereg = 1; break;
 282               case 0x16: ins->oprs[0].basereg = 2; break;
 283               case 0x1E: ins->oprs[0].basereg = 3; break;
 284               default: return FALSE;
 285             }
 286         }
 287         if (c == 07) {
 288             switch (*data++) {
 289               case 0xA0: ins->oprs[0].basereg = 4; break;
 290               case 0xA8: ins->oprs[0].basereg = 5; break;
 291               default: return FALSE;
 292             }
 293         }
 294         if (c >= 010 && c <= 012) {
 295             int t = *r++, d = *data++;
 296             if (d < t || d > t+7)
 297                 return FALSE;
 298             else {
 299                 ins->oprs[c-010].basereg = d-t;
 300                 ins->oprs[c-010].segment |= SEG_RMREG;
 301             }
 302         }
 303         if (c == 017)
 304             if (*data++)
 305                 return FALSE;
 306         if (c >= 014 && c <= 016) {
 307             ins->oprs[c-014].offset = (signed char) *data++;
 308             ins->oprs[c-014].segment |= SEG_SIGNED;
 309         }
 310         if (c >= 020 && c <= 022)
 311             ins->oprs[c-020].offset = *data++;
 312         if (c >= 024 && c <= 026)
 313             ins->oprs[c-024].offset = *data++;
 314         if (c >= 030 && c <= 032) {
 315             ins->oprs[c-030].offset = *data++;
 316             ins->oprs[c-030].offset |= (*data++ << 8);
 317         }
 318         if (c >= 034 && c <= 036) {
 319             ins->oprs[c-034].offset = *data++;
 320             ins->oprs[c-034].offset |= (*data++ << 8);
 321             if (asize == 32) {
 322                 ins->oprs[c-034].offset |= (((long) *data++) << 16);
 323                 ins->oprs[c-034].offset |= (((long) *data++) << 24);
 324             }
 325             if (segsize != asize)
 326                 ins->oprs[c-034].addr_size = asize;
 327         }
 328         if (c >= 040 && c <= 042) {
 329             ins->oprs[c-040].offset = *data++;
 330             ins->oprs[c-040].offset |= (*data++ << 8);
 331             ins->oprs[c-040].offset |= (((long) *data++) << 16);
 332             ins->oprs[c-040].offset |= (((long) *data++) << 24);
 333         }
 334         if (c >= 050 && c <= 052) {
 335             ins->oprs[c-050].offset = (signed char) *data++;
 336             ins->oprs[c-050].segment |= SEG_RELATIVE;
 337         }
 338         if (c >= 060 && c <= 062) {
 339             ins->oprs[c-060].offset = *data++;
 340             ins->oprs[c-060].offset |= (*data++ << 8);
 341             ins->oprs[c-060].segment |= SEG_RELATIVE;
 342             ins->oprs[c-060].segment &= ~SEG_32BIT;
 343         }
 344         if (c >= 064 && c <= 066) {
 345             ins->oprs[c-064].offset = *data++;
 346             ins->oprs[c-064].offset |= (*data++ << 8);
 347             if (asize == 32) {
 348                 ins->oprs[c-064].offset |= (((long) *data++) << 16);
 349                 ins->oprs[c-064].offset |= (((long) *data++) << 24);
 350                 ins->oprs[c-064].segment |= SEG_32BIT;
 351             } else
 352                 ins->oprs[c-064].segment &= ~SEG_32BIT;
 353             ins->oprs[c-064].segment |= SEG_RELATIVE;
 354             if (segsize != asize)
 355                 ins->oprs[c-064].addr_size = asize;
 356         }
 357         if (c >= 070 && c <= 072) {
 358             ins->oprs[c-070].offset = *data++;
 359             ins->oprs[c-070].offset |= (*data++ << 8);
 360             ins->oprs[c-070].offset |= (((long) *data++) << 16);
 361             ins->oprs[c-070].offset |= (((long) *data++) << 24);
 362             ins->oprs[c-070].segment |= SEG_32BIT | SEG_RELATIVE;
 363         }
 364         if (c >= 0100 && c <= 0177) {
 365             int modrm = *data++;
 366             ins->oprs[c & 07].basereg = (modrm >> 3) & 07;
 367             ins->oprs[c & 07].segment |= SEG_RMREG;
 368             data = do_ea (data, modrm, asize, segsize,
 369                           &ins->oprs[(c >> 3) & 07]);
 370         }
 371         if (c >= 0200 && c <= 0277) {
 372             int modrm = *data++;
 373             if (((modrm >> 3) & 07) != (c & 07))
 374                 return FALSE;          /* spare field doesn't match up */
 375             data = do_ea (data, modrm, asize, segsize,
 376                           &ins->oprs[(c >> 3) & 07]);
 377         }
 378         if (c >= 0300 && c <= 0302) {
 379             if (asize)
 380                 ins->oprs[c-0300].segment |= SEG_32BIT;
 381             else
 382                 ins->oprs[c-0300].segment &= ~SEG_32BIT;
 383             a_used = TRUE;
 384         }
 385         if (c == 0310) {
 386             if (asize == 32)
 387                 return FALSE;
 388             else
 389                 a_used = TRUE;
 390         }
 391         if (c == 0311) {
 392             if (asize == 16)
 393                 return FALSE;
 394             else
 395                 a_used = TRUE;
 396         }
 397         if (c == 0312) {
 398             if (asize != segsize)
 399                 return FALSE;
 400             else
 401                 a_used = TRUE;
 402         }
 403         if (c == 0320) {
 404             if (osize == 32)
 405                 return FALSE;
 406             else
 407                 o_used = TRUE;
 408         }
 409         if (c == 0321) {
 410             if (osize == 16)
 411                 return FALSE;
 412             else
 413                 o_used = TRUE;
 414         }
 415         if (c == 0322) {
 416             if (osize != segsize)
 417                 return FALSE;
 418             else
 419                 o_used = TRUE;
 420         }
 421         if (c == 0330) {
 422             int t = *r++, d = *data++;
 423             if (d < t || d > t+15)
 424                 return FALSE;
 425             else
 426                 ins->condition = d - t;
 427         }
 428     }
 429
 430     /*
 431      * Check for unused a/o prefixes.
 432      */
 433     ins->nprefix = 0;
 434     if (!a_used && asize != segsize)
 435         ins->prefixes[ins->nprefix++] = (asize == 16 ? P_A16 : P_A32);
 436     if (!o_used && osize != segsize)
 437         ins->prefixes[ins->nprefix++] = (osize == 16 ? P_O16 : P_O32);
 438
 439     return data - origdata;
 440 }
 441
 442 long disasm (unsigned char *data, char *output, int segsize, long offset,
 443              int autosync) {
 444     struct itemplate **p;
 445     int length = 0;
 446     char *segover;
 447     int rep, lock, asize, osize, i, slen, colon;
 448     unsigned char *origdata;
 449     int works;
 450     insn ins;
 451
 452     /*
 453      * Scan for prefixes.
 454      */
 455     asize = osize = segsize;
 456     segover = NULL;
 457     rep = lock = 0;
 458     origdata = data;
 459     for (;;) {
 460         if (*data == 0xF3 || *data == 0xF2)
 461             rep = *data++;
 462         else if (*data == 0xF0)
 463             lock = *data++;
 464         else if (*data == 0x2E || *data == 0x36 || *data == 0x3E ||
 465                  *data == 0x26 || *data == 0x64 || *data == 0x65) {
 466             switch (*data++) {
 467               case 0x2E: segover = "cs"; break;
 468               case 0x36: segover = "ss"; break;
 469               case 0x3E: segover = "ds"; break;
 470               case 0x26: segover = "es"; break;
 471               case 0x64: segover = "fs"; break;
 472               case 0x65: segover = "gs"; break;
 473             }
 474         } else if (*data == 0x66)
 475             osize = 48 - segsize, data++;
 476         else if (*data == 0x67)
 477             asize = 48 - segsize, data++;
 478         else
 479             break;
 480     }
 481
 482     ins.oprs[0].segment = ins.oprs[1].segment = ins.oprs[2].segment =
 483     ins.oprs[0].addr_size = ins.oprs[1].addr_size = ins.oprs[2].addr_size =
 484         (segsize == 16 ? 0 : SEG_32BIT);
 485     ins.condition = -1;
 486     works = TRUE;
 487     for (p = itable[*data]; *p; p++)
 488         if ( (length = matches((unsigned char *)((*p)->code), data,
 489                                asize, osize, segsize, &ins)) ) {
 490             works = TRUE;
 491             /*
 492              * Final check to make sure the types of r/m match up.
 493              */
 494             for (i = 0; i < (*p)->operands; i++)
 495                 if (
 496
 497                     /* If it's a mem-only EA but we have a register, die. */
 498                     ((ins.oprs[i].segment & SEG_RMREG) &&
 499                      !(MEMORY & ~(*p)->opd[i])) ||
 500
 501                     /* If it's a reg-only EA but we have a memory ref, die. */
 502                     (!(ins.oprs[i].segment & SEG_RMREG) &&
 503                      !(REGNORM & ~(*p)->opd[i]) &&
 504                      !((*p)->opd[i] & REG_SMASK)) ||
 505
 506                     /* Register type mismatch (eg FS vs REG_DESS): die. */
 507                     ((((*p)->opd[i] & (REGISTER | FPUREG)) ||
 508                       (ins.oprs[i].segment & SEG_RMREG)) &&
 509                      !whichreg ((*p)->opd[i], ins.oprs[i].basereg)))
 510
 511                     works = FALSE;
 512             if (works)
 513                 break;
 514         }
 515     if (!length || !works)
 516         return 0;                      /* no instruction was matched */
 517
 518     slen = 0;
 519
 520     if (rep) {
 521         slen += sprintf(output+slen, "rep%s ",
 522                         (rep == 0xF2 ? "ne" :
 523                          (*p)->opcode == I_CMPSB ||
 524                          (*p)->opcode == I_CMPSW ||
 525                          (*p)->opcode == I_CMPSD ||
 526                          (*p)->opcode == I_SCASB ||
 527                          (*p)->opcode == I_SCASW ||
 528                          (*p)->opcode == I_SCASD ? "e" : ""));
 529     }
 530     if (lock)
 531         slen += sprintf(output+slen, "lock ");
 532     for (i = 0; i < ins.nprefix; i++)
 533         switch (ins.prefixes[i]) {
 534           case P_A16: slen += sprintf(output+slen, "a16 "); break;
 535           case P_A32: slen += sprintf(output+slen, "a32 "); break;
 536           case P_O16: slen += sprintf(output+slen, "o16 "); break;
 537           case P_O32: slen += sprintf(output+slen, "o32 "); break;
 538         }
 539
 540     for (i = 0; i < elements(ico); i++)
 541         if ((*p)->opcode == ico[i]) {
 542             slen += sprintf(output+slen, "%s%s", icn[i],
 543                             whichcond(ins.condition));
 544             break;
 545         }
 546     if (i >= elements(ico))
 547         slen += sprintf(output+slen, "%s", insn_names[(*p)->opcode]);
 548     colon = FALSE;
 549     length += data - origdata;         /* fix up for prefixes */
 550     for (i=0; i<(*p)->operands; i++) {
 551         output[slen++] = (colon ? ':' : i==0 ? ' ' : ',');
 552
 553         if (ins.oprs[i].segment & SEG_RELATIVE) {
 554             ins.oprs[i].offset += offset + length;
 555             /*
 556              * sort out wraparound
 557              */
 558             if (!(ins.oprs[i].segment & SEG_32BIT))
 559                 ins.oprs[i].offset &= 0xFFFF;
 560             /*
 561              * add sync marker, if autosync is on
 562              */
 563             if (autosync)
 564                 add_sync (ins.oprs[i].offset, 0L);
 565         }
 566
 567         if ((*p)->opd[i] & COLON)
 568             colon = TRUE;
 569         else
 570             colon = FALSE;
 571
 572         if (((*p)->opd[i] & (REGISTER | FPUREG)) ||
 573             (ins.oprs[i].segment & SEG_RMREG)) {
 574             ins.oprs[i].basereg = whichreg ((*p)->opd[i],
 575                                             ins.oprs[i].basereg);
 576             slen += sprintf(output+slen, "%s",
 577                             reg_names[ins.oprs[i].basereg-EXPR_REG_START]);
 578         } else if (!(UNITY & ~(*p)->opd[i])) {
 579             output[slen++] = '1';
 580         } else if ( (*p)->opd[i] & IMMEDIATE ) {
 581             if ( (*p)->opd[i] & BITS8 ) {
 582                 slen += sprintf(output+slen, "byte ");
 583                 if (ins.oprs[i].segment & SEG_SIGNED) {
 584                     if (ins.oprs[i].offset < 0) {
 585                         ins.oprs[i].offset *= -1;
 586                         output[slen++] = '-';
 587                     } else
 588                         output[slen++] = '+';
 589                 }
 590             } else if ( (*p)->opd[i] & BITS16 ) {
 591                 slen += sprintf(output+slen, "word ");
 592             } else if ( (*p)->opd[i] & BITS32 ) {
 593                 slen += sprintf(output+slen, "dword ");
 594             } else if ( (*p)->opd[i] & NEAR ) {
 595                 slen += sprintf(output+slen, "near ");
 596             } else if ( (*p)->opd[i] & SHORT ) {
 597                 slen += sprintf(output+slen, "short ");
 598             }
 599             slen += sprintf(output+slen, "0x%lx", ins.oprs[i].offset);
 600         } else if ( !(MEM_OFFS & ~(*p)->opd[i]) ) {
 601             slen += sprintf(output+slen, "[%s%s%s0x%lx]",
 602                             (segover ? segover : ""),
 603                             (segover ? ":" : ""),
 604                             (ins.oprs[i].addr_size == 32 ? "dword " :
 605                              ins.oprs[i].addr_size == 16 ? "word " : ""),
 606                             ins.oprs[i].offset);
 607             segover = NULL;
 608         } else if ( !(REGMEM & ~(*p)->opd[i]) ) {
 609             int started = FALSE;
 610             if ( (*p)->opd[i] & BITS8 )
 611                 slen += sprintf(output+slen, "byte ");
 612             if ( (*p)->opd[i] & BITS16 )
 613                 slen += sprintf(output+slen, "word ");
 614             if ( (*p)->opd[i] & BITS32 )
 615                 slen += sprintf(output+slen, "dword ");
 616             if ( (*p)->opd[i] & BITS64 )
 617                 slen += sprintf(output+slen, "qword ");
 618             if ( (*p)->opd[i] & BITS80 )
 619                 slen += sprintf(output+slen, "tword ");
 620             if ( (*p)->opd[i] & FAR )
 621                 slen += sprintf(output+slen, "far ");
 622             if ( (*p)->opd[i] & NEAR )
 623                 slen += sprintf(output+slen, "near ");
 624             output[slen++] = '[';
 625             if (ins.oprs[i].addr_size)
 626                 slen += sprintf(output+slen, "%s",
 627                                 (ins.oprs[i].addr_size == 32 ? "dword " :
 628                                  ins.oprs[i].addr_size == 16 ? "word " : ""));
 629             if (segover) {
 630                 slen += sprintf(output+slen, "%s:", segover);
 631                 segover = NULL;
 632             }
 633             if (ins.oprs[i].basereg != -1) {
 634                 slen += sprintf(output+slen, "%s",
 635                                 reg_names[(ins.oprs[i].basereg -
 636                                            EXPR_REG_START)]);
 637                 started = TRUE;
 638             }
 639             if (ins.oprs[i].indexreg != -1) {
 640                 if (started)
 641                     output[slen++] = '+';
 642                 slen += sprintf(output+slen, "%s",
 643                                 reg_names[(ins.oprs[i].indexreg -
 644                                            EXPR_REG_START)]);
 645                 if (ins.oprs[i].scale > 1)
 646                     slen += sprintf(output+slen, "*%d", ins.oprs[i].scale);
 647                 started = TRUE;
 648             }
 649             if (ins.oprs[i].segment & SEG_DISP8) {
 650                 int sign = '+';
 651                 if (ins.oprs[i].offset & 0x80) {
 652                     ins.oprs[i].offset = - (signed char) ins.oprs[i].offset;
 653                     sign = '-';
 654                 }
 655                 slen += sprintf(output+slen, "%c0x%lx", sign,
 656                                 ins.oprs[i].offset);
 657             } else if (ins.oprs[i].segment & SEG_DISP16) {
 658                 if (started)
 659                     output[slen++] = '+';
 660                 slen += sprintf(output+slen, "0x%lx", ins.oprs[i].offset);
 661             } else if (ins.oprs[i].segment & SEG_DISP32) {
 662                 if (started)
 663                     output[slen++] = '+';
 664                 slen += sprintf(output+slen, "0x%lx", ins.oprs[i].offset);
 665             }
 666             output[slen++] = ']';
 667         } else {
 668             slen += sprintf(output+slen, "<operand%d>", i);
 669         }
 670     }
 671     output[slen] = '\0';
 672     if (segover) {                     /* unused segment override */
 673         char *p = output;
 674         int count = slen+1;
 675         while (count--)
 676             p[count+3] = p[count];
 677         strncpy (output, segover, 2);
 678         output[2] = ' ';
 679     }
 680     return length;
 681 }
 682
 683 long eatbyte (unsigned char *data, char *output) {
 684     sprintf(output, "db 0x%02X", *data);
 685     return 1;
 686 }