1 /* $NetBSD: if_ehreg.h,v 1.5 2000/12/22 22:21:37 bjh21 Exp $ */
4 * This file is in the public domain
11 * Register definitions for i-cubed EtherLan 100-, 200-, and 500-series cards.
16 * SYNC+0x0000 r ROM data
17 * SYNC+0x0000 w ROM page latch
18 * FAST+0x0800 r/w AUX1
19 * FAST+0x2800 r/w AUX2
20 * MEMC+0x0000 r/w MX98902A registers
21 * MEMC+0x0200 r/w MX98902A data
24 * 0 r Interrupt status
25 * 0 w Interrupt enable
26 * 1 r (E100) Link beat (0 = link, 1 = no link)
27 * 1 w (E100) Media select (0 = 10b2, 1 = 10bT)
28 * 1 r (E200) MAU ID input (from MAU)
29 * 1 w (E200) MAU ID output (to MAU)
32 * 0 r Media sense (0 = 10bT, 1 = 10b2)
35 /* Loosely derived from Linux drivers/acorn/net/etherh.c. */
37 /* All offsets in bus_size units */
38 #define EH_DP8390 0x000 /* MEMC space */
39 #define EH_DATA 0x200 /* MEMC space */
40 #define EH_CTRL 0x200 /* FAST space */
41 #define EH_CTRL2 0xa00 /* FAST space */
43 /* Bits of the control register */
44 #define EH_CTRL_IE 0x01 /* Interrupt enable (W) */
45 #define EH_CTRL_IS 0x01 /* Interrupt status (R) */
46 #define EH_CTRL_MEDIA 0x02 /* Media select (0 = 10b2, 1 = 10bT) (W) */
47 #define EH_CTRL_NOLINK 0x02 /* Link beat detect (R) */
50 * The EtherLan 200 is strange. A write to AUX1 following another write has
51 * the effect described above, but a write following a read affects this:
53 #define EH200_CTRL_MAU 0x02 /* MAU input/output */
55 /* Bits of control register 2 */
56 #define EH_CTRL2_10B2 0x01 /* Media sense (0 = 10bT, 1 = 10b2) (R) */
58 /* EtherLan 200 MAU types */
59 #define EH200_MAUID_10_T 2
60 #define EH200_MAUID_10_2 3
61 #define EH200_MAUID_10_5 4