sys/arch/x86/isa/isa_machdep.c

   1 /*      $NetBSD: isa_machdep.c,v 1.27 2009/08/18 17:02:00 dyoung Exp $  */
   2
   3 /*-
   4  * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace
   9  * Simulation Facility, NASA Ames Research Center.
  10  *
  11  * Redistribution and use in source and binary forms, with or without
  12  * modification, are permitted provided that the following conditions
  13  * are met:
  14  * 1. Redistributions of source code must retain the above copyright
  15  *    notice, this list of conditions and the following disclaimer.
  16  * 2. Redistributions in binary form must reproduce the above copyright
  17  *    notice, this list of conditions and the following disclaimer in the
  18  *    documentation and/or other materials provided with the distribution.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  30  * POSSIBILITY OF SUCH DAMAGE.
  31  */
  32
  33 /*-
  34  * Copyright (c) 1991 The Regents of the University of California.
  35  * All rights reserved.
  36  *
  37  * This code is derived from software contributed to Berkeley by
  38  * William Jolitz.
  39  *
  40  * Redistribution and use in source and binary forms, with or without
  41  * modification, are permitted provided that the following conditions
  42  * are met:
  43  * 1. Redistributions of source code must retain the above copyright
  44  *    notice, this list of conditions and the following disclaimer.
  45  * 2. Redistributions in binary form must reproduce the above copyright
  46  *    notice, this list of conditions and the following disclaimer in the
  47  *    documentation and/or other materials provided with the distribution.
  48  * 3. Neither the name of the University nor the names of its contributors
  49  *    may be used to endorse or promote products derived from this software
  50  *    without specific prior written permission.
  51  *
  52  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  53  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  54  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  55  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  56  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  57  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  58  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  59  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  60  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  61  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  62  * SUCH DAMAGE.
  63  *
  64  *      @(#)isa.c       7.2 (Berkeley) 5/13/91
  65  */
  66
  67 #include <sys/cdefs.h>
  68 __KERNEL_RCSID(0, "$NetBSD: isa_machdep.c,v 1.27 2009/08/18 17:02:00 dyoung Exp $");
  69
  70 #include <sys/param.h>
  71 #include <sys/systm.h>
  72 #include <sys/kernel.h>
  73 #include <sys/syslog.h>
  74 #include <sys/device.h>
  75 #include <sys/proc.h>
  76 #include <sys/mbuf.h>
  77 #include <sys/bus.h>
  78 #include <sys/cpu.h>
  79
  80 #include <machine/bus_private.h>
  81 #include <machine/pio.h>
  82 #include <machine/cpufunc.h>
  83
  84 #include <dev/isa/isareg.h>
  85 #include <dev/isa/isavar.h>
  86
  87 #include <uvm/uvm_extern.h>
  88
  89 #include "ioapic.h"
  90
  91 #if NIOAPIC > 0
  92 #include <machine/i82093var.h>
  93 #include <machine/mpbiosvar.h>
  94 #endif
  95
  96 static int _isa_dma_may_bounce(bus_dma_tag_t, bus_dmamap_t, int, int *);
  97
  98 struct x86_bus_dma_tag isa_bus_dma_tag = {
  99         0,                              /* _tag_needs_free */
 100         ISA_DMA_BOUNCE_THRESHOLD,       /* _bounce_thresh */
 101         0,                              /* _bounce_alloc_lo */
 102         ISA_DMA_BOUNCE_THRESHOLD,       /* _bounce_alloc_hi */
 103         _isa_dma_may_bounce,
 104         _bus_dmamap_create,
 105         _bus_dmamap_destroy,
 106         _bus_dmamap_load,
 107         _bus_dmamap_load_mbuf,
 108         _bus_dmamap_load_uio,
 109         _bus_dmamap_load_raw,
 110         _bus_dmamap_unload,
 111         _bus_dmamap_sync,
 112         _bus_dmamem_alloc,
 113         _bus_dmamem_free,
 114         _bus_dmamem_map,
 115         _bus_dmamem_unmap,
 116         _bus_dmamem_mmap,
 117         _bus_dmatag_subregion,
 118         _bus_dmatag_destroy,
 119 };
 120
 121 #define IDTVEC(name)    __CONCAT(X,name)
 122 typedef void (vector)(void);
 123 extern vector *IDTVEC(intr)[];
 124
 125 #define LEGAL_IRQ(x)    ((x) >= 0 && (x) < NUM_LEGACY_IRQS && (x) != 2)
 126
 127 int
 128 isa_intr_alloc(isa_chipset_tag_t ic, int mask, int type, int *irq)
 129 {
 130         int i, tmp, bestirq, count;
 131         struct intrhand **p, *q;
 132         struct intrsource *isp;
 133         struct cpu_info *ci;
 134
 135         if (type == IST_NONE)
 136                 panic("intr_alloc: bogus type");
 137
 138         ci = &cpu_info_primary;
 139
 140         bestirq = -1;
 141         count = -1;
 142
 143         /* some interrupts should never be dynamically allocated */
 144         mask &= 0xdef8;
 145
 146         /*
 147          * XXX some interrupts will be used later (6 for fdc, 12 for pms).
 148          * the right answer is to do "breadth-first" searching of devices.
 149          */
 150         mask &= 0xefbf;
 151
 152         mutex_enter(&cpu_lock);
 153
 154         for (i = 0; i < NUM_LEGACY_IRQS; i++) {
 155                 if (LEGAL_IRQ(i) == 0 || (mask & (1<<i)) == 0)
 156                         continue;
 157                 isp = ci->ci_isources[i];
 158                 if (isp == NULL) {
 159                         /*
 160                          * if nothing's using the irq, just return it
 161                          */
 162                         *irq = i;
 163                         mutex_exit(&cpu_lock);
 164                         return (0);
 165                 }
 166
 167                 switch(isp->is_type) {
 168                 case IST_EDGE:
 169                 case IST_LEVEL:
 170                         if (type != isp->is_type)
 171                                 continue;
 172                         /*
 173                          * if the irq is shareable, count the number of other
 174                          * handlers, and if it's smaller than the last irq like
 175                          * this, remember it
 176                          *
 177                          * XXX We should probably also consider the
 178                          * interrupt level and stick IPL_TTY with other
 179                          * IPL_TTY, etc.
 180                          */
 181                         for (p = &isp->is_handlers, tmp = 0; (q = *p) != NULL;
 182                              p = &q->ih_next, tmp++)
 183                                 ;
 184                         if ((bestirq == -1) || (count > tmp)) {
 185                                 bestirq = i;
 186                                 count = tmp;
 187                         }
 188                         break;
 189
 190                 case IST_PULSE:
 191                         /* this just isn't shareable */
 192                         continue;
 193                 }
 194         }
 195
 196         mutex_exit(&cpu_lock);
 197
 198         if (bestirq == -1)
 199                 return (1);
 200
 201         *irq = bestirq;
 202
 203         return (0);
 204 }
 205
 206 const struct evcnt *
 207 isa_intr_evcnt(isa_chipset_tag_t ic, int irq)
 208 {
 209
 210         /* XXX for now, no evcnt parent reported */
 211         return NULL;
 212 }
 213
 214 void *
 215 isa_intr_establish(
 216     isa_chipset_tag_t ic,
 217     int irq,
 218     int type,
 219     int level,
 220     int (*ih_fun)(void *),
 221     void *ih_arg
 222 )
 223 {
 224         struct pic *pic;
 225         int pin;
 226 #if NIOAPIC > 0
 227         int mpih;
 228         struct ioapic_softc *ioapic;
 229 #endif
 230
 231         pin = irq;
 232         pic = &i8259_pic;
 233
 234 #if NIOAPIC > 0
 235         if (mp_busses != NULL) {
 236                 if (intr_find_mpmapping(mp_isa_bus, irq, &mpih) == 0 ||
 237                     intr_find_mpmapping(mp_eisa_bus, irq, &mpih) == 0) {
 238                         if (!APIC_IRQ_ISLEGACY(mpih)) {
 239                                 pin = APIC_IRQ_PIN(mpih);
 240                                 ioapic = ioapic_find(APIC_IRQ_APIC(mpih));
 241                                 if (ioapic == NULL) {
 242                                         printf("isa_intr_establish: "
 243                                                "unknown apic %d\n",
 244                                             APIC_IRQ_APIC(mpih));
 245                                         return NULL;
 246                                 }
 247                                 pic = &ioapic->sc_pic;
 248                         }
 249                 } else
 250                         printf("isa_intr_establish: no MP mapping found\n");
 251         }
 252 #endif
 253         return intr_establish(irq, pic, pin, type, level, ih_fun, ih_arg, false);
 254 }
 255
 256 /*
 257  * Deregister an interrupt handler.
 258  */
 259 void
 260 isa_intr_disestablish(isa_chipset_tag_t ic, void *arg)
 261 {
 262         struct intrhand *ih = arg;
 263
 264         if (!LEGAL_IRQ(ih->ih_pin))
 265                 panic("intr_disestablish: bogus irq");
 266
 267         intr_disestablish(ih);
 268 }
 269
 270 void
 271 isa_attach_hook(device_t parent, device_t self,
 272     struct isabus_attach_args *iba)
 273 {
 274         extern struct x86_isa_chipset x86_isa_chipset;
 275         extern int isa_has_been_seen;
 276
 277         /*
 278          * Notify others that might need to know that the ISA bus
 279          * has now been attached.
 280          */
 281         if (isa_has_been_seen)
 282                 panic("isaattach: ISA bus already seen!");
 283         isa_has_been_seen = 1;
 284
 285         /*
 286          * Since we can only have one ISA bus, we just use a single
 287          * statically allocated ISA chipset structure.  Pass it up
 288          * now.
 289          */
 290         iba->iba_ic = &x86_isa_chipset;
 291 }
 292
 293 void
 294 isa_detach_hook(isa_chipset_tag_t ic, device_t self)
 295 {
 296         extern int isa_has_been_seen;
 297
 298         isa_has_been_seen = 0;
 299 }
 300
 301 int
 302 isa_mem_alloc(bus_space_tag_t t, bus_size_t size, bus_size_t align,
 303                 bus_addr_t boundary, int flags, bus_addr_t *addrp, bus_space_handle_t *bshp)
 304 {
 305
 306         /*
 307          * Allocate physical address space in the ISA hole.
 308          */
 309         return (bus_space_alloc(t, IOM_BEGIN, IOM_END - 1, size, align,
 310             boundary, flags, addrp, bshp));
 311 }
 312
 313 void
 314 isa_mem_free(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t size)
 315 {
 316
 317         bus_space_free(t, bsh, size);
 318 }
 319
 320 /*
 321  * ISA only has 24-bits of address space.  This means
 322  * we can't DMA to pages over 16M.  In order to DMA to
 323  * arbitrary buffers, we use "bounce buffers" - pages
 324  * in memory below the 16M boundary.  On DMA reads,
 325  * DMA happens to the bounce buffers, and is copied into
 326  * the caller's buffer.  On writes, data is copied into
 327  * but bounce buffer, and the DMA happens from those
 328  * pages.  To software using the DMA mapping interface,
 329  * this looks simply like a data cache.
 330  *
 331  * If we have more than 16M of RAM in the system, we may
 332  * need bounce buffers.  We check and remember that here.
 333  *
 334  * There are exceptions, however.  VLB devices can do
 335  * 32-bit DMA, and indicate that here.
 336  *
 337  * ...or, there is an opposite case.  The most segments
 338  * a transfer will require is (maxxfer / PAGE_SIZE) + 1.  If
 339  * the caller can't handle that many segments (e.g. the
 340  * ISA DMA controller), we may have to bounce it as well.
 341  */
 342 static int
 343 _isa_dma_may_bounce(bus_dma_tag_t t, bus_dmamap_t map, int flags,
 344     int *cookieflagsp)
 345 {
 346         if ((flags & ISABUS_DMA_32BIT) != 0)
 347                 map->_dm_bounce_thresh = 0;
 348
 349         if (((map->_dm_size / PAGE_SIZE) + 1) > map->_dm_segcnt)
 350                 *cookieflagsp |= X86_DMA_MIGHT_NEED_BOUNCE;
 351         return 0;
 352 }