sys/arch/zaurus/dev/scoopreg.h

   1 /*      $NetBSD: scoopreg.h,v 1.2.20.1 2007/10/03 19:26:19 garbled Exp $        */
   2 /*      $OpenBSD: zaurus_scoopreg.h,v 1.7 2005/07/01 23:51:55 uwe Exp $ */
   3
   4 /*
   5  * Copyright (c) 2005 Uwe Stuehler <uwe@bsdx.de>
   6  *
   7  * Permission to use, copy, modify, and distribute this software for any
   8  * purpose with or without fee is hereby granted, provided that the above
   9  * copyright notice and this permission notice appear in all copies.
  10  *
  11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  18  */
  19
  20 #define SCOOP_SIZE              0x2c
  21
  22 /* registers and values */
  23
  24 #define SCOOP_MCR               0x00
  25 #define  SCP_MCR_IOCARD         0x0010
  26 #define SCOOP_CDR               0x04    /* card detect register */
  27 #define  SCP_CDR_DETECT         0x0002
  28 #define SCOOP_CSR               0x08    /* card status register */
  29 #define  SCP_CSR_READY          0x0002
  30 #define  SCP_CSR_MISSING        0x0004
  31 #define  SCP_CSR_WPROT          0x0008
  32 #define  SCP_CSR_BVD1           0x0010
  33 #define  SCP_CSR_BVD2           0x0020
  34 #define  SCP_CSR_3V             0x0040
  35 #define  SCP_CSR_PWR            0x0080
  36 #define SCOOP_CPR               0x0c    /* card power register */
  37 #define  SCP_CPR_OFF            0x0000
  38 #define  SCP_CPR_3V             0x0001  /* 3V for CF card */
  39 #define  SCP_CPR_5V             0x0002  /* 5V for CF card */
  40 #define  SCP_CPR_SD_3V          0x0004  /* 3.3V for SD/MMC card */
  41 #define  SCP_CPR_VOLTAGE_MSK    0x0007
  42 #define  SCP_CPR_PWR            0x0080
  43 #define SCOOP_CCR               0x10    /* card control register */
  44 #define  SCP_CCR_RESET          0x0080
  45 #define SCOOP_IRR               0x14    /* XXX for pcic: bit 0x4 role is? */
  46 #define SCOOP_IRM               0x14
  47 #define SCOOP_IMR               0x18
  48 #define  SCP_IMR_READY          0x0002
  49 #define  SCP_IMR_DETECT         0x0004
  50 #define  SCP_IMR_WRPROT         0x0008
  51 #define  SCP_IMR_STSCHG         0x0010
  52 #define  SCP_IMR_BATWARN        0x0020
  53 #define  SCP_IMR_UNKN0          0x0040
  54 #define  SCP_IMR_UNKN1          0x0080
  55 #define SCOOP_ISR               0x1c
  56 #define SCOOP_GPCR              0x20    /* GPIO pin direction (R/W) */
  57 #define SCOOP_GPWR              0x24    /* GPIO pin output level (R/W) */
  58 #define SCOOP_GPRR              0x28    /* GPIO pin input level (R) */
  59
  60 /* GPIO bits */
  61
  62 #define SCOOP0_LED_GREEN                1
  63 #define SCOOP0_JK_B_C3000               2
  64 #define SCOOP0_CHARGE_OFF_C3000         3
  65 #define SCOOP0_MUTE_L                   4
  66 #define SCOOP0_MUTE_R                   5
  67 #define SCOOP0_AKIN_PULLUP              6
  68 #define SCOOP0_CF_POWER_C3000           6
  69 #define SCOOP0_APM_ON                   7
  70 #define SCOOP0_LED_ORANGE_C3000         7
  71 #define SCOOP0_BACKLIGHT_CONT           8
  72 #define SCOOP0_JK_A_C3000               8
  73 #define SCOOP0_MIC_BIAS                 9
  74 #define SCOOP0_ADC_TEMP_ON_C3000        9
  75
  76 #define SCOOP1_IR_ON                    1
  77 #define SCOOP1_AKIN_PULLUP              2
  78 #define SCOOP1_RESERVED_3               3
  79 #define SCOOP1_RESERVED_4               4
  80 #define SCOOP1_RESERVED_5               5
  81 #define SCOOP1_RESERVED_6               6
  82 #define SCOOP1_BACKLIGHT_CONT           7
  83 #define SCOOP1_BACKLIGHT_ON             8
  84 #define SCOOP1_MIC_BIAS                 9