sys/dev/cardbus/if_rtw_cardbus.c

   1 /* $NetBSD: if_rtw_cardbus.c,v 1.32 2009/10/19 23:19:39 rmind Exp $ */
   2
   3 /*-
   4  * Copyright (c) 2004, 2005 David Young.  All rights reserved.
   5  *
   6  * Adapted for the RTL8180 by David Young.
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions
  10  * are met:
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in the
  15  *    documentation and/or other materials provided with the distribution.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
  18  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  19  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
  20  * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL David
  21  * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  22  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
  23  * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  25  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  26  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
  28  * OF SUCH DAMAGE.
  29  */
  30 /*-
  31  * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
  32  * All rights reserved.
  33  *
  34  * This code is derived from software contributed to The NetBSD Foundation
  35  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
  36  * NASA Ames Research Center.
  37  *
  38  * Redistribution and use in source and binary forms, with or without
  39  * modification, are permitted provided that the following conditions
  40  * are met:
  41  * 1. Redistributions of source code must retain the above copyright
  42  *    notice, this list of conditions and the following disclaimer.
  43  * 2. Redistributions in binary form must reproduce the above copyright
  44  *    notice, this list of conditions and the following disclaimer in the
  45  *    documentation and/or other materials provided with the distribution.
  46  *
  47  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  48  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  49  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  50  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  51  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  52  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  53  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  54  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  55  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  56  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  57  * POSSIBILITY OF SUCH DAMAGE.
  58  */
  59
  60 /*
  61  * Cardbus front-end for the Realtek RTL8180 802.11 MAC/BBP driver.
  62  *
  63  * TBD factor with atw, tlp Cardbus front-ends?
  64  */
  65
  66 #include <sys/cdefs.h>
  67 __KERNEL_RCSID(0, "$NetBSD: if_rtw_cardbus.c,v 1.32 2009/10/19 23:19:39 rmind Exp $");
  68
  69 #include "opt_inet.h"
  70 #include "bpfilter.h"
  71
  72 #include <sys/param.h>
  73 #include <sys/systm.h>
  74 #include <sys/mbuf.h>
  75 #include <sys/malloc.h>
  76 #include <sys/kernel.h>
  77 #include <sys/socket.h>
  78 #include <sys/ioctl.h>
  79 #include <sys/errno.h>
  80 #include <sys/device.h>
  81
  82 #include <machine/endian.h>
  83
  84 #include <net/if.h>
  85 #include <net/if_dl.h>
  86 #include <net/if_media.h>
  87 #include <net/if_ether.h>
  88
  89 #include <net80211/ieee80211_netbsd.h>
  90 #include <net80211/ieee80211_radiotap.h>
  91 #include <net80211/ieee80211_var.h>
  92
  93 #if NBPFILTER > 0
  94 #include <net/bpf.h>
  95 #endif
  96
  97 #ifdef INET
  98 #include <netinet/in.h>
  99 #include <netinet/if_inarp.h>
 100 #endif
 101
 102
 103 #include <sys/bus.h>
 104 #include <sys/intr.h>
 105
 106 #include <dev/ic/rtwreg.h>
 107 #include <dev/ic/rtwvar.h>
 108
 109 #include <dev/pci/pcivar.h>
 110 #include <dev/pci/pcireg.h>
 111 #include <dev/pci/pcidevs.h>
 112
 113 #include <dev/cardbus/cardbusvar.h>
 114 #include <dev/pci/pcidevs.h>
 115
 116 /*
 117  * PCI configuration space registers used by the RTL8180.
 118  */
 119 #define RTW_PCI_IOBA            0x10    /* i/o mapped base */
 120 #define RTW_PCI_MMBA            0x14    /* memory mapped base */
 121
 122 struct rtw_cardbus_softc {
 123         struct rtw_softc sc_rtw;        /* real RTL8180 softc */
 124
 125         /* CardBus-specific goo. */
 126         void                    *sc_ih;         /* interrupt handle */
 127         cardbus_devfunc_t       sc_ct;          /* our CardBus devfuncs */
 128         cardbustag_t            sc_tag;         /* our CardBus tag */
 129         int                     sc_csr;         /* CSR bits */
 130         bus_size_t              sc_mapsize;     /* size of the mapped bus space
 131                                                  * region
 132                                                  */
 133
 134         int                     sc_bar_reg;     /* which BAR to use */
 135         pcireg_t                sc_bar_val;     /* value of the BAR */
 136
 137         cardbus_intr_line_t     sc_intrline;    /* interrupt line */
 138 };
 139
 140 int     rtw_cardbus_match(device_t, cfdata_t, void *);
 141 void    rtw_cardbus_attach(device_t, device_t, void *);
 142 int     rtw_cardbus_detach(device_t, int);
 143
 144 CFATTACH_DECL_NEW(rtw_cardbus, sizeof(struct rtw_cardbus_softc),
 145     rtw_cardbus_match, rtw_cardbus_attach, rtw_cardbus_detach, NULL);
 146
 147 void    rtw_cardbus_setup(struct rtw_cardbus_softc *);
 148
 149 bool rtw_cardbus_resume(device_t, pmf_qual_t);
 150 bool rtw_cardbus_suspend(device_t, pmf_qual_t);
 151
 152 const struct rtw_cardbus_product *rtw_cardbus_lookup(
 153      const struct cardbus_attach_args *);
 154
 155 const struct rtw_cardbus_product {
 156         u_int32_t        rcp_vendor;    /* PCI vendor ID */
 157         u_int32_t        rcp_product;   /* PCI product ID */
 158         const char      *rcp_product_name;
 159 } rtw_cardbus_products[] = {
 160         { PCI_VENDOR_REALTEK,           PCI_PRODUCT_REALTEK_RT8180,
 161           "Realtek RTL8180 802.11 MAC/BBP" },
 162
 163         { PCI_VENDOR_BELKIN,            PCI_PRODUCT_BELKIN_F5D6020V3,
 164           "Belkin F5D6020v3 802.11b (RTL8180 MAC/BBP)" },
 165
 166         { PCI_VENDOR_DLINK,             PCI_PRODUCT_DLINK_DWL610,
 167           "DWL-610 D-Link Air 802.11b (RTL8180 MAC/BBP)" },
 168
 169         { 0,                            0,      NULL },
 170 };
 171
 172 const struct rtw_cardbus_product *
 173 rtw_cardbus_lookup(const struct cardbus_attach_args *ca)
 174 {
 175         const struct rtw_cardbus_product *rcp;
 176
 177         for (rcp = rtw_cardbus_products; rcp->rcp_product_name != NULL; rcp++) {
 178                 if (PCI_VENDOR(ca->ca_id) == rcp->rcp_vendor &&
 179                     PCI_PRODUCT(ca->ca_id) == rcp->rcp_product)
 180                         return rcp;
 181         }
 182         return NULL;
 183 }
 184
 185 int
 186 rtw_cardbus_match(device_t parent, cfdata_t match, void *aux)
 187 {
 188         struct cardbus_attach_args *ca = aux;
 189
 190         if (rtw_cardbus_lookup(ca) != NULL)
 191                 return 1;
 192
 193         return 0;
 194 }
 195
 196 static void
 197 rtw_cardbus_funcregen(struct rtw_regs *regs, int enable)
 198 {
 199         u_int32_t reg;
 200         rtw_config0123_enable(regs, 1);
 201         reg = RTW_READ(regs, RTW_CONFIG3);
 202         if (enable)
 203                 RTW_WRITE(regs, RTW_CONFIG3, reg | RTW_CONFIG3_FUNCREGEN);
 204         else
 205                 RTW_WRITE(regs, RTW_CONFIG3, reg & ~RTW_CONFIG3_FUNCREGEN);
 206         rtw_config0123_enable(regs, 0);
 207 }
 208
 209 void
 210 rtw_cardbus_attach(device_t parent, device_t self, void *aux)
 211 {
 212         struct rtw_cardbus_softc *csc = device_private(self);
 213         struct rtw_softc *sc = &csc->sc_rtw;
 214         struct rtw_regs *regs = &sc->sc_regs;
 215         struct cardbus_attach_args *ca = aux;
 216         cardbus_devfunc_t ct = ca->ca_ct;
 217         const struct rtw_cardbus_product *rcp;
 218         bus_addr_t adr;
 219         int rev;
 220
 221         sc->sc_dev = self;
 222         sc->sc_dmat = ca->ca_dmat;
 223         csc->sc_ct = ct;
 224         csc->sc_tag = ca->ca_tag;
 225
 226         rcp = rtw_cardbus_lookup(ca);
 227         if (rcp == NULL) {
 228                 printf("\n");
 229                 panic("rtw_cardbus_attach: impossible");
 230         }
 231
 232         /* Get revision info. */
 233         rev = PCI_REVISION(ca->ca_class);
 234
 235         printf(": %s\n", rcp->rcp_product_name);
 236
 237         RTW_DPRINTF(RTW_DEBUG_ATTACH,
 238             ("%s: pass %d.%d signature %08x\n", device_xname(self),
 239              (rev >> 4) & 0xf, rev & 0xf,
 240              cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80)));
 241
 242         /*
 243          * Map the device.
 244          */
 245         csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE |
 246                       CARDBUS_COMMAND_PARITY_ENABLE |
 247                       CARDBUS_COMMAND_SERR_ENABLE;
 248         if (Cardbus_mapreg_map(ct, RTW_PCI_MMBA, CARDBUS_MAPREG_TYPE_MEM, 0,
 249             &regs->r_bt, &regs->r_bh, &adr, &regs->r_sz) == 0) {
 250                 RTW_DPRINTF(RTW_DEBUG_ATTACH,
 251                     ("%s: %s mapped %" PRIuMAX " bytes mem space\n",
 252                      device_xname(self), __func__, (uintmax_t)regs->r_sz));
 253 #if rbus
 254 #else
 255                 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize);
 256 #endif
 257                 csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE;
 258                 csc->sc_bar_reg = RTW_PCI_MMBA;
 259                 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM;
 260         } else if (Cardbus_mapreg_map(ct, RTW_PCI_IOBA, CARDBUS_MAPREG_TYPE_IO,
 261             0, &regs->r_bt, &regs->r_bh, &adr, &regs->r_sz) == 0) {
 262                 RTW_DPRINTF(RTW_DEBUG_ATTACH,
 263                     ("%s: %s mapped %" PRIuMAX " bytes I/O space\n",
 264                      device_xname(self), __func__, (uintmax_t)regs->r_sz));
 265 #if rbus
 266 #else
 267                 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize);
 268 #endif
 269                 csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE;
 270                 csc->sc_bar_reg = RTW_PCI_IOBA;
 271                 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO;
 272         } else {
 273                 aprint_error_dev(self, "unable to map device registers\n");
 274                 return;
 275         }
 276
 277         /*
 278          * Bring the chip out of powersave mode and initialize the
 279          * configuration registers.
 280          */
 281         rtw_cardbus_setup(csc);
 282
 283         /* Remember which interrupt line. */
 284         csc->sc_intrline = ca->ca_intrline;
 285
 286         /*
 287          * Finish off the attach.
 288          */
 289         rtw_attach(sc);
 290
 291         rtw_cardbus_funcregen(regs, 1);
 292
 293         RTW_WRITE(regs, RTW_FEMR, 0);
 294         RTW_WRITE(regs, RTW_FER, RTW_READ(regs, RTW_FER));
 295
 296         if (pmf_device_register(self,
 297             rtw_cardbus_suspend, rtw_cardbus_resume)) {
 298                 pmf_class_network_register(self, &sc->sc_if);
 299                 /*
 300                  * Power down the socket.
 301                  */
 302                 pmf_device_suspend(self, &sc->sc_qual);
 303         } else
 304                 aprint_error_dev(self, "couldn't establish power handler\n");
 305 }
 306
 307 int
 308 rtw_cardbus_detach(device_t self, int flags)
 309 {
 310         struct rtw_cardbus_softc *csc = device_private(self);
 311         struct rtw_softc *sc = &csc->sc_rtw;
 312         struct rtw_regs *regs = &sc->sc_regs;
 313         struct cardbus_devfunc *ct = csc->sc_ct;
 314         int rc;
 315
 316 #if defined(DIAGNOSTIC)
 317         if (ct == NULL)
 318                 panic("%s: data structure lacks", device_xname(self));
 319 #endif
 320
 321         if ((rc = rtw_detach(sc)) != 0)
 322                 return rc;
 323
 324         /*
 325          * Unhook the interrupt handler.
 326          */
 327         if (csc->sc_ih != NULL)
 328                 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih);
 329
 330         /*
 331          * Release bus space and close window.
 332          */
 333         if (csc->sc_bar_reg != 0)
 334                 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg,
 335                     regs->r_bt, regs->r_bh, regs->r_sz);
 336
 337         return 0;
 338 }
 339
 340 bool
 341 rtw_cardbus_resume(device_t self, pmf_qual_t qual)
 342 {
 343         struct rtw_cardbus_softc *csc = device_private(self);
 344         struct rtw_softc *sc = &csc->sc_rtw;
 345         cardbus_devfunc_t ct = csc->sc_ct;
 346         cardbus_chipset_tag_t cc = ct->ct_cc;
 347         cardbus_function_tag_t cf = ct->ct_cf;
 348
 349         /*
 350          * Map and establish the interrupt.
 351          */
 352         csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET,
 353             rtw_intr, sc);
 354         if (csc->sc_ih == NULL) {
 355                 aprint_error_dev(sc->sc_dev,
 356                     "unable to establish interrupt\n");
 357                 return false;
 358         }
 359
 360         rtw_cardbus_funcregen(&sc->sc_regs, 1);
 361
 362         RTW_WRITE(&sc->sc_regs, RTW_FEMR, RTW_FEMR_INTR);
 363         RTW_WRITE(&sc->sc_regs, RTW_FER, RTW_FER_INTR);
 364
 365         return rtw_resume(self, qual);
 366 }
 367
 368 bool
 369 rtw_cardbus_suspend(device_t self, pmf_qual_t qual)
 370 {
 371         struct rtw_cardbus_softc *csc = device_private(self);
 372         struct rtw_softc *sc = &csc->sc_rtw;
 373         cardbus_devfunc_t ct = csc->sc_ct;
 374         cardbus_chipset_tag_t cc = ct->ct_cc;
 375         cardbus_function_tag_t cf = ct->ct_cf;
 376
 377         if (!rtw_suspend(self, qual))
 378                 return false;
 379
 380         RTW_WRITE(&sc->sc_regs, RTW_FEMR,
 381             RTW_READ(&sc->sc_regs, RTW_FEMR) & ~RTW_FEMR_INTR);
 382
 383         rtw_cardbus_funcregen(&sc->sc_regs, 0);
 384
 385         /* Unhook the interrupt handler. */
 386         cardbus_intr_disestablish(cc, cf, csc->sc_ih);
 387         csc->sc_ih = NULL;
 388         return true;
 389 }
 390
 391 void
 392 rtw_cardbus_setup(struct rtw_cardbus_softc *csc)
 393 {
 394         cardbustag_t tag = csc->sc_tag;
 395         cardbus_devfunc_t ct = csc->sc_ct;
 396         cardbus_chipset_tag_t cc = ct->ct_cc;
 397         cardbusreg_t bhlc, csr, lattimer;
 398         cardbus_function_tag_t cf = ct->ct_cf;
 399
 400         (void)cardbus_set_powerstate(ct, tag, PCI_PWR_D0);
 401
 402         /* I believe the datasheet tries to warn us that the RTL8180
 403          * wants for 16 (0x10) to divide the latency timer.
 404          */
 405         bhlc = cardbus_conf_read(cc, cf, tag, CARDBUS_BHLC_REG);
 406         lattimer = rounddown(PCI_LATTIMER(bhlc), 0x10);
 407         if (PCI_LATTIMER(bhlc) != lattimer) {
 408                 bhlc &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
 409                 bhlc |= (lattimer << PCI_LATTIMER_SHIFT);
 410                 cardbus_conf_write(cc, cf, tag, CARDBUS_BHLC_REG, bhlc);
 411         }
 412
 413         /* Program the BAR. */
 414         cardbus_conf_write(cc, cf, tag, csc->sc_bar_reg, csc->sc_bar_val);
 415
 416         /* Enable the appropriate bits in the PCI CSR. */
 417         csr = cardbus_conf_read(cc, cf, tag, PCI_COMMAND_STATUS_REG);
 418         csr &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
 419         csr |= csc->sc_csr;
 420         cardbus_conf_write(cc, cf, tag, PCI_COMMAND_STATUS_REG, csr);
 421 }