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Expand PMF_FN_* macros.
[netbsd-mini2440.git] / sys / dev / pci / auich.c
blobb1c437a64ab2a523e85831da53568c48ba1111ea
1 /* $NetBSD: auich.c,v 1.132 2009/11/26 15:17:08 njoly Exp $ */
2
3 /*-
4 * Copyright (c) 2000, 2004, 2005 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe and by Charles M. Hannum.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 /*
33 * Copyright (c) 2000 Michael Shalayeff
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 * 3. The name of the author may not be used to endorse or promote products
45 * derived from this software without specific prior written permission.
46 *
47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
50 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
51 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
52 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
53 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
55 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
56 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
57 * THE POSSIBILITY OF SUCH DAMAGE.
58 *
59 * from OpenBSD: ich.c,v 1.3 2000/08/11 06:17:18 mickey Exp
60 */
61
62 /*
63 * Copyright (c) 2000 Katsurajima Naoto <raven@katsurajima.seya.yokohama.jp>
64 * Copyright (c) 2001 Cameron Grant <cg@freebsd.org>
65 * All rights reserved.
66 *
67 * Redistribution and use in source and binary forms, with or without
68 * modification, are permitted provided that the following conditions
69 * are met:
70 * 1. Redistributions of source code must retain the above copyright
71 * notice, this list of conditions and the following disclaimer.
72 * 2. Redistributions in binary form must reproduce the above copyright
73 * notice, this list of conditions and the following disclaimer in the
74 * documentation and/or other materials provided with the distribution.
75 *
76 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
77 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
78 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
79 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
80 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
81 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
82 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
83 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
84 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
85 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF
86 * SUCH DAMAGE.
87 *
88 * auich_calibrate() was from FreeBSD: ich.c,v 1.22 2002/06/27 22:36:01 scottl Exp
89 */
90
91
92 /* #define AUICH_DEBUG */
93 /*
94 * AC'97 audio found on Intel 810/820/440MX chipsets.
95 * http://developer.intel.com/design/chipsets/datashts/290655.htm
96 * http://developer.intel.com/design/chipsets/manuals/298028.htm
97 * ICH3:http://www.intel.com/design/chipsets/datashts/290716.htm
98 * ICH4:http://www.intel.com/design/chipsets/datashts/290744.htm
99 * ICH5:http://www.intel.com/design/chipsets/datashts/252516.htm
100 * AMD8111:
101 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/24674.pdf
102 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25720.pdf
103 *
104 * TODO:
105 * - Add support for the dedicated microphone input.
106 *
107 * NOTE:
108 * - The 440MX B-stepping at running 100MHz has a hardware erratum.
109 * It causes PCI master abort and hangups until cold reboot.
110 * http://www.intel.com/design/chipsets/specupdt/245051.htm
111 */
112
113 #include <sys/cdefs.h>
114 __KERNEL_RCSID(0, "$NetBSD: auich.c,v 1.132 2009/11/26 15:17:08 njoly Exp $");
115
116 #include <sys/param.h>
117 #include <sys/systm.h>
118 #include <sys/kernel.h>
119 #include <sys/malloc.h>
120 #include <sys/device.h>
121 #include <sys/fcntl.h>
122 #include <sys/proc.h>
123 #include <sys/sysctl.h>
124
125 #include <uvm/uvm_extern.h> /* for PAGE_SIZE */
126
127 #include <dev/pci/pcidevs.h>
128 #include <dev/pci/pcivar.h>
129 #include <dev/pci/auichreg.h>
130
131 #include <sys/audioio.h>
132 #include <dev/audio_if.h>
133 #include <dev/mulaw.h>
134 #include <dev/auconv.h>
135
136 #include <sys/bus.h>
137
138 #include <dev/ic/ac97reg.h>
139 #include <dev/ic/ac97var.h>
140
141 struct auich_dma {
142 bus_dmamap_t map;
143 void *addr;
144 bus_dma_segment_t segs[1];
145 int nsegs;
146 size_t size;
147 struct auich_dma *next;
148 };
149
150 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr)
151 #define KERNADDR(p) ((void *)((p)->addr))
152
153 struct auich_cdata {
154 struct auich_dmalist ic_dmalist_pcmo[ICH_DMALIST_MAX];
155 struct auich_dmalist ic_dmalist_pcmi[ICH_DMALIST_MAX];
156 struct auich_dmalist ic_dmalist_mici[ICH_DMALIST_MAX];
157 };
158
159 #define ICH_CDOFF(x) offsetof(struct auich_cdata, x)
160 #define ICH_PCMO_OFF(x) ICH_CDOFF(ic_dmalist_pcmo[(x)])
161 #define ICH_PCMI_OFF(x) ICH_CDOFF(ic_dmalist_pcmi[(x)])
162 #define ICH_MICI_OFF(x) ICH_CDOFF(ic_dmalist_mici[(x)])
163
164 struct auich_softc {
165 device_t sc_dev;
166 void *sc_ih;
167
168 device_t sc_audiodev;
169 audio_device_t sc_audev;
170
171 pci_chipset_tag_t sc_pc;
172 pcitag_t sc_pt;
173 bus_space_tag_t iot;
174 bus_space_handle_t mix_ioh;
175 bus_size_t mix_size;
176 bus_space_handle_t aud_ioh;
177 bus_size_t aud_size;
178 bus_dma_tag_t dmat;
179 pci_intr_handle_t intrh;
180
181 struct ac97_codec_if *codec_if;
182 struct ac97_host_if host_if;
183 int sc_codecnum;
184 int sc_codectype;
185 enum ac97_host_flags sc_codecflags;
186 bool sc_spdif;
187
188 /* multi-channel control bits */
189 int sc_pcm246_mask;
190 int sc_pcm2;
191 int sc_pcm4;
192 int sc_pcm6;
193
194 /* DMA scatter-gather lists. */
195 bus_dmamap_t sc_cddmamap;
196 #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr
197
198 struct auich_cdata *sc_cdata;
199
200 struct auich_ring {
201 int qptr;
202 struct auich_dmalist *dmalist;
203
204 uint32_t start, p, end;
205 int blksize;
206
207 void (*intr)(void *);
208 void *arg;
209 } pcmo, pcmi, mici;
210
211 struct auich_dma *sc_dmas;
212
213 /* SiS 7012 hack */
214 int sc_sample_shift;
215 int sc_sts_reg;
216 /* 440MX workaround */
217 int sc_dmamap_flags;
218 /* flags */
219 int sc_iose :1,
220 sc_csr_io :1,
221 sc_csr_mem :1,
222 :29;
223
224 /* sysctl */
225 struct sysctllog *sc_log;
226 uint32_t sc_ac97_clock;
227 int sc_ac97_clock_mib;
228
229 int sc_modem_offset;
230
231 #define AUICH_AUDIO_NFORMATS 3
232 #define AUICH_MODEM_NFORMATS 1
233 struct audio_format sc_audio_formats[AUICH_AUDIO_NFORMATS];
234 struct audio_format sc_modem_formats[AUICH_MODEM_NFORMATS];
235 struct audio_encoding_set *sc_encodings;
236 struct audio_encoding_set *sc_spdif_encodings;
237 };
238
239 /* Debug */
240 #ifdef AUICH_DEBUG
241 #define DPRINTF(l,x) do { if (auich_debug & (l)) printf x; } while(0)
242 int auich_debug = 0xfffe;
243 #define ICH_DEBUG_CODECIO 0x0001
244 #define ICH_DEBUG_DMA 0x0002
245 #define ICH_DEBUG_INTR 0x0004
246 #else
247 #define DPRINTF(x,y) /* nothing */
248 #endif
249
250 static int auich_match(device_t, cfdata_t, void *);
251 static void auich_attach(device_t, device_t, void *);
252 static int auich_detach(device_t, int);
253 static void auich_childdet(device_t, device_t);
254 static int auich_intr(void *);
255
256 CFATTACH_DECL2_NEW(auich, sizeof(struct auich_softc),
257 auich_match, auich_attach, auich_detach, NULL, NULL, auich_childdet);
258
259 static int auich_open(void *, int);
260 static void auich_close(void *);
261 static int auich_query_encoding(void *, struct audio_encoding *);
262 static int auich_set_params(void *, int, int, audio_params_t *,
263 audio_params_t *, stream_filter_list_t *,
264 stream_filter_list_t *);
265 static int auich_round_blocksize(void *, int, int, const audio_params_t *);
266 static void auich_halt_pipe(struct auich_softc *, int);
267 static int auich_halt_output(void *);
268 static int auich_halt_input(void *);
269 static int auich_getdev(void *, struct audio_device *);
270 static int auich_set_port(void *, mixer_ctrl_t *);
271 static int auich_get_port(void *, mixer_ctrl_t *);
272 static int auich_query_devinfo(void *, mixer_devinfo_t *);
273 static void *auich_allocm(void *, int, size_t, struct malloc_type *, int);
274 static void auich_freem(void *, void *, struct malloc_type *);
275 static size_t auich_round_buffersize(void *, int, size_t);
276 static paddr_t auich_mappage(void *, void *, off_t, int);
277 static int auich_get_props(void *);
278 static void auich_trigger_pipe(struct auich_softc *, int, struct auich_ring *);
279 static void auich_intr_pipe(struct auich_softc *, int, struct auich_ring *);
280 static int auich_trigger_output(void *, void *, void *, int,
281 void (*)(void *), void *, const audio_params_t *);
282 static int auich_trigger_input(void *, void *, void *, int,
283 void (*)(void *), void *, const audio_params_t *);
284 static int auich_powerstate(void *, int);
285
286 static int auich_alloc_cdata(struct auich_softc *);
287
288 static int auich_allocmem(struct auich_softc *, size_t, size_t,
289 struct auich_dma *);
290 static int auich_freemem(struct auich_softc *, struct auich_dma *);
291
292 static bool auich_resume(device_t PMF_FN_PROTO);
293 static int auich_set_rate(struct auich_softc *, int, u_long);
294 static int auich_sysctl_verify(SYSCTLFN_ARGS);
295 static void auich_finish_attach(device_t);
296 static void auich_calibrate(struct auich_softc *);
297 static void auich_clear_cas(struct auich_softc *);
298
299 static int auich_attach_codec(void *, struct ac97_codec_if *);
300 static int auich_read_codec(void *, uint8_t, uint16_t *);
301 static int auich_write_codec(void *, uint8_t, uint16_t);
302 static int auich_reset_codec(void *);
303 static enum ac97_host_flags auich_flags_codec(void *);
304 static void auich_spdif_event(void *, bool);
305
306 static const struct audio_hw_if auich_hw_if = {
307 auich_open,
308 auich_close,
309 NULL, /* drain */
310 auich_query_encoding,
311 auich_set_params,
312 auich_round_blocksize,
313 NULL, /* commit_setting */
314 NULL, /* init_output */
315 NULL, /* init_input */
316 NULL, /* start_output */
317 NULL, /* start_input */
318 auich_halt_output,
319 auich_halt_input,
320 NULL, /* speaker_ctl */
321 auich_getdev,
322 NULL, /* getfd */
323 auich_set_port,
324 auich_get_port,
325 auich_query_devinfo,
326 auich_allocm,
327 auich_freem,
328 auich_round_buffersize,
329 auich_mappage,
330 auich_get_props,
331 auich_trigger_output,
332 auich_trigger_input,
333 NULL, /* dev_ioctl */
334 auich_powerstate,
335 };
336
337 #define AUICH_FORMATS_1CH 0
338 #define AUICH_FORMATS_4CH 1
339 #define AUICH_FORMATS_6CH 2
340 static const struct audio_format auich_audio_formats[AUICH_AUDIO_NFORMATS] = {
341 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
342 2, AUFMT_STEREO, 0, {8000, 48000}},
343 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
344 4, AUFMT_SURROUND4, 0, {8000, 48000}},
345 {NULL, AUMODE_PLAY, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
346 6, AUFMT_DOLBY_5_1, 0, {8000, 48000}},
347 };
348
349 #define AUICH_SPDIF_NFORMATS 1
350 static const struct audio_format auich_spdif_formats[AUICH_SPDIF_NFORMATS] = {
351 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
352 2, AUFMT_STEREO, 1, {48000}},
353 };
354
355 static const struct audio_format auich_modem_formats[AUICH_MODEM_NFORMATS] = {
356 {NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
357 1, AUFMT_MONAURAL, 0, {8000, 16000}},
358 };
359
360 #define PCI_ID_CODE0(v, p) PCI_ID_CODE(PCI_VENDOR_##v, PCI_PRODUCT_##v##_##p)
361 #define PCIID_ICH PCI_ID_CODE0(INTEL, 82801AA_ACA)
362 #define PCIID_ICH0 PCI_ID_CODE0(INTEL, 82801AB_ACA)
363 #define PCIID_ICH2 PCI_ID_CODE0(INTEL, 82801BA_ACA)
364 #define PCIID_440MX PCI_ID_CODE0(INTEL, 82440MX_ACA)
365 #define PCIID_ICH3 PCI_ID_CODE0(INTEL, 82801CA_AC)
366 #define PCIID_ICH4 PCI_ID_CODE0(INTEL, 82801DB_AC)
367 #define PCIID_ICH5 PCI_ID_CODE0(INTEL, 82801EB_AC)
368 #define PCIID_ICH6 PCI_ID_CODE0(INTEL, 82801FB_AC)
369 #define PCIID_ICH7 PCI_ID_CODE0(INTEL, 82801G_ACA)
370 #define PCIID_I6300ESB PCI_ID_CODE0(INTEL, 6300ESB_ACA)
371 #define PCIID_SIS7012 PCI_ID_CODE0(SIS, 7012_AC)
372 #define PCIID_NFORCE PCI_ID_CODE0(NVIDIA, NFORCE_MCP_AC)
373 #define PCIID_NFORCE2 PCI_ID_CODE0(NVIDIA, NFORCE2_MCPT_AC)
374 #define PCIID_NFORCE2_400 PCI_ID_CODE0(NVIDIA, NFORCE2_400_MCPT_AC)
375 #define PCIID_NFORCE3 PCI_ID_CODE0(NVIDIA, NFORCE3_MCPT_AC)
376 #define PCIID_NFORCE3_250 PCI_ID_CODE0(NVIDIA, NFORCE3_250_MCPT_AC)
377 #define PCIID_NFORCE4 PCI_ID_CODE0(NVIDIA, NFORCE4_AC)
378 #define PCIID_NFORCE430 PCI_ID_CODE0(NVIDIA, NFORCE430_AC)
379 #define PCIID_AMD768 PCI_ID_CODE0(AMD, PBC768_AC)
380 #define PCIID_AMD8111 PCI_ID_CODE0(AMD, PBC8111_AC)
381
382 #define PCIID_ICH3MODEM PCI_ID_CODE0(INTEL, 82801CA_MOD)
383 #define PCIID_ICH4MODEM PCI_ID_CODE0(INTEL, 82801DB_MOD)
384 #define PCIID_ICH6MODEM PCI_ID_CODE0(INTEL, 82801FB_ACM)
385
386 struct auich_devtype {
387 pcireg_t id;
388 const char *name;
389 const char *shortname; /* must be less than 11 characters */
390 };
391
392 static const struct auich_devtype auich_audio_devices[] = {
393 { PCIID_ICH, "i82801AA (ICH) AC-97 Audio", "ICH" },
394 { PCIID_ICH0, "i82801AB (ICH0) AC-97 Audio", "ICH0" },
395 { PCIID_ICH2, "i82801BA (ICH2) AC-97 Audio", "ICH2" },
396 { PCIID_440MX, "i82440MX AC-97 Audio", "440MX" },
397 { PCIID_ICH3, "i82801CA (ICH3) AC-97 Audio", "ICH3" },
398 { PCIID_ICH4, "i82801DB/DBM (ICH4/ICH4M) AC-97 Audio", "ICH4" },
399 { PCIID_ICH5, "i82801EB (ICH5) AC-97 Audio", "ICH5" },
400 { PCIID_ICH6, "i82801FB (ICH6) AC-97 Audio", "ICH6" },
401 { PCIID_ICH7, "i82801GB/GR (ICH7) AC-97 Audio", "ICH7" },
402 { PCIID_I6300ESB, "Intel 6300ESB AC-97 Audio", "I6300ESB" },
403 { PCIID_SIS7012, "SiS 7012 AC-97 Audio", "SiS7012" },
404 { PCIID_NFORCE, "nForce MCP AC-97 Audio", "nForce" },
405 { PCIID_NFORCE2, "nForce2 MCP-T AC-97 Audio", "nForce2" },
406 { PCIID_NFORCE2_400, "nForce2 400 MCP-T AC-97 Audio", "nForce2" },
407 { PCIID_NFORCE3, "nForce3 MCP-T AC-97 Audio", "nForce3" },
408 { PCIID_NFORCE3_250, "nForce3 250 MCP-T AC-97 Audio", "nForce3" },
409 { PCIID_NFORCE4, "nForce4 AC-97 Audio", "nForce4" },
410 { PCIID_NFORCE430, "nForce430 (MCP51) AC-97 Audio", "nForce430" },
411 { PCIID_AMD768, "AMD768 AC-97 Audio", "AMD768" },
412 { PCIID_AMD8111,"AMD8111 AC-97 Audio", "AMD8111" },
413 { 0, NULL, NULL },
414 };
415
416 static const struct auich_devtype auich_modem_devices[] = {
417 #ifdef AUICH_ATTACH_MODEM
418 { PCIID_ICH3MODEM, "i82801CA (ICH3) AC-97 Modem", "ICH3MODEM" },
419 { PCIID_ICH4MODEM, "i82801DB (ICH4) AC-97 Modem", "ICH4MODEM" },
420 { PCIID_ICH6MODEM, "i82801FB (ICH6) AC-97 Modem", "ICH6MODEM" },
421 #endif
422 { 0, NULL, NULL },
423 };
424
425 static const struct auich_devtype *
426 auich_lookup(struct pci_attach_args *pa, const struct auich_devtype *auich_devices)
427 {
428 const struct auich_devtype *d;
429
430 for (d = auich_devices; d->name != NULL; d++) {
431 if (pa->pa_id == d->id)
432 return d;
433 }
434
435 return NULL;
436 }
437
438 static int
439 auich_match(device_t parent, cfdata_t match, void *aux)
440 {
441 struct pci_attach_args *pa;
442
443 pa = aux;
444 if (auich_lookup(pa, auich_audio_devices) != NULL)
445 return 1;
446 if (auich_lookup(pa, auich_modem_devices) != NULL)
447 return 1;
448
449 return 0;
450 }
451
452 static void
453 auich_attach(device_t parent, device_t self, void *aux)
454 {
455 struct auich_softc *sc = device_private(self);
456 struct pci_attach_args *pa;
457 pcireg_t v, subdev;
458 const char *intrstr;
459 const struct auich_devtype *d;
460 const struct sysctlnode *node, *node_ac97clock;
461 int err, node_mib, i;
462
463 sc->sc_dev = self;
464 pa = aux;
465
466 if ((d = auich_lookup(pa, auich_modem_devices)) != NULL) {
467 sc->sc_modem_offset = 0x10;
468 sc->sc_codectype = AC97_CODEC_TYPE_MODEM;
469 } else if ((d = auich_lookup(pa, auich_audio_devices)) != NULL) {
470 sc->sc_modem_offset = 0;
471 sc->sc_codectype = AC97_CODEC_TYPE_AUDIO;
472 } else
473 panic("auich_attach: impossible");
474
475 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO)
476 aprint_naive(": Audio controller\n");
477 else
478 aprint_naive(": Modem controller\n");
479
480 sc->sc_pc = pa->pa_pc;
481 sc->sc_pt = pa->pa_tag;
482
483 aprint_normal(": %s\n", d->name);
484
485 if (d->id == PCIID_ICH4 || d->id == PCIID_ICH5 || d->id == PCIID_ICH6
486 || d->id == PCIID_ICH7 || d->id == PCIID_I6300ESB
487 || d->id == PCIID_ICH4MODEM) {
488 /*
489 * Use native mode for Intel 6300ESB and ICH4/ICH5/ICH6/ICH7
490 */
491
492 sc->sc_csr_mem = 1;
493 v = pci_conf_read(pa->pa_pc, pa->pa_tag,
494 PCI_COMMAND_STATUS_REG);
495 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
496 v | PCI_COMMAND_MEM_ENABLE);
497 pa->pa_flags |= PCI_FLAGS_MEM_ENABLED;
498
499 if (pci_mapreg_map(pa, ICH_MMBAR, PCI_MAPREG_TYPE_MEM, 0,
500 &sc->iot, &sc->mix_ioh, NULL, &sc->mix_size)) {
501 goto retry_map;
502 }
503 if (pci_mapreg_map(pa, ICH_MBBAR, PCI_MAPREG_TYPE_MEM, 0,
504 &sc->iot, &sc->aud_ioh, NULL, &sc->aud_size)) {
505 goto retry_map;
506 }
507 goto map_done;
508 } else
509 goto non_native_map;
510
511 retry_map:
512 sc->sc_iose = 1;
513 v = pci_conf_read(pa->pa_pc, pa->pa_tag, ICH_CFG);
514 pci_conf_write(pa->pa_pc, pa->pa_tag, ICH_CFG,
515 v | ICH_CFG_IOSE);
516
517 non_native_map:
518 sc->sc_csr_io = 1;
519 v = pci_conf_read(pa->pa_pc, pa->pa_tag,
520 PCI_COMMAND_STATUS_REG);
521 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
522 v | PCI_COMMAND_IO_ENABLE);
523 pa->pa_flags |= PCI_FLAGS_IO_ENABLED;
524
525 if (pci_mapreg_map(pa, ICH_NAMBAR, PCI_MAPREG_TYPE_IO, 0,
526 &sc->iot, &sc->mix_ioh, NULL, &sc->mix_size)) {
527 aprint_error_dev(self, "can't map codec i/o space\n");
528 return;
529 }
530 if (pci_mapreg_map(pa, ICH_NABMBAR, PCI_MAPREG_TYPE_IO, 0,
531 &sc->iot, &sc->aud_ioh, NULL, &sc->aud_size)) {
532 aprint_error_dev(self, "can't map device i/o space\n");
533 return;
534 }
535
536 map_done:
537 sc->dmat = pa->pa_dmat;
538
539 /* enable bus mastering */
540 v = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
541 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
542 v | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_BACKTOBACK_ENABLE);
543
544 /* Map and establish the interrupt. */
545 if (pci_intr_map(pa, &sc->intrh)) {
546 aprint_error_dev(self, "can't map interrupt\n");
547 return;
548 }
549 intrstr = pci_intr_string(pa->pa_pc, sc->intrh);
550 sc->sc_ih = pci_intr_establish(pa->pa_pc, sc->intrh, IPL_AUDIO,
551 auich_intr, sc);
552 if (sc->sc_ih == NULL) {
553 aprint_error_dev(self, "can't establish interrupt");
554 if (intrstr != NULL)
555 aprint_error(" at %s", intrstr);
556 aprint_error("\n");
557 return;
558 }
559 aprint_normal_dev(self, "interrupting at %s\n", intrstr);
560
561 snprintf(sc->sc_audev.name, MAX_AUDIO_DEV_LEN, "%s AC97", d->shortname);
562 snprintf(sc->sc_audev.version, MAX_AUDIO_DEV_LEN,
563 "0x%02x", PCI_REVISION(pa->pa_class));
564 strlcpy(sc->sc_audev.config, device_xname(self), MAX_AUDIO_DEV_LEN);
565
566 /* SiS 7012 needs special handling */
567 if (d->id == PCIID_SIS7012) {
568 sc->sc_sts_reg = ICH_PICB;
569 sc->sc_sample_shift = 0;
570 sc->sc_pcm246_mask = ICH_SIS_PCM246_MASK;
571 sc->sc_pcm2 = ICH_SIS_PCM2;
572 sc->sc_pcm4 = ICH_SIS_PCM4;
573 sc->sc_pcm6 = ICH_SIS_PCM6;
574 /* Un-mute output. From Linux. */
575 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_SIS_NV_CTL,
576 bus_space_read_4(sc->iot, sc->aud_ioh, ICH_SIS_NV_CTL) |
577 ICH_SIS_CTL_UNMUTE);
578 } else {
579 sc->sc_sts_reg = ICH_STS;
580 sc->sc_sample_shift = 1;
581 sc->sc_pcm246_mask = ICH_PCM246_MASK;
582 sc->sc_pcm2 = ICH_PCM2;
583 sc->sc_pcm4 = ICH_PCM4;
584 sc->sc_pcm6 = ICH_PCM6;
585 }
586
587 /* Workaround for a 440MX B-stepping erratum */
588 sc->sc_dmamap_flags = BUS_DMA_COHERENT;
589 if (d->id == PCIID_440MX) {
590 sc->sc_dmamap_flags |= BUS_DMA_NOCACHE;
591 aprint_normal_dev(self, "DMA bug workaround enabled\n");
592 }
593
594 /* Set up DMA lists. */
595 sc->pcmo.qptr = sc->pcmi.qptr = sc->mici.qptr = 0;
596 auich_alloc_cdata(sc);
597
598 DPRINTF(ICH_DEBUG_DMA, ("auich_attach: lists %p %p %p\n",
599 sc->pcmo.dmalist, sc->pcmi.dmalist, sc->mici.dmalist));
600
601 /* Modem codecs are always the secondary codec on ICH */
602 sc->sc_codecnum = sc->sc_codectype == AC97_CODEC_TYPE_MODEM ? 1 : 0;
603
604 sc->host_if.arg = sc;
605 sc->host_if.attach = auich_attach_codec;
606 sc->host_if.read = auich_read_codec;
607 sc->host_if.write = auich_write_codec;
608 sc->host_if.reset = auich_reset_codec;
609 sc->host_if.flags = auich_flags_codec;
610 sc->host_if.spdif_event = auich_spdif_event;
611
612 subdev = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
613 switch (subdev) {
614 case 0x202f161f: /* Gateway 7326GZ */
615 case 0x203a161f: /* Gateway 4028GZ */
616 case 0x204c161f: /* Kvazar-Micro Senator 3592XT */
617 case 0x8144104d: /* Sony VAIO PCG-TR* */
618 case 0x8197104d: /* Sony S1XP */
619 case 0x81c0104d: /* Sony VAIO type T */
620 case 0x81c5104d: /* Sony VAIO VGN-B1XP */
621 sc->sc_codecflags = AC97_HOST_INVERTED_EAMP;
622 break;
623 default:
624 sc->sc_codecflags = 0;
625 break;
626 }
627
628 if (ac97_attach_type(&sc->host_if, self, sc->sc_codectype) != 0)
629 return;
630 sc->codec_if->vtbl->unlock(sc->codec_if);
631
632 /* setup audio_format */
633 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) {
634 memcpy(sc->sc_audio_formats, auich_audio_formats, sizeof(auich_audio_formats));
635 if (!AC97_IS_4CH(sc->codec_if))
636 AUFMT_INVALIDATE(&sc->sc_audio_formats[AUICH_FORMATS_4CH]);
637 if (!AC97_IS_6CH(sc->codec_if))
638 AUFMT_INVALIDATE(&sc->sc_audio_formats[AUICH_FORMATS_6CH]);
639 if (AC97_IS_FIXED_RATE(sc->codec_if)) {
640 for (i = 0; i < AUICH_AUDIO_NFORMATS; i++) {
641 sc->sc_audio_formats[i].frequency_type = 1;
642 sc->sc_audio_formats[i].frequency[0] = 48000;
643 }
644 }
645 if (0 != auconv_create_encodings(sc->sc_audio_formats, AUICH_AUDIO_NFORMATS,
646 &sc->sc_encodings))
647 return;
648 if (0 != auconv_create_encodings(auich_spdif_formats, AUICH_SPDIF_NFORMATS,
649 &sc->sc_spdif_encodings))
650 return;
651 } else {
652 memcpy(sc->sc_modem_formats, auich_modem_formats, sizeof(auich_modem_formats));
653 if (0 != auconv_create_encodings(sc->sc_modem_formats, AUICH_MODEM_NFORMATS,
654 &sc->sc_encodings))
655 return;
656 }
657
658 /* Watch for power change */
659 if (!pmf_device_register(self, NULL, auich_resume))
660 aprint_error_dev(self, "couldn't establish power handler\n");
661
662 config_interrupts(self, auich_finish_attach);
663
664 /* sysctl setup */
665 if (AC97_IS_FIXED_RATE(sc->codec_if) &&
666 sc->sc_codectype == AC97_CODEC_TYPE_AUDIO)
667 return;
668
669 err = sysctl_createv(&sc->sc_log, 0, NULL, NULL, 0,
670 CTLTYPE_NODE, "hw", NULL, NULL, 0, NULL, 0,
671 CTL_HW, CTL_EOL);
672 if (err != 0)
673 goto sysctl_err;
674 err = sysctl_createv(&sc->sc_log, 0, NULL, &node, 0,
675 CTLTYPE_NODE, device_xname(self), NULL, NULL, 0,
676 NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL);
677 if (err != 0)
678 goto sysctl_err;
679 node_mib = node->sysctl_num;
680
681 if (!AC97_IS_FIXED_RATE(sc->codec_if)) {
682 /* passing the sc address instead of &sc->sc_ac97_clock */
683 err = sysctl_createv(&sc->sc_log, 0, NULL, &node_ac97clock,
684 CTLFLAG_READWRITE,
685 CTLTYPE_INT, "ac97rate",
686 SYSCTL_DESCR("AC'97 codec link rate"),
687 auich_sysctl_verify, 0, sc, 0,
688 CTL_HW, node_mib, CTL_CREATE, CTL_EOL);
689 if (err != 0)
690 goto sysctl_err;
691 sc->sc_ac97_clock_mib = node_ac97clock->sysctl_num;
692 }
693
694 return;
695
696 sysctl_err:
697 printf("%s: failed to add sysctl nodes. (%d)\n",
698 device_xname(self), err);
699 return; /* failure of sysctl is not fatal. */
700 }
701
702 static void
703 auich_childdet(device_t self, device_t child)
704 {
705 struct auich_softc *sc = device_private(self);
706
707 KASSERT(sc->sc_audiodev == child);
708 sc->sc_audiodev = NULL;
709 }
710
711 static int
712 auich_detach(device_t self, int flags)
713 {
714 struct auich_softc *sc = device_private(self);
715
716 /* audio */
717 if (sc->sc_audiodev != NULL)
718 config_detach(sc->sc_audiodev, flags);
719
720 /* sysctl */
721 sysctl_teardown(&sc->sc_log);
722
723 /* audio_encoding_set */
724 auconv_delete_encodings(sc->sc_encodings);
725 auconv_delete_encodings(sc->sc_spdif_encodings);
726
727 /* ac97 */
728 if (sc->codec_if != NULL)
729 sc->codec_if->vtbl->detach(sc->codec_if);
730
731 /* PCI */
732 if (sc->sc_ih != NULL)
733 pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
734 if (sc->mix_size != 0)
735 bus_space_unmap(sc->iot, sc->mix_ioh, sc->mix_size);
736 if (sc->aud_size != 0)
737 bus_space_unmap(sc->iot, sc->aud_ioh, sc->aud_size);
738 return 0;
739 }
740
741 static int
742 auich_sysctl_verify(SYSCTLFN_ARGS)
743 {
744 int error, tmp;
745 struct sysctlnode node;
746 struct auich_softc *sc;
747
748 node = *rnode;
749 sc = rnode->sysctl_data;
750 if (node.sysctl_num == sc->sc_ac97_clock_mib) {
751 tmp = sc->sc_ac97_clock;
752 node.sysctl_data = &tmp;
753 error = sysctl_lookup(SYSCTLFN_CALL(&node));
754 if (error || newp == NULL)
755 return error;
756
757 if (tmp < 48000 || tmp > 96000)
758 return EINVAL;
759 sc->sc_ac97_clock = tmp;
760 }
761
762 return 0;
763 }
764
765 static void
766 auich_finish_attach(device_t self)
767 {
768 struct auich_softc *sc = device_private(self);
769
770 if (!AC97_IS_FIXED_RATE(sc->codec_if))
771 auich_calibrate(sc);
772
773 sc->sc_audiodev = audio_attach_mi(&auich_hw_if, sc, sc->sc_dev);
774
775 return;
776 }
777
778 #define ICH_CODECIO_INTERVAL 10
779 static int
780 auich_read_codec(void *v, uint8_t reg, uint16_t *val)
781 {
782 struct auich_softc *sc;
783 int i;
784 uint32_t status;
785
786 sc = v;
787 /* wait for an access semaphore */
788 for (i = ICH_SEMATIMO / ICH_CODECIO_INTERVAL; i-- &&
789 bus_space_read_1(sc->iot, sc->aud_ioh,
790 ICH_CAS + sc->sc_modem_offset) & 1;
791 DELAY(ICH_CODECIO_INTERVAL));
792
793 if (i > 0) {
794 *val = bus_space_read_2(sc->iot, sc->mix_ioh,
795 reg + (sc->sc_codecnum * ICH_CODEC_OFFSET));
796 DPRINTF(ICH_DEBUG_CODECIO,
797 ("auich_read_codec(%x, %x)\n", reg, *val));
798 status = bus_space_read_4(sc->iot, sc->aud_ioh,
799 ICH_GSTS + sc->sc_modem_offset);
800 if (status & ICH_RCS) {
801 bus_space_write_4(sc->iot, sc->aud_ioh,
802 ICH_GSTS + sc->sc_modem_offset,
803 status & ~(ICH_SRI|ICH_PRI|ICH_GSCI));
804 *val = 0xffff;
805 DPRINTF(ICH_DEBUG_CODECIO,
806 ("%s: read_codec error\n", device_xname(sc->sc_dev)));
807 if (reg == AC97_REG_GPIO_STATUS)
808 auich_clear_cas(sc);
809 return -1;
810 }
811 if (reg == AC97_REG_GPIO_STATUS)
812 auich_clear_cas(sc);
813 return 0;
814 } else {
815 aprint_normal_dev(sc->sc_dev, "read_codec timeout\n");
816 if (reg == AC97_REG_GPIO_STATUS)
817 auich_clear_cas(sc);
818 return -1;
819 }
820 }
821
822 static int
823 auich_write_codec(void *v, uint8_t reg, uint16_t val)
824 {
825 struct auich_softc *sc;
826 int i;
827
828 DPRINTF(ICH_DEBUG_CODECIO, ("auich_write_codec(%x, %x)\n", reg, val));
829 sc = v;
830 /* wait for an access semaphore */
831 for (i = ICH_SEMATIMO / ICH_CODECIO_INTERVAL; i-- &&
832 bus_space_read_1(sc->iot, sc->aud_ioh,
833 ICH_CAS + sc->sc_modem_offset) & 1;
834 DELAY(ICH_CODECIO_INTERVAL));
835
836 if (i > 0) {
837 bus_space_write_2(sc->iot, sc->mix_ioh,
838 reg + (sc->sc_codecnum * ICH_CODEC_OFFSET), val);
839 return 0;
840 } else {
841 aprint_normal_dev(sc->sc_dev, "write_codec timeout\n");
842 return -1;
843 }
844 }
845
846 static int
847 auich_attach_codec(void *v, struct ac97_codec_if *cif)
848 {
849 struct auich_softc *sc;
850
851 sc = v;
852 sc->codec_if = cif;
853
854 return 0;
855 }
856
857 static int
858 auich_reset_codec(void *v)
859 {
860 struct auich_softc *sc;
861 int i;
862 uint32_t control, status;
863
864 sc = v;
865 control = bus_space_read_4(sc->iot, sc->aud_ioh,
866 ICH_GCTRL + sc->sc_modem_offset);
867 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) {
868 control &= ~(ICH_ACLSO | sc->sc_pcm246_mask);
869 } else {
870 control &= ~ICH_ACLSO;
871 control |= ICH_GIE;
872 }
873 control |= (control & ICH_CRESET) ? ICH_WRESET : ICH_CRESET;
874 bus_space_write_4(sc->iot, sc->aud_ioh,
875 ICH_GCTRL + sc->sc_modem_offset, control);
876
877 for (i = 500000; i >= 0; i--) {
878 status = bus_space_read_4(sc->iot, sc->aud_ioh,
879 ICH_GSTS + sc->sc_modem_offset);
880 if (status & (ICH_PCR | ICH_SCR | ICH_S2CR))
881 break;
882 DELAY(1);
883 }
884 if (i <= 0) {
885 aprint_error_dev(sc->sc_dev, "auich_reset_codec: time out\n");
886 return ETIMEDOUT;
887 }
888 #ifdef AUICH_DEBUG
889 if (status & ICH_SCR)
890 printf("%s: The 2nd codec is ready.\n",
891 device_xname(sc->sc_dev));
892 if (status & ICH_S2CR)
893 printf("%s: The 3rd codec is ready.\n",
894 device_xname(sc->sc_dev));
895 #endif
896 return 0;
897 }
898
899 static enum ac97_host_flags
900 auich_flags_codec(void *v)
901 {
902 struct auich_softc *sc = v;
903 return sc->sc_codecflags;
904 }
905
906 static void
907 auich_spdif_event(void *addr, bool flag)
908 {
909 struct auich_softc *sc;
910
911 sc = addr;
912 sc->sc_spdif = flag;
913 }
914
915 static int
916 auich_open(void *addr, int flags)
917 {
918 struct auich_softc *sc;
919
920 sc = (struct auich_softc *)addr;
921 sc->codec_if->vtbl->lock(sc->codec_if);
922 return 0;
923 }
924
925 static void
926 auich_close(void *addr)
927 {
928 struct auich_softc *sc;
929
930 sc = (struct auich_softc *)addr;
931 sc->codec_if->vtbl->unlock(sc->codec_if);
932 }
933
934 static int
935 auich_query_encoding(void *v, struct audio_encoding *aep)
936 {
937 struct auich_softc *sc;
938
939 sc = (struct auich_softc *)v;
940 return auconv_query_encoding(
941 sc->sc_spdif ? sc->sc_spdif_encodings : sc->sc_encodings, aep);
942 }
943
944 static int
945 auich_set_rate(struct auich_softc *sc, int mode, u_long srate)
946 {
947 int ret;
948 u_int ratetmp;
949
950 sc->codec_if->vtbl->set_clock(sc->codec_if, sc->sc_ac97_clock);
951 ratetmp = srate;
952 if (mode == AUMODE_RECORD)
953 return sc->codec_if->vtbl->set_rate(sc->codec_if,
954 AC97_REG_PCM_LR_ADC_RATE, &ratetmp);
955 ret = sc->codec_if->vtbl->set_rate(sc->codec_if,
956 AC97_REG_PCM_FRONT_DAC_RATE, &ratetmp);
957 if (ret)
958 return ret;
959 ratetmp = srate;
960 ret = sc->codec_if->vtbl->set_rate(sc->codec_if,
961 AC97_REG_PCM_SURR_DAC_RATE, &ratetmp);
962 if (ret)
963 return ret;
964 ratetmp = srate;
965 ret = sc->codec_if->vtbl->set_rate(sc->codec_if,
966 AC97_REG_PCM_LFE_DAC_RATE, &ratetmp);
967 return ret;
968 }
969
970 static int
971 auich_set_params(void *v, int setmode, int usemode,
972 audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil,
973 stream_filter_list_t *rfil)
974 {
975 struct auich_softc *sc;
976 audio_params_t *p;
977 stream_filter_list_t *fil;
978 int mode, index;
979 uint32_t control;
980
981 sc = v;
982 for (mode = AUMODE_RECORD; mode != -1;
983 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) {
984 if ((setmode & mode) == 0)
985 continue;
986
987 p = mode == AUMODE_PLAY ? play : rec;
988 fil = mode == AUMODE_PLAY ? pfil : rfil;
989 if (p == NULL)
990 continue;
991
992 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) {
993 if (p->sample_rate < 8000 ||
994 p->sample_rate > 48000)
995 return EINVAL;
996
997 if (!sc->sc_spdif)
998 index = auconv_set_converter(sc->sc_audio_formats,
999 AUICH_AUDIO_NFORMATS, mode, p, TRUE, fil);
1000 else
1001 index = auconv_set_converter(auich_spdif_formats,
1002 AUICH_SPDIF_NFORMATS, mode, p, TRUE, fil);
1003 } else {
1004 if (p->sample_rate != 8000 && p->sample_rate != 16000)
1005 return EINVAL;
1006 index = auconv_set_converter(sc->sc_modem_formats,
1007 AUICH_MODEM_NFORMATS, mode, p, TRUE, fil);
1008 }
1009 if (index < 0)
1010 return EINVAL;
1011 if (fil->req_size > 0)
1012 p = &fil->filters[0].param;
1013 /* p represents HW encoding */
1014 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) {
1015 if (sc->sc_audio_formats[index].frequency_type != 1
1016 && auich_set_rate(sc, mode, p->sample_rate))
1017 return EINVAL;
1018 } else {
1019 if (sc->sc_modem_formats[index].frequency_type != 1
1020 && auich_set_rate(sc, mode, p->sample_rate))
1021 return EINVAL;
1022 auich_write_codec(sc, AC97_REG_LINE1_RATE,
1023 p->sample_rate);
1024 auich_write_codec(sc, AC97_REG_LINE1_LEVEL, 0);
1025 }
1026 if (mode == AUMODE_PLAY &&
1027 sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) {
1028 control = bus_space_read_4(sc->iot, sc->aud_ioh,
1029 ICH_GCTRL + sc->sc_modem_offset);
1030 control &= ~sc->sc_pcm246_mask;
1031 if (p->channels == 4) {
1032 control |= sc->sc_pcm4;
1033 } else if (p->channels == 6) {
1034 control |= sc->sc_pcm6;
1035 }
1036 bus_space_write_4(sc->iot, sc->aud_ioh,
1037 ICH_GCTRL + sc->sc_modem_offset, control);
1038 }
1039 }
1040
1041 return 0;
1042 }
1043
1044 static int
1045 auich_round_blocksize(void *v, int blk, int mode,
1046 const audio_params_t *param)
1047 {
1048
1049 return blk & ~0x3f; /* keep good alignment */
1050 }
1051
1052 static void
1053 auich_halt_pipe(struct auich_softc *sc, int pipe)
1054 {
1055 int i;
1056 uint32_t status;
1057
1058 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, 0);
1059 for (i = 0; i < 100; i++) {
1060 status = bus_space_read_4(sc->iot, sc->aud_ioh, pipe + ICH_STS);
1061 if (status & ICH_DCH)
1062 break;
1063 DELAY(1);
1064 }
1065 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL, ICH_RR);
1066
1067 #if AUICH_DEBUG
1068 if (i > 0)
1069 printf("auich_halt_pipe: halt took %d cycles\n", i);
1070 #endif
1071 }
1072
1073 static int
1074 auich_halt_output(void *v)
1075 {
1076 struct auich_softc *sc;
1077
1078 sc = v;
1079 DPRINTF(ICH_DEBUG_DMA, ("%s: halt_output\n", device_xname(sc->sc_dev)));
1080
1081 auich_halt_pipe(sc, ICH_PCMO);
1082 sc->pcmo.intr = NULL;
1083
1084 return 0;
1085 }
1086
1087 static int
1088 auich_halt_input(void *v)
1089 {
1090 struct auich_softc *sc;
1091
1092 sc = v;
1093 DPRINTF(ICH_DEBUG_DMA, ("%s: halt_input\n", device_xname(sc->sc_dev)));
1094
1095 auich_halt_pipe(sc, ICH_PCMI);
1096 sc->pcmi.intr = NULL;
1097
1098 return 0;
1099 }
1100
1101 static int
1102 auich_getdev(void *v, struct audio_device *adp)
1103 {
1104 struct auich_softc *sc;
1105
1106 sc = v;
1107 *adp = sc->sc_audev;
1108 return 0;
1109 }
1110
1111 static int
1112 auich_set_port(void *v, mixer_ctrl_t *cp)
1113 {
1114 struct auich_softc *sc;
1115
1116 sc = v;
1117 return sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp);
1118 }
1119
1120 static int
1121 auich_get_port(void *v, mixer_ctrl_t *cp)
1122 {
1123 struct auich_softc *sc;
1124
1125 sc = v;
1126 return sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp);
1127 }
1128
1129 static int
1130 auich_query_devinfo(void *v, mixer_devinfo_t *dp)
1131 {
1132 struct auich_softc *sc;
1133
1134 sc = v;
1135 return sc->codec_if->vtbl->query_devinfo(sc->codec_if, dp);
1136 }
1137
1138 static void *
1139 auich_allocm(void *v, int direction, size_t size,
1140 struct malloc_type *pool, int flags)
1141 {
1142 struct auich_softc *sc;
1143 struct auich_dma *p;
1144 int error;
1145
1146 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX))
1147 return NULL;
1148
1149 p = malloc(sizeof(*p), pool, flags|M_ZERO);
1150 if (p == NULL)
1151 return NULL;
1152
1153 sc = v;
1154 error = auich_allocmem(sc, size, 0, p);
1155 if (error) {
1156 free(p, pool);
1157 return NULL;
1158 }
1159
1160 p->next = sc->sc_dmas;
1161 sc->sc_dmas = p;
1162
1163 return KERNADDR(p);
1164 }
1165
1166 static void
1167 auich_freem(void *v, void *ptr, struct malloc_type *pool)
1168 {
1169 struct auich_softc *sc;
1170 struct auich_dma *p, **pp;
1171
1172 sc = v;
1173 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) {
1174 if (KERNADDR(p) == ptr) {
1175 auich_freemem(sc, p);
1176 *pp = p->next;
1177 free(p, pool);
1178 return;
1179 }
1180 }
1181 }
1182
1183 static size_t
1184 auich_round_buffersize(void *v, int direction, size_t size)
1185 {
1186
1187 if (size > (ICH_DMALIST_MAX * ICH_DMASEG_MAX))
1188 size = ICH_DMALIST_MAX * ICH_DMASEG_MAX;
1189
1190 return size;
1191 }
1192
1193 static paddr_t
1194 auich_mappage(void *v, void *mem, off_t off, int prot)
1195 {
1196 struct auich_softc *sc;
1197 struct auich_dma *p;
1198
1199 if (off < 0)
1200 return -1;
1201 sc = v;
1202 for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next)
1203 continue;
1204 if (!p)
1205 return -1;
1206 return bus_dmamem_mmap(sc->dmat, p->segs, p->nsegs,
1207 off, prot, BUS_DMA_WAITOK);
1208 }
1209
1210 static int
1211 auich_get_props(void *v)
1212 {
1213 struct auich_softc *sc;
1214 int props;
1215
1216 props = AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX;
1217 sc = v;
1218 /*
1219 * Even if the codec is fixed-rate, set_param() succeeds for any sample
1220 * rate because of aurateconv. Applications can't know what rate the
1221 * device can process in the case of mmap().
1222 */
1223 if (!AC97_IS_FIXED_RATE(sc->codec_if) ||
1224 sc->sc_codectype == AC97_CODEC_TYPE_MODEM)
1225 props |= AUDIO_PROP_MMAP;
1226 return props;
1227 }
1228
1229 static int
1230 auich_intr(void *v)
1231 {
1232 struct auich_softc *sc;
1233 int ret, gsts;
1234 #ifdef DIAGNOSTIC
1235 int csts;
1236 #endif
1237
1238 sc = v;
1239
1240 if (!device_has_power(sc->sc_dev))
1241 return (0);
1242
1243 ret = 0;
1244 #ifdef DIAGNOSTIC
1245 csts = pci_conf_read(sc->sc_pc, sc->sc_pt, PCI_COMMAND_STATUS_REG);
1246 if (csts & PCI_STATUS_MASTER_ABORT) {
1247 printf("auich_intr: PCI master abort\n");
1248 }
1249 #endif
1250
1251 gsts = bus_space_read_4(sc->iot, sc->aud_ioh,
1252 ICH_GSTS + sc->sc_modem_offset);
1253 DPRINTF(ICH_DEBUG_INTR, ("auich_intr: gsts=0x%x\n", gsts));
1254
1255 if ((sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_POINT) ||
1256 (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_MOINT)) {
1257 int sts;
1258
1259 sts = bus_space_read_2(sc->iot, sc->aud_ioh,
1260 ICH_PCMO + sc->sc_sts_reg);
1261 DPRINTF(ICH_DEBUG_INTR,
1262 ("auich_intr: osts=0x%x\n", sts));
1263
1264 if (sts & ICH_FIFOE)
1265 printf("%s: fifo underrun\n", device_xname(sc->sc_dev));
1266
1267 if (sts & ICH_BCIS)
1268 auich_intr_pipe(sc, ICH_PCMO, &sc->pcmo);
1269
1270 /* int ack */
1271 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMO +
1272 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE));
1273 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO)
1274 bus_space_write_4(sc->iot, sc->aud_ioh,
1275 ICH_GSTS + sc->sc_modem_offset, ICH_POINT);
1276 else
1277 bus_space_write_4(sc->iot, sc->aud_ioh,
1278 ICH_GSTS + sc->sc_modem_offset, ICH_MOINT);
1279 ret++;
1280 }
1281
1282 if ((sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_PIINT) ||
1283 (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_MIINT)) {
1284 int sts;
1285
1286 sts = bus_space_read_2(sc->iot, sc->aud_ioh,
1287 ICH_PCMI + sc->sc_sts_reg);
1288 DPRINTF(ICH_DEBUG_INTR,
1289 ("auich_intr: ists=0x%x\n", sts));
1290
1291 if (sts & ICH_FIFOE)
1292 printf("%s: fifo overrun\n", device_xname(sc->sc_dev));
1293
1294 if (sts & ICH_BCIS)
1295 auich_intr_pipe(sc, ICH_PCMI, &sc->pcmi);
1296
1297 /* int ack */
1298 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_PCMI +
1299 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE));
1300 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO)
1301 bus_space_write_4(sc->iot, sc->aud_ioh,
1302 ICH_GSTS + sc->sc_modem_offset, ICH_PIINT);
1303 else
1304 bus_space_write_4(sc->iot, sc->aud_ioh,
1305 ICH_GSTS + sc->sc_modem_offset, ICH_MIINT);
1306 ret++;
1307 }
1308
1309 if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO && gsts & ICH_MINT) {
1310 int sts;
1311
1312 sts = bus_space_read_2(sc->iot, sc->aud_ioh,
1313 ICH_MICI + sc->sc_sts_reg);
1314 DPRINTF(ICH_DEBUG_INTR,
1315 ("auich_intr: ists=0x%x\n", sts));
1316
1317 if (sts & ICH_FIFOE)
1318 printf("%s: fifo overrun\n", device_xname(sc->sc_dev));
1319
1320 if (sts & ICH_BCIS)
1321 auich_intr_pipe(sc, ICH_MICI, &sc->mici);
1322
1323 /* int ack */
1324 bus_space_write_2(sc->iot, sc->aud_ioh, ICH_MICI +
1325 sc->sc_sts_reg, sts & (ICH_BCIS | ICH_FIFOE));
1326 bus_space_write_4(sc->iot, sc->aud_ioh,
1327 ICH_GSTS + sc->sc_modem_offset, ICH_MINT);
1328 ret++;
1329 }
1330
1331 #ifdef AUICH_MODEM_DEBUG
1332 if (sc->sc_codectype == AC97_CODEC_TYPE_MODEM && gsts & ICH_GSCI) {
1333 printf("%s: gsts=0x%x\n", device_xname(sc->sc_dev), gsts);
1334 /* int ack */
1335 bus_space_write_4(sc->iot, sc->aud_ioh,
1336 ICH_GSTS + sc->sc_modem_offset, ICH_GSCI);
1337 ret++;
1338 }
1339 #endif
1340
1341 return ret;
1342 }
1343
1344 static void
1345 auich_trigger_pipe(struct auich_softc *sc, int pipe, struct auich_ring *ring)
1346 {
1347 int blksize, qptr;
1348 struct auich_dmalist *q;
1349
1350 blksize = ring->blksize;
1351
1352 for (qptr = 0; qptr < ICH_DMALIST_MAX; qptr++) {
1353 q = &ring->dmalist[qptr];
1354 q->base = ring->p;
1355 q->len = (blksize >> sc->sc_sample_shift) | ICH_DMAF_IOC;
1356
1357 ring->p += blksize;
1358 if (ring->p >= ring->end)
1359 ring->p = ring->start;
1360 }
1361 ring->qptr = 0;
1362
1363 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_LVI,
1364 (qptr - 1) & ICH_LVI_MASK);
1365 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_CTRL,
1366 ICH_IOCE | ICH_FEIE | ICH_RPBM);
1367 }
1368
1369 static void
1370 auich_intr_pipe(struct auich_softc *sc, int pipe, struct auich_ring *ring)
1371 {
1372 int blksize, qptr, nqptr;
1373 struct auich_dmalist *q;
1374
1375 blksize = ring->blksize;
1376 qptr = ring->qptr;
1377 nqptr = bus_space_read_1(sc->iot, sc->aud_ioh, pipe + ICH_CIV);
1378
1379 while (qptr != nqptr) {
1380 q = &ring->dmalist[qptr];
1381 q->base = ring->p;
1382 q->len = (blksize >> sc->sc_sample_shift) | ICH_DMAF_IOC;
1383
1384 DPRINTF(ICH_DEBUG_INTR,
1385 ("auich_intr: %p, %p = %x @ 0x%x\n",
1386 &ring->dmalist[qptr], q, q->len, q->base));
1387
1388 ring->p += blksize;
1389 if (ring->p >= ring->end)
1390 ring->p = ring->start;
1391
1392 qptr = (qptr + 1) & ICH_LVI_MASK;
1393 if (ring->intr)
1394 ring->intr(ring->arg);
1395 }
1396 ring->qptr = qptr;
1397
1398 bus_space_write_1(sc->iot, sc->aud_ioh, pipe + ICH_LVI,
1399 (qptr - 1) & ICH_LVI_MASK);
1400 }
1401
1402 static int
1403 auich_trigger_output(void *v, void *start, void *end, int blksize,
1404 void (*intr)(void *), void *arg, const audio_params_t *param)
1405 {
1406 struct auich_softc *sc;
1407 struct auich_dma *p;
1408 size_t size;
1409
1410 DPRINTF(ICH_DEBUG_DMA,
1411 ("auich_trigger_output(%p, %p, %d, %p, %p, %p)\n",
1412 start, end, blksize, intr, arg, param));
1413 sc = v;
1414
1415 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next)
1416 continue;
1417 if (!p) {
1418 printf("auich_trigger_output: bad addr %p\n", start);
1419 return EINVAL;
1420 }
1421
1422 size = (size_t)((char *)end - (char *)start);
1423
1424 sc->pcmo.intr = intr;
1425 sc->pcmo.arg = arg;
1426 sc->pcmo.start = DMAADDR(p);
1427 sc->pcmo.p = sc->pcmo.start;
1428 sc->pcmo.end = sc->pcmo.start + size;
1429 sc->pcmo.blksize = blksize;
1430
1431 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMO + ICH_BDBAR,
1432 sc->sc_cddma + ICH_PCMO_OFF(0));
1433 auich_trigger_pipe(sc, ICH_PCMO, &sc->pcmo);
1434
1435 return 0;
1436 }
1437
1438 static int
1439 auich_trigger_input(void *v, void *start, void *end, int blksize,
1440 void (*intr)(void *), void *arg, const audio_params_t *param)
1441 {
1442 struct auich_softc *sc;
1443 struct auich_dma *p;
1444 size_t size;
1445
1446 DPRINTF(ICH_DEBUG_DMA,
1447 ("auich_trigger_input(%p, %p, %d, %p, %p, %p)\n",
1448 start, end, blksize, intr, arg, param));
1449 sc = v;
1450
1451 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next)
1452 continue;
1453 if (!p) {
1454 printf("auich_trigger_input: bad addr %p\n", start);
1455 return EINVAL;
1456 }
1457
1458 size = (size_t)((char *)end - (char *)start);
1459
1460 sc->pcmi.intr = intr;
1461 sc->pcmi.arg = arg;
1462 sc->pcmi.start = DMAADDR(p);
1463 sc->pcmi.p = sc->pcmi.start;
1464 sc->pcmi.end = sc->pcmi.start + size;
1465 sc->pcmi.blksize = blksize;
1466
1467 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_BDBAR,
1468 sc->sc_cddma + ICH_PCMI_OFF(0));
1469 auich_trigger_pipe(sc, ICH_PCMI, &sc->pcmi);
1470
1471 return 0;
1472 }
1473
1474 static int
1475 auich_powerstate(void *v, int state)
1476 {
1477 return 0;
1478 }
1479
1480 static int
1481 auich_allocmem(struct auich_softc *sc, size_t size, size_t align,
1482 struct auich_dma *p)
1483 {
1484 int error;
1485
1486 p->size = size;
1487 error = bus_dmamem_alloc(sc->dmat, p->size, align, 0,
1488 p->segs, sizeof(p->segs)/sizeof(p->segs[0]),
1489 &p->nsegs, BUS_DMA_NOWAIT);
1490 if (error)
1491 return error;
1492
1493 error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size,
1494 &p->addr, BUS_DMA_NOWAIT|sc->sc_dmamap_flags);
1495 if (error)
1496 goto free;
1497
1498 error = bus_dmamap_create(sc->dmat, p->size, 1, p->size,
1499 0, BUS_DMA_NOWAIT, &p->map);
1500 if (error)
1501 goto unmap;
1502
1503 error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size, NULL,
1504 BUS_DMA_NOWAIT);
1505 if (error)
1506 goto destroy;
1507 return 0;
1508
1509 destroy:
1510 bus_dmamap_destroy(sc->dmat, p->map);
1511 unmap:
1512 bus_dmamem_unmap(sc->dmat, p->addr, p->size);
1513 free:
1514 bus_dmamem_free(sc->dmat, p->segs, p->nsegs);
1515 return error;
1516 }
1517
1518 static int
1519 auich_freemem(struct auich_softc *sc, struct auich_dma *p)
1520 {
1521
1522 bus_dmamap_unload(sc->dmat, p->map);
1523 bus_dmamap_destroy(sc->dmat, p->map);
1524 bus_dmamem_unmap(sc->dmat, p->addr, p->size);
1525 bus_dmamem_free(sc->dmat, p->segs, p->nsegs);
1526 return 0;
1527 }
1528
1529 static int
1530 auich_alloc_cdata(struct auich_softc *sc)
1531 {
1532 bus_dma_segment_t seg;
1533 int error, rseg;
1534
1535 /*
1536 * Allocate the control data structure, and create and load the
1537 * DMA map for it.
1538 */
1539 if ((error = bus_dmamem_alloc(sc->dmat,
1540 sizeof(struct auich_cdata),
1541 PAGE_SIZE, 0, &seg, 1, &rseg, 0)) != 0) {
1542 aprint_error_dev(sc->sc_dev, "unable to allocate control data, error = %d\n", error);
1543 goto fail_0;
1544 }
1545
1546 if ((error = bus_dmamem_map(sc->dmat, &seg, rseg,
1547 sizeof(struct auich_cdata),
1548 (void **) &sc->sc_cdata,
1549 sc->sc_dmamap_flags)) != 0) {
1550 aprint_error_dev(sc->sc_dev, "unable to map control data, error = %d\n", error);
1551 goto fail_1;
1552 }
1553
1554 if ((error = bus_dmamap_create(sc->dmat, sizeof(struct auich_cdata), 1,
1555 sizeof(struct auich_cdata), 0, 0,
1556 &sc->sc_cddmamap)) != 0) {
1557 aprint_error_dev(sc->sc_dev, "unable to create control data DMA map, "
1558 "error = %d\n", error);
1559 goto fail_2;
1560 }
1561
1562 if ((error = bus_dmamap_load(sc->dmat, sc->sc_cddmamap,
1563 sc->sc_cdata, sizeof(struct auich_cdata),
1564 NULL, 0)) != 0) {
1565 aprint_error_dev(sc->sc_dev, "unable tp load control data DMA map, "
1566 "error = %d\n", error);
1567 goto fail_3;
1568 }
1569
1570 sc->pcmo.dmalist = sc->sc_cdata->ic_dmalist_pcmo;
1571 sc->pcmi.dmalist = sc->sc_cdata->ic_dmalist_pcmi;
1572 sc->mici.dmalist = sc->sc_cdata->ic_dmalist_mici;
1573
1574 return 0;
1575
1576 fail_3:
1577 bus_dmamap_destroy(sc->dmat, sc->sc_cddmamap);
1578 fail_2:
1579 bus_dmamem_unmap(sc->dmat, (void *) sc->sc_cdata,
1580 sizeof(struct auich_cdata));
1581 fail_1:
1582 bus_dmamem_free(sc->dmat, &seg, rseg);
1583 fail_0:
1584 return error;
1585 }
1586
1587 static bool
1588 auich_resume(device_t dv PMF_FN_ARGS)
1589 {
1590 struct auich_softc *sc = device_private(dv);
1591 pcireg_t v;
1592
1593 if (sc->sc_iose) {
1594 v = pci_conf_read(sc->sc_pc, sc->sc_pt, ICH_CFG);
1595 pci_conf_write(sc->sc_pc, sc->sc_pt, ICH_CFG,
1596 v | ICH_CFG_IOSE);
1597 }
1598
1599 v = pci_conf_read(sc->sc_pc, sc->sc_pt, PCI_COMMAND_STATUS_REG);
1600 if (sc->sc_csr_io)
1601 v |= PCI_COMMAND_IO_ENABLE;
1602 if (sc->sc_csr_mem)
1603 v |= PCI_COMMAND_MEM_ENABLE;
1604 pci_conf_write(sc->sc_pc, sc->sc_pt, PCI_COMMAND_STATUS_REG, v);
1605
1606 auich_reset_codec(sc);
1607 DELAY(1000);
1608 (sc->codec_if->vtbl->restore_ports)(sc->codec_if);
1609
1610 return true;
1611 }
1612
1613 /*
1614 * Calibrate card (some boards are overclocked and need scaling)
1615 */
1616 static void
1617 auich_calibrate(struct auich_softc *sc)
1618 {
1619 struct timeval t1, t2;
1620 uint8_t ociv, nciv;
1621 uint64_t wait_us;
1622 uint32_t actual_48k_rate, bytes, ac97rate;
1623 void *temp_buffer;
1624 struct auich_dma *p;
1625 u_int rate;
1626
1627 /*
1628 * Grab audio from input for fixed interval and compare how
1629 * much we actually get with what we expect. Interval needs
1630 * to be sufficiently short that no interrupts are
1631 * generated.
1632 */
1633
1634 /* Force the codec to a known state first. */
1635 sc->codec_if->vtbl->set_clock(sc->codec_if, 48000);
1636 rate = sc->sc_ac97_clock = 48000;
1637 sc->codec_if->vtbl->set_rate(sc->codec_if, AC97_REG_PCM_LR_ADC_RATE,
1638 &rate);
1639
1640 /* Setup a buffer */
1641 bytes = 64000;
1642 temp_buffer = auich_allocm(sc, AUMODE_RECORD, bytes, M_DEVBUF, M_WAITOK);
1643
1644 for (p = sc->sc_dmas; p && KERNADDR(p) != temp_buffer; p = p->next)
1645 continue;
1646 if (p == NULL) {
1647 printf("auich_calibrate: bad address %p\n", temp_buffer);
1648 return;
1649 }
1650 sc->pcmi.dmalist[0].base = DMAADDR(p);
1651 sc->pcmi.dmalist[0].len = (bytes >> sc->sc_sample_shift);
1652
1653 /*
1654 * our data format is stereo, 16 bit so each sample is 4 bytes.
1655 * assuming we get 48000 samples per second, we get 192000 bytes/sec.
1656 * we're going to start recording with interrupts disabled and measure
1657 * the time taken for one block to complete. we know the block size,
1658 * we know the time in microseconds, we calculate the sample rate:
1659 *
1660 * actual_rate [bps] = bytes / (time [s] * 4)
1661 * actual_rate [bps] = (bytes * 1000000) / (time [us] * 4)
1662 * actual_rate [Hz] = (bytes * 250000) / time [us]
1663 */
1664
1665 /* prepare */
1666 ociv = bus_space_read_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CIV);
1667 bus_space_write_4(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_BDBAR,
1668 sc->sc_cddma + ICH_PCMI_OFF(0));
1669 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_LVI,
1670 (0 - 1) & ICH_LVI_MASK);
1671
1672 /* start */
1673 microtime(&t1);
1674 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, ICH_RPBM);
1675
1676 /* wait */
1677 nciv = ociv;
1678 do {
1679 microtime(&t2);
1680 if (t2.tv_sec - t1.tv_sec > 1)
1681 break;
1682 nciv = bus_space_read_1(sc->iot, sc->aud_ioh,
1683 ICH_PCMI + ICH_CIV);
1684 } while (nciv == ociv);
1685 microtime(&t2);
1686
1687 /* stop */
1688 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, 0);
1689
1690 /* reset */
1691 DELAY(100);
1692 bus_space_write_1(sc->iot, sc->aud_ioh, ICH_PCMI + ICH_CTRL, ICH_RR);
1693
1694 /* turn time delta into us */
1695 wait_us = ((t2.tv_sec - t1.tv_sec) * 1000000) + t2.tv_usec - t1.tv_usec;
1696
1697 auich_freem(sc, temp_buffer, M_DEVBUF);
1698
1699 if (nciv == ociv) {
1700 printf("%s: ac97 link rate calibration timed out after %"
1701 PRIu64 " us\n", device_xname(sc->sc_dev), wait_us);
1702 return;
1703 }
1704
1705 actual_48k_rate = (bytes * UINT64_C(250000)) / wait_us;
1706
1707 if (actual_48k_rate < 50000)
1708 ac97rate = 48000;
1709 else
1710 ac97rate = ((actual_48k_rate + 500) / 1000) * 1000;
1711
1712 printf("%s: measured ac97 link rate at %d Hz",
1713 device_xname(sc->sc_dev), actual_48k_rate);
1714 if (ac97rate != actual_48k_rate)
1715 printf(", will use %d Hz", ac97rate);
1716 printf("\n");
1717
1718 sc->sc_ac97_clock = ac97rate;
1719 }
1720
1721 static void
1722 auich_clear_cas(struct auich_softc *sc)
1723 {
1724 /* Clear the codec access semaphore */
1725 (void)bus_space_read_2(sc->iot, sc->mix_ioh,
1726 AC97_REG_RESET * (sc->sc_codecnum * ICH_CODEC_OFFSET));
1727
1728 return;
1729 }
NetBSD on the FriendlyARM MINI2440