2 * Copyright (C) 2001-2003 by NBMK Encryption Technologies.
5 * NBMK Encryption Technologies provides no support of any kind for
6 * this software. Questions or concerns about it may be addressed to
7 * the members of the relevant open-source community at
8 * <tech-crypto@netbsd.org>.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions are
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above
18 * copyright notice, this list of conditions and the following
19 * disclaimer in the documentation and/or other materials provided
20 * with the distribution.
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 static char const n8_id
[] = "$Id: QMgrInit.c,v 1.1 2008/10/30 12:02:14 darran Exp $";
36 /*****************************************************************************/
38 * @brief This file contains the hardware independent initialization code
39 * for the NetOctave queue structures.
41 *****************************************************************************/
43 /*****************************************************************************
45 * 05/15/03 brr Do not include obsolete driver_api.h.
46 * 02/20/03 brr Eliminated all references to shared memory.
47 * 11/25/02 brr Removed the updateAllSem and made initialization/removal
49 * 06/05/02 brr Init waitQueues & moved N8_QMgrQueryStatistics to QMUtil.c
50 * 05/30/02 brr Removed initialization of obsolete fields in queue struct.
51 * 05/02/02 brr Added requestsPreempted stat.
52 * 05/17/02 brr Removed references to hardwareAccessSem.
53 * 05/02/02 brr Moved all SKS initialization to SKS_Init.
54 * 05/01/02 brr Initialize sizeMask & haltingMask.
55 * 03/27/02 brr Removed references to driverHandle.
56 * 03/21/02 mmd Added N8_QMgrQueryStatistics.
57 * 03/07/02 brr Removed dependencies on n8_enum.
58 * 03/01/02 brr Removed obsolete references to driver handle and process
59 * initialization semaphore. Changed queue semaphore to a
60 * kernel type semaphore.
61 * 02/18/02 brr Removed obsolete context memory initialization.
62 * 02/19/02 msz No more randomParmSem.
63 * 02/13/02 brr Moved several functions from QMUtil to here since they are
64 * needed by the driver.
65 * 01/22/02 spm Added creation of SKS semaphore for PK.
66 * 01/17/02 brr Original version.
67 ****************************************************************************/
70 #include "n8_malloc_common.h"
71 #include "n8_enqueue_common.h"
72 #include "n8_OS_intf.h"
74 #include "n8_driver_main.h"
77 #include "n8_driver_parms.h"
79 /*****************************************************************************
81 *****************************************************************************/
83 * @brief These are the globals used by the open and intialization code in
86 * Internal Globals are to be used only within this file.
88 * queueTable_g The global queue table which contains the state needed to
89 * maintain each queue. There is one queue for each execution
90 * unit, and one execution unit for each FPGA board.
92 *****************************************************************************/
94 /* The one and only global queue structure */
95 struct QueueControlTable_s queueTable_g
= {0, 0, 0};
97 /* The queue control tables. They are now based on the maximum number */
98 /* of devices that can be present in the system. */
100 QueueControlSet_t QueueControlSets_g
[DEF_MAX_SIMON_INSTANCES
];
102 extern NspInstance_t NSPDeviceTable_g
[];
103 extern n8_atomic_t requestsComplete
;
105 /*****************************************************************************
106 * QMgr_init_control_sets
107 *****************************************************************************/
109 * @brief This function sets initial values for variables in the control set
112 * The current fields being set are driverHandle, type and queue_initialized.
113 * All of the rest of the fields will be zero since our N8_MALLOC uses
116 * @param table_p RW: Pointer to the table to initialize. Right now there is
123 * N8_STATUS_OK: The function worked correctly.
124 * N8_INVALID_PARAMETER: The input pointer was NULL.
128 * This function will return N8_INVALID_PARAMETER if the input parameter
132 * This function assumes the process initialization lock is held.
135 * Unless table_p is NULL, we assume it is a "reasonable" pointer.
136 * Shared per execution unit data has already been allocated.
138 *****************************************************************************/
143 QMgr_init_control_set(QueueControlTable_t
*table_p
, int i
)
146 QueueControl_t
*queue_p
;
147 QueueControl_t
*queuePK_p
;
148 QueueControl_t
*queueRN_p
;
149 QueueControl_t
*queueEA_p
;
150 NspInstance_t
*NSPData_p
;
153 n8_atomic_set(requestsComplete
, 0);
155 queuePK_p
= &table_p
->controlSets_p
[i
][N8_PKP
];
156 queueRN_p
= &table_p
->controlSets_p
[i
][N8_RNG
];
157 queueEA_p
= &table_p
->controlSets_p
[i
][N8_EA
];
159 /* Initialize data that is generic across queue type. */
160 for (j
= 0; j
< N8_NUM_COMPONENTS
; j
++)
162 queue_p
= &table_p
->controlSets_p
[i
][j
];
163 queue_p
->hardwareType
= N8_NSP2000_HW
;
167 queuePK_p
->type
= N8_PKP
;
168 queueRN_p
->type
= N8_RNG
;
169 queueEA_p
->type
= N8_EA
;
171 /* Initialize the semaphores */
172 for (j
= 0; j
< N8_NUM_COMPONENTS
; j
++)
174 queue_p
= &table_p
->controlSets_p
[i
][j
];
175 N8_AtomicLockInit(queue_p
->queueControlSem
);
179 /* FETCH DEVICE RESOURCE INFORMATION FROM THE DRIVER */
180 NSPData_p
= &NSPDeviceTable_g
[i
];
182 /* Setup the register and queue pointers for this unit */
183 queueEA_p
->n8reg_p
= (N8CommonRegs_t
*)((int)NSPData_p
->NSPregs_p
+ EA_REG_OFFSET
);
184 queueEA_p
->cmdQueVirtPtr
= (unsigned long)NSPData_p
->EAqueue_p
;
185 queueEA_p
->EAq_head_p
= (EA_CMD_BLOCK_t
*)queueEA_p
->cmdQueVirtPtr
;
186 queueEA_p
->sizeOfQueue
= NSPData_p
->EAqueue_size
;
187 queueEA_p
->sizeMask
= NSPData_p
->EAqueue_size
-1;
189 /* Setup the command entry size */
190 queueEA_p
->cmdEntrySize
= sizeof(EA_CMD_BLOCK_t
);
192 /* Setup the register and queue pointers for this unit */
193 queuePK_p
->n8reg_p
= (N8CommonRegs_t
*)((int)NSPData_p
->NSPregs_p
+ PKE_REG_OFFSET
);
194 queuePK_p
->cmdQueVirtPtr
= (unsigned long)NSPData_p
->PKqueue_p
;
195 queuePK_p
->PKq_head_p
= (PK_CMD_BLOCK_t
*)queuePK_p
->cmdQueVirtPtr
;
196 queuePK_p
->sizeOfQueue
= NSPData_p
->PKqueue_size
;
197 queuePK_p
->sizeMask
= NSPData_p
->PKqueue_size
-1;
199 /* Setup the command entry size */
200 queuePK_p
->cmdEntrySize
= sizeof(PK_CMD_BLOCK_t
);
203 /* Setup the register and queue pointers for this unit */
204 queueRN_p
->rngReg_p
= (N8RNGRegs_t
*)((int)NSPData_p
->NSPregs_p
+ RNG_REG_OFFSET
);
205 queueRN_p
->cmdQueVirtPtr
= (unsigned long)NSPData_p
->RNqueue_p
;
206 queueRN_p
->sizeOfQueue
= NSPData_p
->RNqueue_size
;
207 queueRN_p
->sizeMask
= NSPData_p
->RNqueue_size
-1;
209 /* Initialize the wait queues */
210 for (j
= 0; j
< MAX_API_REQS
; j
++)
212 N8_InitWaitQueue(&queueEA_p
->waitQueue
[j
]);
213 N8_InitWaitQueue(&queuePK_p
->waitQueue
[j
]);
216 /* Retrieve the read index location from the driver's data structure */
217 queueEA_p
->readIndex_p
= &NSPData_p
->EAreadIndex
;
218 queuePK_p
->readIndex_p
= &NSPData_p
->PKreadIndex
;
220 } /* QMgr_init_control_set */
224 /*****************************************************************************
226 *****************************************************************************/
228 * @brief Initialize the queue structures used by the NSP2000.
230 * This sets up the queue control structures used by the NSP hardware.
232 * @param index RO: Index of a global hardware instance.
235 * queueTable_g: RW: The global queue control table.
238 * N8_STATUS_OK: The function succeeded.
239 * N8_MALLOC_FAILED: Memory allocation failure.
242 * All error codes are returned including N8_MALLOC_FAILED if the function
243 * fails to allocate space for the global queue control table, and whatever
244 * error conditions are returned by the functions listed above.
247 * This function starts by grabbing the process initialization lock and
248 * holds it until the end of the function.
251 * The call of this function IS NOT holding the process initialization
253 * Devices are all NSPs.
254 * This is called exactly once per hardware instance.
256 *****************************************************************************/
258 N8_Status_t
QMgrInit(uint32_t index
)
261 N8_Status_t results
= N8_STATUS_OK
;
264 /* Set up the pointer to the control sets in the global queue table. */
265 /* Allocate controls sets, the size is based on the maximum number */
266 /* of possible devices in the system. */
267 if ( queueTable_g
.controlSets_p
== NULL
)
269 memset(&QueueControlSets_g
, 0, sizeof(QueueControlSets_g
));
270 queueTable_g
.controlSets_p
= QueueControlSets_g
;
271 /* Set the current control set to be the first control set. */
272 queueTable_g
.currentSet
= 0;
275 /* Set the number of control sets */
276 queueTable_g
.nControlSets
++;
278 /* Initialize the control set for our hardware */
279 QMgr_init_control_set(&queueTable_g
,index
);
285 /*****************************************************************************
287 *****************************************************************************/
289 * @brief Deallocate the queue structures used by the NSP2000.
291 * This sets deallocates the queue control structures used by the NSP hardware.
293 * @param index RO: Index of a global hardware instance.
296 * queueTable_g: RW: The global queue control table.
299 * N8_STATUS_OK: The function succeeded.
306 * The call is called by the driver's exit handler and will delete the
307 * QMgr's resources. It therefore cannot obtain any locks and assumes
308 * the caller has ensured it is safe to deallocate these resources.
310 *****************************************************************************/
312 N8_Status_t
QMgrRemove(uint32_t index
)
315 QueueControl_t
*queuePK_p
;
316 QueueControl_t
*queueRN_p
;
317 QueueControl_t
*queueEA_p
;
319 queuePK_p
= &queueTable_g
.controlSets_p
[index
][N8_PKP
];
320 queueRN_p
= &queueTable_g
.controlSets_p
[index
][N8_RNG
];
321 queueEA_p
= &queueTable_g
.controlSets_p
[index
][N8_EA
];
323 /* Delete the queue control semaphores. */
324 N8_AtomicLockDel(queuePK_p
->queueControlSem
);
325 N8_AtomicLockDel(queueRN_p
->queueControlSem
);
326 N8_AtomicLockDel(queueEA_p
->queueControlSem
);
328 /* Remove the wait queues */
329 for (j
= 0; j
< MAX_API_REQS
; j
++)
331 N8_DelWaitQueue(queuePK_p
->waitQueue
[j
]);
332 N8_DelWaitQueue(queueEA_p
->waitQueue
[j
]);