sys/dev/pci/n8/include_private/n8_ea_common.h

   1 /*-
   2  * Copyright (C) 2001-2003 by NBMK Encryption Technologies.
   3  * All rights reserved.
   4  *
   5  * NBMK Encryption Technologies provides no support of any kind for
   6  * this software.  Questions or concerns about it may be addressed to
   7  * the members of the relevant open-source community at
   8  * <tech-crypto@netbsd.org>.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions are
  12  * met:
  13  *
  14  * 1. Redistributions of source code must retain the above copyright
  15  *    notice, this list of conditions and the following disclaimer.
  16  *
  17  * 2. Redistributions in binary form must reproduce the above
  18  *    copyright notice, this list of conditions and the following
  19  *    disclaimer in the documentation and/or other materials provided
  20  *    with the distribution.
  21  *
  22  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  23  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  24  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  25  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  26  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  27  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  28  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  29  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  30  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  32  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33  */
  34
  35 /*****************************************************************************
  36  * @(#) n8_ea_common.h 1.16@(#)
  37  *****************************************************************************/
  38
  39 /*****************************************************************************/
  40 /** @file n8_ea_common.h
  41  *  @brief Crypto controller command queue interface.
  42  *
  43  *****************************************************************************/
  44
  45 /*****************************************************************************
  46  * Revision history:
  47  * 05/15/03 brr   Added masks for command & bus errors.
  48  * 12/07/01 bac   Fixed NSP2000 Bug #10 -- corrected EA_Ctx_Addr_Address_Mask
  49  * 07/05/01 dws   Added context index mask values.
  50  * 06/05/01 mlando Added EA_TLS10_CMD_BLOCK_t.
  51  * 06/05/01 dws   Changed word 19 of EA_IPSEC_CMD_BLOCK_t to reserved1.
  52  * 06/04/01 dws   Changed the value of EA_Result_MAC_Mismatch, added a
  53  *                constant EA_Result_Pad_Error.
  54  * 05/15/01 dws   Changed the ARC4 i & j mask and shift count defines to move
  55  *                i and j to the most-significant 16 bits of word 20 of the
  56  *                ARC4 context.
  57  * 05/14/01 dws   Increased the EA maximum data sizes to 18K for SSL decrypt
  58  *                and 17K for encrypt.
  59  * 05/11/01 bac   Added EA_SSL30_DES_MD5_CMD_BLOCK_t and
  60  *                EA_SSL30_DECRYPT_RESULT_CMD_BLOCK_t
  61  * 05/10/01 dws   Byte-swapped MD5 default IVs.
  62  * 04/16/01 jke   moved enqueue retvals from retval genericized names
  63  * 04/09/01 dws   Added secret/precompute fields to the EA_ARC4_CTX
  64  *                structure. These are words 6-13, used for SSL3.0
  65  *                record layer operations.
  66  * 03/30/01 dws   Original version.
  67  ****************************************************************************/
  68
  69 #ifndef N8_EA_COMMON_H
  70 #define N8_EA_COMMON_H
  71
  72 #include "n8_common.h"
  73
  74 /* Crypto controller generic command block */
  75 typedef struct {
  76     uint32_t cp_si_context;                    /* word  0      */
  77     uint32_t opcode_iter_length;               /* word  1      */
  78     uint32_t read_data_addr_ms;                /* word  2      */
  79     uint32_t read_data_addr_ls;                /* word  3      */
  80     uint32_t write_data_addr_ms;               /* word  4      */
  81     uint32_t write_data_addr_ls;               /* word  5      */
  82     uint32_t hash_IV[5];                       /* word  6 - 10 */
  83     uint32_t prev_length_ms;                   /* word 11      */
  84     uint32_t prev_length_ls;                   /* word 12      */
  85     uint32_t reserved1[7];                     /* word 13 - 19 */
  86     uint32_t des_IV_ms;                        /* word 20      */
  87     uint32_t des_IV_ls;                        /* word 21      */
  88     uint32_t reserved3[2];                     /* word 22 - 23 */
  89     uint32_t des_key1_ms;                      /* word 24      */
  90     uint32_t des_key1_ls;                      /* word 25      */
  91     uint32_t des_key2_ms;                      /* word 26      */
  92     uint32_t des_key2_ls;                      /* word 27      */
  93     uint32_t des_key3_ms;                      /* word 28      */
  94     uint32_t des_key3_ls;                      /* word 29      */
  95     uint32_t reserved2[2];                     /* word 30 - 31 */
  96 } EA_CMD_BLOCK_t;
  97
  98 /* Crypto controller SSL3.0 Packet-level command block */
  99 typedef struct {
 100     uint32_t cp_si_context;                    /* word  0      */
 101     uint32_t opcode_iter_length;               /* word  1      */
 102     uint32_t read_data_addr_ms;                /* word  2      */
 103     uint32_t read_data_addr_ls;                /* word  3      */
 104     uint32_t write_data_addr_ms;               /* word  4      */
 105     uint32_t write_data_addr_ls;               /* word  5      */
 106     uint32_t write_secret[5];                  /* word  6 - 10 */
 107     uint32_t mac[5];                           /* word 11 - 15 */
 108     uint32_t sequence_number[2];               /* word 16 - 17 */
 109     uint32_t result_type;                      /* word 18      */
 110     uint32_t SSL_version_length;               /* word 19      */
 111     uint32_t des_IV_ms;                        /* word 20      */
 112     uint32_t des_IV_ls;                        /* word 21      */
 113     uint32_t reserved2[2];                     /* word 22 - 23 */
 114     uint32_t des_key1_ms;                      /* word 24      */
 115     uint32_t des_key1_ls;                      /* word 25      */
 116     uint32_t des_key2_ms;                      /* word 26      */
 117     uint32_t des_key2_ls;                      /* word 27      */
 118     uint32_t des_key3_ms;                      /* word 28      */
 119     uint32_t des_key3_ls;                      /* word 29      */
 120     uint32_t reserved3[2];                     /* word 30 - 31 */
 121 } EA_SSL30_CMD_BLOCK_t;
 122
 123 /* Crypto controller SSL3.0 Packet-level command block */
 124 typedef struct {
 125    uint32_t cp_si_context;                    /* word  0      */
 126    uint32_t opcode_iter_length;               /* word  1      */
 127    uint32_t read_data_addr_ms;                /* word  2      */
 128    uint32_t read_data_addr_ls;                /* word  3      */
 129    uint32_t write_data_addr_ms;               /* word  4      */
 130    uint32_t write_data_addr_ls;               /* word  5      */
 131    uint32_t precompute1[4];                   /* word  6 - 9  */
 132    uint32_t reserved1;                        /* word 10      */
 133    uint32_t precompute2[4];                   /* word 11 - 14 */
 134    uint32_t reserved2;                        /* word 15      */
 135    uint32_t sequence_number[2];               /* word 16 - 17 */
 136    uint32_t result_type;                      /* word 18      */
 137    uint32_t SSL_version_length;               /* word 19      */
 138    uint32_t des_IV_ms;                        /* word 20      */
 139    uint32_t des_IV_ls;                        /* word 21      */
 140    uint32_t reserved3[2];                     /* word 22 - 23 */
 141    uint32_t des_key1_ms;                      /* word 24      */
 142    uint32_t des_key1_ls;                      /* word 25      */
 143    uint32_t des_key2_ms;                      /* word 26      */
 144    uint32_t des_key2_ls;                      /* word 27      */
 145    uint32_t des_key3_ms;                      /* word 28      */
 146    uint32_t des_key3_ls;                      /* word 29      */
 147    uint32_t reserved4[2];                     /* word 30 - 31 */
 148 } EA_SSL30_DES_MD5_CMD_BLOCK_t;
 149
 150 /* Crypto controller TLS Packet-level command block */
 151 typedef struct {
 152    uint32_t cp_si_context;                    /* word  0      */
 153    uint32_t opcode_iter_length;               /* word  1      */
 154    uint32_t read_data_addr_ms;                /* word  2      */
 155    uint32_t read_data_addr_ls;                /* word  3      */
 156    uint32_t write_data_addr_ms;               /* word  4      */
 157    uint32_t write_data_addr_ls;               /* word  5      */
 158    uint32_t ipad[5];                          /* word  6 - 10 */
 159    uint32_t opad[5];                          /* word 11 - 15 */
 160    uint32_t sequence_number[2];               /* word 16 - 17 */
 161    uint32_t result_type;                      /* word 18      */
 162    uint32_t SSL_version_length;               /* word 19      */
 163    uint32_t des_IV_ms;                        /* word 20      */
 164    uint32_t des_IV_ls;                        /* word 21      */
 165    uint32_t reserved3[2];                     /* word 22 - 23 */
 166    uint32_t des_key1_ms;                      /* word 24      */
 167    uint32_t des_key1_ls;                      /* word 25      */
 168    uint32_t des_key2_ms;                      /* word 26      */
 169    uint32_t des_key2_ls;                      /* word 27      */
 170    uint32_t des_key3_ms;                      /* word 28      */
 171    uint32_t des_key3_ls;                      /* word 29      */
 172    uint32_t reserved4[2];                     /* word 30 - 31 */
 173 } EA_TLS10_CMD_BLOCK_t;
 174
 175 /* Crypto controller SSL Decrypt results write-back */
 176 typedef struct {
 177    uint32_t reserved1[11];                    /* word   0 - 10 */
 178    uint32_t mac[4];                           /* word  11 - 14 */
 179    uint32_t reserved2;                        /* word  15      */
 180    uint32_t sequence_number[2];               /* word  16 - 17 */
 181    uint32_t mismatch;                         /* word  18      */
 182    uint32_t reserved3[13];                    /* word  19 - 31 */
 183 } EA_SSL30_DECRYPT_RESULT_CMD_BLOCK_t;
 184
 185 /* Crypto controller IPSec ESP Packet-level command block */
 186 typedef struct {
 187     uint32_t cp_si_context;                    /* word  0      */
 188     uint32_t opcode_iter_length;               /* word  1      */
 189     uint32_t read_data_addr_ms;                /* word  2      */
 190     uint32_t read_data_addr_ls;                /* word  3      */
 191     uint32_t write_data_addr_ms;               /* word  4      */
 192     uint32_t write_data_addr_ls;               /* word  5      */
 193     uint32_t ipad[5];                          /* word  6 - 10 */
 194     uint32_t opad[5];                          /* word 11 - 15 */
 195     uint32_t SPI;                              /* word 16      */
 196     uint32_t sequence_number;                  /* word 17      */
 197     uint32_t result;                           /* word 18      */
 198     uint32_t reserved1;                        /* word 19      */
 199     uint32_t des_IV_ms;                        /* word 20      */
 200     uint32_t des_IV_ls;                        /* word 21      */
 201     uint32_t reserved2[2];                     /* word 22 - 23 */
 202     uint32_t des_key1_ms;                      /* word 24      */
 203     uint32_t des_key1_ls;                      /* word 25      */
 204     uint32_t des_key2_ms;                      /* word 26      */
 205     uint32_t des_key2_ls;                      /* word 27      */
 206     uint32_t des_key3_ms;                      /* word 28      */
 207     uint32_t des_key3_ls;                      /* word 29      */
 208     uint32_t reserved3[2];                     /* word 30 - 31 */
 209 } EA_IPSEC_CMD_BLOCK_t;
 210
 211 /* Crypto controller HMAC command block */
 212 typedef struct {
 213     uint32_t cp_si_context;                    /* word  0      */
 214     uint32_t opcode_iter_length;               /* word  1      */
 215     uint32_t read_data_addr_ms;                /* word  2      */
 216     uint32_t read_data_addr_ls;                /* word  3      */
 217     uint32_t write_data_addr_ms;               /* word  4      */
 218     uint32_t write_data_addr_ls;               /* word  5      */
 219     uint32_t hmac_key[16];                     /* word  6 - 21 */
 220     uint32_t reserved[10];                     /* word 22 - 31 */
 221 } EA_HMAC_CMD_BLOCK_t;
 222
 223
 224 /* Crypto controller Master Secret Hash command block */
 225 typedef struct {
 226     uint32_t cp_si_context;                    /* word  0      */
 227     uint32_t opcode_iter_length;               /* word  1      */
 228     uint32_t read_data_addr_ms;                /* word  2      */
 229     uint32_t read_data_addr_ls;                /* word  3      */
 230     uint32_t write_data_addr_ms;               /* word  4      */
 231     uint32_t write_data_addr_ls;               /* word  5      */
 232     uint32_t random1[8];                       /* word  6 - 13 */
 233     uint32_t random2[8];                       /* word 14 - 21 */
 234     uint32_t reserved[12];                     /* word 22 - 31 */
 235 } EA_MSH_CMD_BLOCK_t;
 236
 237 /* Field mask and shift contants */
 238 #define EA_Cmd_CP_Mask                       0x80000000
 239 #define EA_Cmd_SI_Mask                       0x40000000
 240 #define EA_Cmd_Context_Index_Mask            0x0003ffff
 241 #define EA_Context_Index_Mask_256            0x0003ffff
 242 #define EA_Context_Index_Mask_128            0x0001ffff
 243 #define EA_Context_Index_Mask_64             0x0000ffff
 244
 245 #define EA_Cmd_Opcode_Mask                   0xff000000
 246 #define EA_Cmd_Iterations_Shift              16
 247 #define EA_Cmd_Iterations_Mask               0x000f0000
 248 #define EA_Cmd_Data_Length_Mask              0x0000ffff
 249
 250 #define EA_Cmd_SSL_Type_Mask                 0x000000ff
 251 #define EA_Cmd_SSL_Version_Mask              0xffff0000
 252 #define EA_Cmd_SSL_Version_Shift             16
 253 #define EA_Cmd_SSL_Length_Mask               0x0000ffff
 254
 255 #define EA_Cmd_Result_Mask                   0xf0000000
 256
 257 /* Result definitions */
 258 #define EA_Result_MAC_Mismatch               0x80000000
 259 #define EA_Result_Pad_Error                  0x40000000
 260 #define EA_IPSec_MAC_Mismatch                0x80000000
 261
 262 /* Opcode definitions - already shifted */
 263 #define EA_Cmd_NOP                           0x00000000
 264 #define EA_Cmd_Write_Context_Memory          0x01000000
 265 #define EA_Cmd_Read_Context_Memory           0x02000000
 266
 267 #define EA_Cmd_3DES_CBC_Encrypt              0x03000000
 268 #define EA_Cmd_3DES_CBC_Decrypt              0x04000000
 269 #define EA_Cmd_ARC4                          0x05000000
 270
 271 #define EA_Cmd_MD5                           0x10000000
 272 #define EA_Cmd_MD5_SSL30_Finish              0x11000000
 273 #define EA_Cmd_MD5_Mid_cmdIV                 0x12000000
 274 #define EA_Cmd_MD5_Mid_lhrIV                 0x13000000
 275 #define EA_Cmd_MD5_End_cmdIV                 0x14000000
 276 #define EA_Cmd_MD5_End_lhrIV                 0x15000000
 277 #define EA_Cmd_MD5_IPSEC_KEYMAT              0x16000000
 278 #define EA_Cmd_MD5_IPSEC_SKEYID              0x17000000
 279 #define EA_Cmd_MD5_HMAC                      0x18000000
 280
 281 #define EA_Cmd_SHA1                          0x20000000
 282 #define EA_Cmd_SHA1_SSL30_Finish             0x21000000
 283 #define EA_Cmd_SHA1_Mid_cmdIV                0x22000000
 284 #define EA_Cmd_SHA1_Mid_lhrIV                0x23000000
 285 #define EA_Cmd_SHA1_End_cmdIV                0x24000000
 286 #define EA_Cmd_SHA1_End_lhrIV                0x25000000
 287 #define EA_Cmd_SHA1_IPSEC_KEYMAT             0x26000000
 288 #define EA_Cmd_SHA1_IPSEC_SKEYID             0x27000000
 289 #define EA_Cmd_SHA1_HMAC                     0x28000000
 290
 291 #define EA_Cmd_SSL30_Master_Secret_Hash      0x30000000
 292
 293 /* Packet level commands */
 294 #define EA_Cmd_Null_Null                     0x80000000
 295 #define EA_Cmd_SSL30_ARC4_MD5_Encrypt        0x81000000
 296 #define EA_Cmd_SSL30_3DES_MD5_Encrypt        0x82000000
 297 #define EA_Cmd_SSL30_ARC4_SHA1_Encrypt       0x83000000
 298 #define EA_Cmd_SSL30_3DES_SHA1_Encrypt       0x84000000
 299 #define EA_Cmd_SSL30_ARC4_MD5_Decrypt        0x91000000
 300 #define EA_Cmd_SSL30_3DES_MD5_Decrypt        0x92000000
 301 #define EA_Cmd_SSL30_ARC4_SHA1_Decrypt       0x93000000
 302 #define EA_Cmd_SSL30_3DES_SHA1_Decrypt       0x94000000
 303
 304 #define EA_Cmd_TLS10_ARC4_MD5_Encrypt        0xa1000000
 305 #define EA_Cmd_TLS10_3DES_MD5_Encrypt        0xa2000000
 306 #define EA_Cmd_TLS10_ARC4_SHA1_Encrypt       0xa3000000
 307 #define EA_Cmd_TLS10_3DES_SHA1_Encrypt       0xa4000000
 308 #define EA_Cmd_TLS10_ARC4_MD5_Decrypt        0xb1000000
 309 #define EA_Cmd_TLS10_3DES_MD5_Decrypt        0xb2000000
 310 #define EA_Cmd_TLS10_ARC4_SHA1_Decrypt       0xb3000000
 311 #define EA_Cmd_TLS10_3DES_SHA1_Decrypt       0xb4000000
 312
 313 #define EA_Cmd_ESP_3DES_MD5_Encrypt          0xc1000000
 314 #define EA_Cmd_ESP_3DES_SHA1_Encrypt         0xc2000000
 315 #define EA_Cmd_ESP_3DES_MD5_Decrypt          0xd1000000
 316 #define EA_Cmd_ESP_3DES_SHA1_Decrypt         0xd2000000
 317
 318 /* Assorted field length constants */
 319 #define EA_Sequence_Number_Length            8
 320 #define EA_Protocol_Length                   1
 321 #define EA_Version_Length                    2
 322 #define EA_Packet_Length_Length              2
 323
 324 #define EA_ESP_Key_Length                    16
 325 #define EA_SPI_Length                        4
 326 #define EA_ESP_Sequence_Number_Length        4
 327 #define EA_DES_IV_Length                     8
 328 #define EA_Random_Length                     32
 329
 330 #define EA_HMAC_Key_Length                   64
 331 #define EA_MD5_Hash_Length                   16
 332 #define EA_MD5_Block_Length                  64
 333 #define EA_MD5_Block_Length_Mask             0x3f
 334 #define EA_MD5_Block_Bit_Length_Mask         0x1ff
 335 #define EA_SHA1_Hash_Length                  20
 336 #define EA_SHA1_Block_Length                 64
 337 #define EA_SHA1_Block_Length_Mask            0x3f
 338 #define EA_SHA1_Block_Bit_Length_Mask        0x1ff
 339
 340 #define EA_DES_Block_Length                  8
 341 #define EA_DES_Block_Length_Mask             0x07
 342 #define EA_Max_Data_Length                   0x4800
 343 #define EA_SSL_Encrypt_Max_Data_Length       0x4400
 344 #define EA_SSL_Decrypt_Max_Data_Length       0x4800
 345 #define EA_SSL_ARC4_MD5_Decrypt_Min_Length   16
 346 #define EA_SSL_DES_MD5_Decrypt_Min_Length    24
 347 #define EA_SSL_ARC4_SHA1_Decrypt_Min_Length  20
 348 #define EA_SSL_DES_SHA1_Decrypt_Min_Length   24
 349
 350 #define EA_ESP_Encrypt_Min_Data_Length       8
 351 #define EA_ESP_Decrypt_Min_Data_Length       20
 352
 353 #define EA_IPSEC_ESP_MAC_Length              12
 354
 355 /* default hash IVs */
 356 #define EA_MD5_IV_0                          0x01234567
 357 #define EA_MD5_IV_1                          0x89abcdef
 358 #define EA_MD5_IV_2                          0xfedcba98
 359 #define EA_MD5_IV_3                          0x76543210
 360
 361 #define EA_SHA1_IV_0                         0x67452301
 362 #define EA_SHA1_IV_1                         0xefcdab89
 363 #define EA_SHA1_IV_2                         0x98badcfe
 364 #define EA_SHA1_IV_3                         0x10325476
 365 #define EA_SHA1_IV_4                         0xc3d2e1f0
 366
 367
 368 /* Context memory constants */
 369 #define EA_CTX_Record_Word_Length            128
 370 #define EA_CTX_Record_Byte_Length            512
 371
 372 /* ARC4 context format */
 373 typedef struct {
 374    uint32_t reserved1[6];                      /* word  0 - 5   */
 375    uint32_t secret1[5];                        /* word  6 - 10  */
 376    uint32_t secret2[5];                        /* word 11 - 15  */
 377    uint32_t sequence_number[2];                /* word 16 - 17  */
 378    uint32_t reserved3[2];                      /* word 18 - 19  */
 379    uint32_t i_j;                               /* word 20       */
 380    uint32_t s_box[64];                         /* word 21 - 84  */
 381    uint32_t reserved4[43];                     /* word 85 - 127 */
 382 } EA_ARC4_CTX;
 383
 384 #define EA_CTX_I_Mask                        0xff000000
 385 #define EA_CTX_I_Shift                       24
 386 #define EA_CTX_J_Mask                        0x00ff0000
 387 #define EA_CTX_J_Shift                       16
 388
 389 /* SSL 3.0 & TLS 1.0 packet level context format */
 390 typedef struct {
 391    uint32_t reserved1[6];                      /* word  0 - 5   */
 392    uint32_t secret1[5];                        /* word  6 - 10  */
 393    uint32_t secret2[5];                        /* word 11 - 15  */
 394    uint32_t sequence_number[2];                /* word 16 - 17  */
 395    uint32_t reserved3[2];                      /* word 18 - 19  */
 396    uint32_t des_IV_ms;                         /* word 20       */
 397    uint32_t des_IV_ls;                         /* word 21       */
 398    uint32_t reserved4[2];                      /* word 22 - 23  */
 399    uint32_t des_key1_ms;                       /* word 24       */
 400    uint32_t des_key1_ls;                       /* word 25       */
 401    uint32_t des_key2_ms;                       /* word 26       */
 402    uint32_t des_key2_ls;                       /* word 27       */
 403    uint32_t des_key3_ms;                       /* word 28       */
 404    uint32_t des_key3_ls;                       /* word 29       */
 405    uint32_t reserved5[98];                     /* word 30 - 127 */
 406 } EA_SSL30_CTX;
 407
 408 /* IPSec ESP context format */
 409 typedef struct {
 410    uint32_t reserved1[6];                      /* word  0 - 5   */
 411    uint32_t ipad[5];                           /* word  6 - 10  */
 412    uint32_t opad[5];                           /* word 11 - 15  */
 413    uint32_t reserved2[8];                      /* word 16 - 23  */
 414    uint32_t des_key1_ms;                       /* word 24       */
 415    uint32_t des_key1_ls;                       /* word 25       */
 416    uint32_t des_key2_ms;                       /* word 26       */
 417    uint32_t des_key2_ls;                       /* word 27       */
 418    uint32_t des_key3_ms;                       /* word 28       */
 419    uint32_t des_key3_ls;                       /* word 29       */
 420    uint32_t reserved3[98];                     /* word 30 - 127 */
 421 } EA_IPSEC_CTX;
 422
 423 /* Status values for config/status register */
 424 #define EA_Status_Module_Enable              0x80000000
 425 #define EA_Status_Module_Busy                0x40000000
 426
 427 #define EA_Status_Q_Align_Error              0x00008000
 428 #define EA_Status_Cmd_Complete               0x00004000
 429 #define EA_Status_Opcode_Error               0x00002000
 430 #define EA_Status_CMD_Read_Error             0x00001000
 431 #define EA_Status_CMD_Write_Error            0x00000800
 432 #define EA_Status_Data_Read_Error            0x00000400
 433 #define EA_Status_Data_Write_Error           0x00000200
 434 #define EA_Status_EA_Length_Error            0x00000100
 435 #define EA_Status_Data_Length_Error          0x00000080
 436 #define EA_Status_EA_DES_Error               0x00000040
 437 #define EA_Status_DES_Size_Error             0x00000020
 438 #define EA_Status_DES_Parity_Error           0x00000010
 439 #define EA_Status_ARC4_Error                 0x00000008
 440 #define EA_Status_MD5_Error                  0x00000004
 441 #define EA_Status_SHA1_Error                 0x00000002
 442 #define EA_Status_Access_Error               0x00000001
 443
 444 #define EA_Status_Any_Condition_Mask         0x0000ffff
 445 #define EA_Status_Any_Error_Mask             0x0000bfff
 446 #define EA_Status_Cmd_Error_Mask             0x000021ff
 447 #define EA_Status_Bus_Error_Mask             0x00001e00
 448 #define EA_Status_Halting_Error_Mask         0x0000bffe
 449
 450 #define EA_Enable_Module_Enable              0x80000000
 451 #define EA_Enable_Q_Align_Error_Enable       0x00008000
 452 #define EA_Enable_Cmd_Complete_Enable        0x00004000
 453 #define EA_Enable_Opcode_Error_Enable        0x00002000
 454 #define EA_Enable_CMD_Read_Error_Enable      0x00001000
 455 #define EA_Enable_CMD_Write_Error_Enable     0x00000800
 456 #define EA_Enable_Data_Read_Error_Enable     0x00000400
 457 #define EA_Enable_Data_Write_Error_Enable    0x00000200
 458 #define EA_Enable_EA_Length_Error_Enable     0x00000100
 459 #define EA_Enable_Data_Length_Error_Enable   0x00000080
 460 #define EA_Enable_EA_DES_Error_Enable        0x00000040
 461 #define EA_Enable_DES_Size_Error_Enable      0x00000020
 462 #define EA_Enable_DES_Parity_Error_Enable    0x00000010
 463 #define EA_Enable_ARC4_Error_Enable          0x00000008
 464 #define EA_Enable_MD5_Error_Enable           0x00000004
 465 #define EA_Enable_SHA1_Error_Enable          0x00000002
 466 #define EA_Enable_Access_Error_Enable        0x00000001
 467
 468 #define EA_Enable_All_Enable_Mask            0x0000ffff
 469 #define EA_Enable_Error_Enable_Mask          0x0000bfff
 470
 471 /* Context Address register constants */
 472 #define EA_Ctx_Addr_Read_Pending             0x80000000
 473 #define EA_Ctx_Addr_Write_Pending            0x40000000
 474 #define EA_Ctx_Addr_Address_Mask             0x00ffffff
 475
 476 #endif
 477