lib/libpthread/arch/arm/pthread_md.h

   1 /*      $NetBSD: pthread_md.h,v 1.4 2005/12/24 21:11:16 perry Exp $     */
   2
   3 /*
   4  * Copyright (c) 2001 Wasabi Systems, Inc.
   5  * All rights reserved.
   6  *
   7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  * 3. All advertising materials mentioning features or use of this software
  18  *    must display the following acknowledgement:
  19  *      This product includes software developed for the NetBSD Project by
  20  *      Wasabi Systems, Inc.
  21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
  22  *    or promote products derived from this software without specific prior
  23  *    written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
  26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
  29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  35  * POSSIBILITY OF SUCH DAMAGE.
  36  */
  37
  38 #ifndef _LIB_PTHREAD_ARM_MD_H
  39 #define _LIB_PTHREAD_ARM_MD_H
  40
  41 static inline long
  42 pthread__sp(void)
  43 {
  44         long ret;
  45
  46         __asm volatile("mov %0, sp"
  47                 : "=r" (ret));
  48
  49         return (ret);
  50 }
  51
  52 #define pthread__uc_sp(ucp)     ((ucp)->uc_mcontext.__gregs[_REG_SP])
  53
  54 /*
  55  * Set initial, sane values for registers whose values aren't just
  56  * "don't care".
  57  */
  58 #ifdef __APCS_26__
  59 #define _INITCONTEXT_U_MD(ucp)                                          \
  60 /* Set R15_MODE_USR in the PC */                                        \
  61         (ucp)->uc_mcontext.__gregs[_REG_PC] =                           \
  62          ((ucp)->uc_mcontext.__gregs[_REG_PC] & 0x3fffffc) | 0x0;
  63 #else
  64 /* Set CPSR to PSR_USE32_MODE (0x10) from arm/armreg.h */
  65 #define _INITCONTEXT_U_MD(ucp)                                          \
  66         (ucp)->uc_mcontext.__gregs[_REG_CPSR] = 0x10;
  67 #endif
  68
  69 #endif /* _LIB_PTHREAD_ARM_MD_H */