?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Fix up mix of man(7)/mdoc(7).
[netbsd-mini2440.git] / sys / arch / acorn32 / podulebus / sfas.c
blobb37049d5c779aa24bd2a11ecdf8ae414bc76400a
1 /* $NetBSD: sfas.c,v 1.19 2009/03/18 17:06:41 cegger Exp $ */
2
3 /*
4 * Copyright (c) 1990 The Regents of the University of California.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * Van Jacobson of Lawrence Berkeley Laboratory.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. Neither the name of the University nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 * @(#)scsi.c 7.5 (Berkeley) 5/4/91
35 */
36
37 /*
38 * Copyright (c) 1995 Scott Stevens
39 * Copyright (c) 1995 Daniel Widenfalk
40 * Copyright (c) 1994 Christian E. Hopps
41 *
42 * This code is derived from software contributed to Berkeley by
43 * Van Jacobson of Lawrence Berkeley Laboratory.
44 *
45 * Redistribution and use in source and binary forms, with or without
46 * modification, are permitted provided that the following conditions
47 * are met:
48 * 1. Redistributions of source code must retain the above copyright
49 * notice, this list of conditions and the following disclaimer.
50 * 2. Redistributions in binary form must reproduce the above copyright
51 * notice, this list of conditions and the following disclaimer in the
52 * documentation and/or other materials provided with the distribution.
53 * 3. All advertising materials mentioning features or use of this software
54 * must display the following acknowledgement:
55 * This product includes software developed by the University of
56 * California, Berkeley and its contributors.
57 * 4. Neither the name of the University nor the names of its contributors
58 * may be used to endorse or promote products derived from this software
59 * without specific prior written permission.
60 *
61 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
62 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
63 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
64 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
65 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
66 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
67 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
68 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
69 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
70 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
71 * SUCH DAMAGE.
72 *
73 * @(#)scsi.c 7.5 (Berkeley) 5/4/91
74 */
75
76 /*
77 * Emulex FAS216 scsi adaptor driver
78 */
79
80 /*
81 * Modified for NetBSD/arm32 by Scott Stevens
82 */
83
84 #include <sys/cdefs.h>
85 __KERNEL_RCSID(0, "$NetBSD: sfas.c,v 1.19 2009/03/18 17:06:41 cegger Exp $");
86
87 #include <sys/param.h>
88 #include <sys/systm.h>
89 #include <sys/device.h>
90 #include <sys/buf.h>
91 #include <sys/proc.h>
92
93 #include <dev/scsipi/scsi_all.h>
94 #include <dev/scsipi/scsipi_all.h>
95 #include <dev/scsipi/scsiconf.h>
96
97 #include <uvm/uvm_extern.h>
98
99 #include <machine/pmap.h>
100 #include <machine/cpu.h>
101 #include <machine/io.h>
102 #include <machine/intr.h>
103 #include <arm/arm32/katelib.h>
104 #include <acorn32/podulebus/podulebus.h>
105 #include <acorn32/podulebus/sfasreg.h>
106 #include <acorn32/podulebus/sfasvar.h>
107
108 void sfas_minphys(struct buf *);
109 void sfas_init_nexus(struct sfas_softc *, struct nexus *);
110 void sfasinitialize(struct sfas_softc *);
111 void sfas_scsi_request(struct scsipi_channel *, scsipi_adapter_req_t, void *);
112 void sfas_donextcmd(struct sfas_softc *, struct sfas_pending *);
113 void sfas_scsidone(struct sfas_softc *, struct scsipi_xfer *, int);
114 void sfasintr(struct sfas_softc *);
115 void sfasiwait(struct sfas_softc *);
116 void sfas_ixfer(void *, int);
117 void sfasreset(struct sfas_softc *, int);
118 int sfasselect(struct sfas_softc *, struct sfas_pending *, unsigned char *,
119 int, unsigned char *, int, int);
120 void sfasicmd(struct sfas_softc *, struct sfas_pending *);
121 void sfasgo(struct sfas_softc *, struct sfas_pending *);
122 void sfas_save_pointers(struct sfas_softc *);
123 void sfas_restore_pointers(struct sfas_softc *);
124 void sfas_build_sdtrm(struct sfas_softc *, int, int);
125 int sfas_select_unit(struct sfas_softc *, short);
126 struct nexus *sfas_arbitate_target(struct sfas_softc *, int);
127 void sfas_setup_nexus(struct sfas_softc *, struct nexus *,
128 struct sfas_pending *, unsigned char *, int,
129 unsigned char *, int, int);
130 int sfas_pretests(struct sfas_softc *, sfas_regmap_p);
131 int sfas_midaction(struct sfas_softc *, sfas_regmap_p, struct nexus *);
132 int sfas_postaction(struct sfas_softc *, sfas_regmap_p, struct nexus *);
133
134 /*
135 * Initialize these to make 'em patchable. Defaults to enable sync and discon.
136 */
137 u_char sfas_inhibit_sync[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
138 u_char sfas_inhibit_disc[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
139
140 #define DEBUG
141 #ifdef DEBUG
142 #define QPRINTF(a) if (sfas_debug > 1) printf a
143 int sfas_debug = 2;
144 #else
145 #define QPRINTF
146 #endif
147
148 /*
149 * default minphys routine for sfas based controllers
150 */
151 void
152 sfas_minphys(struct buf *bp)
153 {
154
155 /*
156 * No max transfer at this level.
157 */
158 minphys(bp);
159 }
160
161 /*
162 * Initialize the nexus structs.
163 */
164 void
165 sfas_init_nexus(struct sfas_softc *dev, struct nexus *nexus)
166 {
167 memset(nexus, 0, sizeof(struct nexus));
168
169 nexus->state = SFAS_NS_IDLE;
170 nexus->period = 200;
171 nexus->offset = 0;
172 nexus->syncper = 5;
173 nexus->syncoff = 0;
174 nexus->config3 = dev->sc_config3 & ~SFAS_CFG3_FASTSCSI;
175 }
176
177 void
178 sfasinitialize(struct sfas_softc *dev)
179 {
180 u_int *pte;
181 int i;
182
183 dev->sc_led_status = 0;
184
185 TAILQ_INIT(&dev->sc_xs_pending);
186 TAILQ_INIT(&dev->sc_xs_free);
187
188 /*
189 * Initialize the sfas_pending structs and link them into the free list. We
190 * have to set vm_link_data.pages to 0 or the vm FIX won't work.
191 */
192 for(i=0; i<MAXPENDING; i++) {
193 TAILQ_INSERT_TAIL(&dev->sc_xs_free, &dev->sc_xs_store[i],
194 link);
195 }
196
197 /*
198 * Calculate the correct clock conversion factor 2 <= factor <= 8, i.e. set
199 * the factor to clock_freq / 5 (int).
200 */
201 if (dev->sc_clock_freq <= 10)
202 dev->sc_clock_conv_fact = 2;
203 if (dev->sc_clock_freq <= 40)
204 dev->sc_clock_conv_fact = 2+((dev->sc_clock_freq-10)/5);
205 else
206 panic("sfasinitialize: Clock frequence too high");
207
208 /* Setup and save the basic configuration registers */
209 dev->sc_config1 = (dev->sc_host_id & SFAS_CFG1_BUS_ID_MASK);
210 dev->sc_config2 = SFAS_CFG2_FEATURES_ENABLE;
211 dev->sc_config3 = (dev->sc_clock_freq > 25 ? SFAS_CFG3_FASTCLK : 0);
212
213 /* Precalculate timeout value and clock period. */
214 /* Ekkk ... floating point in the kernel !!!! */
215 /* dev->sc_timeout_val = 1+dev->sc_timeout*dev->sc_clock_freq/
216 (7.682*dev->sc_clock_conv_fact);*/
217 dev->sc_timeout_val = 1+dev->sc_timeout*dev->sc_clock_freq/
218 ((7682*dev->sc_clock_conv_fact)/1000);
219 dev->sc_clock_period = 1000/dev->sc_clock_freq;
220
221 sfasreset(dev, 1 | 2); /* Reset Chip and Bus */
222
223 dev->sc_units_disconnected = 0;
224 dev->sc_msg_in_len = 0;
225 dev->sc_msg_out_len = 0;
226
227 dev->sc_flags = 0;
228
229 for(i=0; i<8; i++)
230 sfas_init_nexus(dev, &dev->sc_nexus[i]);
231
232 if (dev->sc_ixfer == NULL)
233 dev->sc_ixfer = sfas_ixfer;
234
235 /*
236 * Setup bump buffer.
237 */
238 dev->sc_bump_va = (u_char *)uvm_km_alloc(kernel_map, dev->sc_bump_sz, 0,
239 UVM_KMF_WIRED | UVM_KMF_ZERO);
240 (void) pmap_extract(pmap_kernel(), (vaddr_t)dev->sc_bump_va,
241 (paddr_t *)&dev->sc_bump_pa);
242
243 /*
244 * Setup pages to noncachable, that way we don't have to flush the cache
245 * every time we need "bumped" transfer.
246 */
247 pte = vtopte((vaddr_t) dev->sc_bump_va);
248 *pte &= ~(L2_C | L2_B);
249 PTE_SYNC(pte);
250 cpu_tlb_flushD();
251 cpu_dcache_wbinv_range((vm_offset_t)dev->sc_bump_va, PAGE_SIZE);
252
253 printf(" dmabuf V0x%08x P0x%08x", (u_int)dev->sc_bump_va, (u_int)dev->sc_bump_pa);
254 }
255
256
257 /*
258 * used by specific sfas controller
259 */
260 void
261 sfas_scsi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req,
262 void *arg)
263 {
264 struct scsipi_xfer *xs;
265 struct sfas_softc *dev = (void *)chan->chan_adapter->adapt_dev;
266 struct scsipi_periph *periph;
267 struct sfas_pending *pendp;
268 int flags, s, target;
269
270 switch (req) {
271 case ADAPTER_REQ_RUN_XFER:
272 xs = arg;
273 periph = xs->xs_periph;
274 flags = xs->xs_control;
275 target = periph->periph_target;
276
277 if (flags & XS_CTL_DATA_UIO)
278 panic("sfas: scsi data uio requested");
279
280 if ((flags & XS_CTL_POLL) && (dev->sc_flags & SFAS_ACTIVE))
281 panic("sfas_scsicmd: busy");
282
283 /* Get hold of a sfas_pending block. */
284 s = splbio();
285 pendp = dev->sc_xs_free.tqh_first;
286 if (pendp == NULL) {
287 xs->error = XS_RESOURCE_SHORTAGE;
288 scsipi_done(xs);
289 splx(s);
290 return;
291 }
292 TAILQ_REMOVE(&dev->sc_xs_free, pendp, link);
293 pendp->xs = xs;
294 splx(s);
295
296
297 /* If the chip if busy OR the unit is busy, we have to wait for out turn. */
298 if ((dev->sc_flags & SFAS_ACTIVE) ||
299 (dev->sc_nexus[target].flags & SFAS_NF_UNIT_BUSY)) {
300 s = splbio();
301 TAILQ_INSERT_TAIL(&dev->sc_xs_pending, pendp, link);
302 splx(s);
303 } else
304 sfas_donextcmd(dev, pendp);
305
306 return;
307
308 case ADAPTER_REQ_GROW_RESOURCES:
309 case ADAPTER_REQ_SET_XFER_MODE:
310 /* XXX Not supported. */
311 return;
312 }
313 }
314
315 /*
316 * Actually select the unit, whereby the whole scsi-process is started.
317 */
318 void
319 sfas_donextcmd(struct sfas_softc *dev, struct sfas_pending *pendp)
320 {
321 int s;
322
323 /*
324 * Special case for scsi unit reset. I think this is waterproof. We first
325 * select the unit during splbio. We then cycle through the generated
326 * interrupts until the interrupt routine signals that the unit has
327 * acknowledged the reset. After that we have to wait a reset to select
328 * delay before anything else can happend.
329 */
330 if (pendp->xs->xs_control & XS_CTL_RESET) {
331 struct nexus *nexus;
332
333 s = splbio();
334 while(!sfasselect(dev, pendp, 0, 0, 0, 0, SFAS_SELECT_K)) {
335 splx(s);
336 delay(10);
337 s = splbio();
338 }
339
340 nexus = dev->sc_cur_nexus;
341 while(nexus->flags & SFAS_NF_UNIT_BUSY) {
342 sfasiwait(dev);
343 sfasintr(dev);
344 }
345
346 nexus->flags |= SFAS_NF_UNIT_BUSY;
347 splx(s);
348
349 sfasreset(dev, 0);
350
351 s = splbio();
352 nexus->flags &= ~SFAS_NF_UNIT_BUSY;
353 splx(s);
354 }
355
356 /*
357 * If we are polling, go to splbio and perform the command, else we poke
358 * the scsi-bus via sfasgo to get the interrupt machine going.
359 */
360 if (pendp->xs->xs_control & XS_CTL_POLL) {
361 s = splbio();
362 sfasicmd(dev, pendp);
363 TAILQ_INSERT_TAIL(&dev->sc_xs_free, pendp, link);
364 splx(s);
365 } else {
366 sfasgo(dev, pendp);
367 }
368 }
369
370 void
371 sfas_scsidone(struct sfas_softc *dev, struct scsipi_xfer *xs, int stat)
372 {
373 struct sfas_pending *pendp;
374 int s;
375
376 xs->status = stat;
377
378 if (stat == 0)
379 xs->resid = 0;
380 else {
381 switch(stat) {
382 case SCSI_CHECK:
383 case SCSI_BUSY:
384 xs->error = XS_BUSY;
385 break;
386 case -1:
387 xs->error = XS_DRIVER_STUFFUP;
388 QPRINTF(("sfas_scsicmd() bad %x\n", stat));
389 break;
390 default:
391 xs->error = XS_TIMEOUT;
392 break;
393 }
394 }
395
396 /* Steal the next command from the queue so that one unit can't hog the bus. */
397 s = splbio();
398 pendp = dev->sc_xs_pending.tqh_first;
399 while(pendp) {
400 if (!(dev->sc_nexus[pendp->xs->xs_periph->periph_target].flags &
401 SFAS_NF_UNIT_BUSY))
402 break;
403 pendp = pendp->link.tqe_next;
404 }
405
406 if (pendp != NULL) {
407 TAILQ_REMOVE(&dev->sc_xs_pending, pendp, link);
408 }
409
410 splx(s);
411 scsipi_done(xs);
412
413 if (pendp)
414 sfas_donextcmd(dev, pendp);
415 }
416
417 /*
418 * There are two kinds of reset:
419 * 1) CHIP-bus reset. This also implies a SCSI-bus reset.
420 * 2) SCSI-bus reset.
421 * After the appropriate resets have been performed we wait a reset to select
422 * delay time.
423 */
424 void
425 sfasreset(struct sfas_softc *dev, int how)
426 {
427 sfas_regmap_p rp;
428 int i, s;
429
430 rp = dev->sc_fas;
431
432 if (how & 1) {
433 for(i=0; i<8; i++)
434 sfas_init_nexus(dev, &dev->sc_nexus[i]);
435
436 *rp->sfas_command = SFAS_CMD_RESET_CHIP;
437 delay(1);
438 *rp->sfas_command = SFAS_CMD_NOP;
439
440 *rp->sfas_config1 = dev->sc_config1;
441 *rp->sfas_config2 = dev->sc_config2;
442 *rp->sfas_config3 = dev->sc_config3;
443 *rp->sfas_timeout = dev->sc_timeout_val;
444 *rp->sfas_clkconv = dev->sc_clock_conv_fact &
445 SFAS_CLOCK_CONVERSION_MASK;
446 }
447
448 if (how & 2) {
449 for(i=0; i<8; i++)
450 sfas_init_nexus(dev, &dev->sc_nexus[i]);
451
452 s = splbio();
453
454 *rp->sfas_command = SFAS_CMD_RESET_SCSI_BUS;
455 delay(100);
456
457 /* Skip interrupt generated by RESET_SCSI_BUS */
458 while(*rp->sfas_status & SFAS_STAT_INTERRUPT_PENDING) {
459 dev->sc_status = *rp->sfas_status;
460 dev->sc_interrupt = *rp->sfas_interrupt;
461
462 delay(100);
463 }
464
465 dev->sc_status = *rp->sfas_status;
466 dev->sc_interrupt = *rp->sfas_interrupt;
467
468 splx(s);
469 }
470
471 if (dev->sc_config_flags & SFAS_SLOW_START)
472 delay(4*250000); /* RESET to SELECT DELAY*4 for slow devices */
473 else
474 delay(250000); /* RESET to SELECT DELAY */
475 }
476
477 /*
478 * Save active data pointers to the nexus block currently active.
479 */
480 void
481 sfas_save_pointers(struct sfas_softc *dev)
482 {
483 struct nexus *nx;
484
485 nx = dev->sc_cur_nexus;
486 if (nx) {
487 nx->cur_link = dev->sc_cur_link;
488 nx->max_link = dev->sc_max_link;
489 nx->buf = dev->sc_buf;
490 nx->len = dev->sc_len;
491 nx->dma_len = dev->sc_dma_len;
492 nx->dma_buf = dev->sc_dma_buf;
493 nx->dma_blk_flg = dev->sc_dma_blk_flg;
494 nx->dma_blk_len = dev->sc_dma_blk_len;
495 nx->dma_blk_ptr = dev->sc_dma_blk_ptr;
496 }
497 }
498
499 /*
500 * Restore data pointers from the currently active nexus block.
501 */
502 void
503 sfas_restore_pointers(struct sfas_softc *dev)
504 {
505 struct nexus *nx;
506
507 nx = dev->sc_cur_nexus;
508 if (nx) {
509 dev->sc_cur_link = nx->cur_link;
510 dev->sc_max_link = nx->max_link;
511 dev->sc_buf = nx->buf;
512 dev->sc_len = nx->len;
513 dev->sc_dma_len = nx->dma_len;
514 dev->sc_dma_buf = nx->dma_buf;
515 dev->sc_dma_blk_flg = nx->dma_blk_flg;
516 dev->sc_dma_blk_len = nx->dma_blk_len;
517 dev->sc_dma_blk_ptr = nx->dma_blk_ptr;
518 dev->sc_chain = nx->dma;
519 dev->sc_unit = (nx->lun_unit & 0x0F);
520 dev->sc_lun = (nx->lun_unit & 0xF0) >> 4;
521 }
522 }
523
524 /*
525 * sfasiwait is used during interrupt and polled IO to wait for an event from
526 * the FAS chip. This function MUST NOT BE CALLED without interrupt disabled.
527 */
528 void
529 sfasiwait(struct sfas_softc *dev)
530 {
531 sfas_regmap_p rp;
532
533 /*
534 * If SFAS_DONT_WAIT is set, we have already grabbed the interrupt info
535 * elsewhere. So we don't have to wait for it.
536 */
537 if (dev->sc_flags & SFAS_DONT_WAIT) {
538 dev->sc_flags &= ~SFAS_DONT_WAIT;
539 return;
540 }
541
542 rp = dev->sc_fas;
543
544 /* Wait for FAS chip to signal an interrupt. */
545 while(!(*rp->sfas_status & SFAS_STAT_INTERRUPT_PENDING))
546 delay(1);
547
548 /* Grab interrupt info from chip. */
549 dev->sc_status = *rp->sfas_status;
550 dev->sc_interrupt = *rp->sfas_interrupt;
551 if (dev->sc_interrupt & SFAS_INT_RESELECTED) {
552 dev->sc_resel[0] = *rp->sfas_fifo;
553 dev->sc_resel[1] = *rp->sfas_fifo;
554 }
555 }
556
557 /*
558 * Transfer info to/from device. sfas_ixfer uses polled IO+sfasiwait so the
559 * rules that apply to sfasiwait also applies here.
560 */
561 void
562 sfas_ixfer(void *v, int polling)
563 {
564 struct sfas_softc *dev = v;
565 sfas_regmap_p rp;
566 u_char *buf;
567 int len, mode, phase;
568
569 rp = dev->sc_fas;
570 buf = dev->sc_buf;
571 len = dev->sc_len;
572
573 /*
574 * Decode the scsi phase to determine whether we are reading or writing.
575 * mode == 1 => READ, mode == 0 => WRITE
576 */
577 phase = dev->sc_status & SFAS_STAT_PHASE_MASK;
578 mode = (phase == SFAS_PHASE_DATA_IN);
579
580 while(len && ((dev->sc_status & SFAS_STAT_PHASE_MASK) == phase))
581 if (mode) {
582 *rp->sfas_command = SFAS_CMD_TRANSFER_INFO;
583
584 sfasiwait(dev);
585
586 *buf++ = *rp->sfas_fifo;
587 len--;
588 } else {
589 len--;
590 *rp->sfas_fifo = *buf++;
591 *rp->sfas_command = SFAS_CMD_TRANSFER_INFO;
592
593 sfasiwait(dev);
594 }
595
596 /* Update buffer pointers to reflect the sent/received data. */
597 dev->sc_buf = buf;
598 dev->sc_len = len;
599
600 /*
601 * Since the last sfasiwait will be a phase-change, we can't wait for it
602 * again later, so we have to signal that.
603 * Since this may be called from an interrupt initiated routine then we
604 * must call sfasintr again to avoid losing an interrupt. Phew!
605 */
606 if(polling)
607 dev->sc_flags |= SFAS_DONT_WAIT;
608 else
609 sfasintr(dev);
610 }
611
612 /*
613 * Build a Synchronous Data Transfer Request message
614 */
615 void
616 sfas_build_sdtrm(struct sfas_softc *dev, int period, int offset)
617 {
618 dev->sc_msg_out[0] = 0x01;
619 dev->sc_msg_out[1] = 0x03;
620 dev->sc_msg_out[2] = 0x01;
621 dev->sc_msg_out[3] = period/4;
622 dev->sc_msg_out[4] = offset;
623 dev->sc_msg_out_len= 5;
624 }
625
626 /*
627 * Arbitate the scsi bus and select the unit
628 */
629 int
630 sfas_select_unit(struct sfas_softc *dev, short target)
631 {
632 sfas_regmap_p rp;
633 struct nexus *nexus;
634 int s, retcode, i;
635 u_char cmd;
636
637 s = splbio(); /* Do this at splbio so that we won't be disturbed. */
638
639 retcode = 0;
640
641 nexus = &dev->sc_nexus[target];
642
643 /*
644 * Check if the chip is busy. If not the we mark it as so and hope that nobody
645 * reselects us until we have grabbed the bus.
646 */
647 if (!(dev->sc_flags & SFAS_ACTIVE) && !dev->sc_sel_nexus) {
648 dev->sc_flags |= SFAS_ACTIVE;
649
650 rp = dev->sc_fas;
651
652 *rp->sfas_syncper = nexus->syncper;
653 *rp->sfas_syncoff = nexus->syncoff;
654 *rp->sfas_config3 = nexus->config3;
655
656 *rp->sfas_config1 = dev->sc_config1;
657 *rp->sfas_timeout = dev->sc_timeout_val;
658 *rp->sfas_dest_id = target;
659
660 /* If nobody has stolen the bus, we can send a select command to the chip. */
661 if (!(*rp->sfas_status & SFAS_STAT_INTERRUPT_PENDING)) {
662 *rp->sfas_fifo = nexus->ID;
663 if ((nexus->flags & (SFAS_NF_DO_SDTR | SFAS_NF_RESET))
664 || (dev->sc_msg_out_len != 0))
665 cmd = SFAS_CMD_SEL_ATN_STOP;
666 else {
667 for(i=0; i<nexus->clen; i++)
668 *rp->sfas_fifo = nexus->cbuf[i];
669
670 cmd = SFAS_CMD_SEL_ATN;
671 }
672
673 dev->sc_sel_nexus = nexus;
674
675 *rp->sfas_command = cmd;
676 retcode = 1;
677 nexus->flags &= ~SFAS_NF_RETRY_SELECT;
678 } else
679 nexus->flags |= SFAS_NF_RETRY_SELECT;
680 } else
681 nexus->flags |= SFAS_NF_RETRY_SELECT;
682
683 splx(s);
684 return(retcode);
685 }
686
687 /*
688 * Grab the nexus if available else return 0.
689 */
690 struct nexus *
691 sfas_arbitate_target(struct sfas_softc *dev, int target)
692 {
693 struct nexus *nexus;
694 int s;
695
696 /*
697 * This is realy simple. Raise interrupt level to splbio. Grab the nexus and
698 * leave.
699 */
700 nexus = &dev->sc_nexus[target];
701
702 s = splbio();
703
704 if (nexus->flags & SFAS_NF_UNIT_BUSY)
705 nexus = 0;
706 else
707 nexus->flags |= SFAS_NF_UNIT_BUSY;
708
709 splx(s);
710 return(nexus);
711 }
712
713 /*
714 * Setup a nexus for use. Initializes command, buffer pointers and DMA chain.
715 */
716 void
717 sfas_setup_nexus(struct sfas_softc *dev, struct nexus *nexus, struct sfas_pending *pendp, unsigned char *cbuf, int clen, unsigned char *buf, int len, int mode)
718 {
719 char sync, target, lun;
720
721 target = pendp->xs->xs_periph->periph_target;
722 lun = pendp->xs->xs_periph->periph_lun;
723
724 /*
725 * Adopt mode to reflect the config flags.
726 * If we can't use DMA we can't use synch transfer. Also check the
727 * sfas_inhibit_xxx[target] flags.
728 */
729 if ((dev->sc_config_flags & (SFAS_NO_SYNCH | SFAS_NO_DMA)) ||
730 sfas_inhibit_sync[(int)target])
731 mode &= ~SFAS_SELECT_S;
732
733 if ((dev->sc_config_flags & SFAS_NO_RESELECT) ||
734 sfas_inhibit_disc[(int)target])
735 mode &= ~SFAS_SELECT_R;
736
737 nexus->xs = pendp->xs;
738
739 /* Setup the nexus struct. */
740 nexus->ID = ((mode & SFAS_SELECT_R) ? 0xC0 : 0x80) | lun;
741 nexus->clen = clen;
742 memcpy(nexus->cbuf, cbuf, nexus->clen);
743 nexus->cbuf[1] |= lun << 5; /* Fix the lun bits */
744 nexus->cur_link = 0;
745 nexus->dma_len = 0;
746 nexus->dma_buf = 0;
747 nexus->dma_blk_len = 0;
748 nexus->dma_blk_ptr = 0;
749 nexus->len = len;
750 nexus->buf = buf;
751 nexus->lun_unit = (lun << 4) | target;
752 nexus->state = SFAS_NS_SELECTED;
753
754 /* We must keep these flags. All else must be zero. */
755 nexus->flags &= SFAS_NF_UNIT_BUSY
756 | SFAS_NF_SYNC_TESTED | SFAS_NF_SELECT_ME;
757
758 if (mode & SFAS_SELECT_I)
759 nexus->flags |= SFAS_NF_IMMEDIATE;
760 if (mode & SFAS_SELECT_K)
761 nexus->flags |= SFAS_NF_RESET;
762
763 sync = ((mode & SFAS_SELECT_S) ? 1 : 0);
764
765 /* We can't use sync during polled IO. */
766 if (sync && (mode & SFAS_SELECT_I))
767 sync = 0;
768
769 if (!sync &&
770 ((nexus->flags & SFAS_NF_SYNC_TESTED) && (nexus->offset != 0))) {
771 /*
772 * If the scsi unit is set to synch transfer and we don't want
773 * that, we have to renegotiate.
774 */
775
776 nexus->flags |= SFAS_NF_DO_SDTR;
777 nexus->period = 200;
778 nexus->offset = 0;
779 } else if (sync && !(nexus->flags & SFAS_NF_SYNC_TESTED)) {
780 /*
781 * If the scsi unit is not set to synch transfer and we want
782 * that, we have to negotiate. This should realy base the
783 * period on the clock frequence rather than just check if
784 * >25 MHz
785 */
786
787 nexus->flags |= SFAS_NF_DO_SDTR;
788 nexus->period = ((dev->sc_clock_freq>25) ? 100 : 200);
789 nexus->offset = 8;
790
791 /* If the user has a long cable, we want to limit the period */
792 if ((nexus->period == 100) &&
793 (dev->sc_config_flags & SFAS_SLOW_CABLE))
794 nexus->period = 200;
795 }
796
797 /*
798 * Fake a DMA-block for polled IO. This way we can use the same code to handle
799 * reselection. Much nicer this way.
800 */
801 if ((mode & SFAS_SELECT_I) || (dev->sc_config_flags & SFAS_NO_DMA)) {
802 nexus->dma[0].ptr = buf;
803 nexus->dma[0].len = len;
804 nexus->dma[0].flg = SFAS_CHAIN_PRG;
805 nexus->max_link = 1;
806 } else {
807 nexus->max_link = dev->sc_build_dma_chain(dev, nexus->dma,
808 buf, len);
809 }
810
811 /* Flush the caches. */
812
813 if (len && !(mode & SFAS_SELECT_I))
814 cpu_dcache_wbinv_range((vm_offset_t)buf, len);
815 }
816
817 int
818 sfasselect(struct sfas_softc *dev, struct sfas_pending *pendp, unsigned char *cbuf, int clen, unsigned char *buf, int len, int mode)
819 {
820 struct nexus *nexus;
821
822 /* Get the nexus struct. */
823 nexus = sfas_arbitate_target(dev, pendp->xs->xs_periph->periph_target);
824 if (nexus == NULL)
825 return(0);
826
827 /* Setup the nexus struct. */
828 sfas_setup_nexus(dev, nexus, pendp, cbuf, clen, buf, len, mode);
829
830 /* Post it to the interrupt machine. */
831 sfas_select_unit(dev, pendp->xs->xs_periph->periph_target);
832
833 return(1);
834 }
835
836 void
837 sfasgo(struct sfas_softc *dev, struct sfas_pending *pendp)
838 {
839 int s;
840 char *buf;
841
842 buf = pendp->xs->data;
843
844 if (sfasselect(dev, pendp, (char *)pendp->xs->cmd, pendp->xs->cmdlen,
845 buf, pendp->xs->datalen, SFAS_SELECT_RS)) {
846 /*
847 * We got the command going so the sfas_pending struct is now
848 * free to reuse.
849 */
850
851 s = splbio();
852 TAILQ_INSERT_TAIL(&dev->sc_xs_free, pendp, link);
853 splx(s);
854 } else {
855 /*
856 * We couldn't make the command fly so we have to wait. The
857 * struct MUST be inserted at the head to keep the order of
858 * the commands.
859 */
860
861 s = splbio();
862 TAILQ_INSERT_HEAD(&dev->sc_xs_pending, pendp, link);
863 splx(s);
864 }
865
866 return;
867 }
868
869 /*
870 * Part one of the interrupt machine. Error checks and reselection test.
871 * We don't know if we have an active nexus here!
872 */
873 int
874 sfas_pretests(struct sfas_softc *dev, sfas_regmap_p rp)
875 {
876 struct nexus *nexus;
877 int i, s;
878
879 if (dev->sc_interrupt & SFAS_INT_SCSI_RESET_DETECTED) {
880 /*
881 * Cleanup and notify user. Lets hope that this is all we
882 * have to do
883 */
884
885 for(i=0; i<8; i++) {
886 if (dev->sc_nexus[i].xs)
887 sfas_scsidone(dev, dev->sc_nexus[i].xs, -2);
888
889 sfas_init_nexus(dev, &dev->sc_nexus[i]);
890 }
891 printf("sfasintr: SCSI-RESET detected!");
892 return(-1);
893 }
894
895 if (dev->sc_interrupt & SFAS_INT_ILLEGAL_COMMAND) {
896 /* Something went terrible wrong! Dump some data and panic! */
897
898 printf("FIFO:");
899 while(*rp->sfas_fifo_flags & SFAS_FIFO_COUNT_MASK)
900 printf(" %x", *rp->sfas_fifo);
901 printf("\n");
902
903 printf("CMD: %x\n", *rp->sfas_command);
904 panic("sfasintr: ILLEGAL COMMAND!");
905 }
906
907 if (dev->sc_interrupt & SFAS_INT_RESELECTED) {
908 /* We were reselected. Set the chip as busy */
909
910 s = splbio();
911 dev->sc_flags |= SFAS_ACTIVE;
912 if (dev->sc_sel_nexus) {
913 dev->sc_sel_nexus->flags |= SFAS_NF_SELECT_ME;
914 dev->sc_sel_nexus = 0;
915 }
916 splx(s);
917
918 if (dev->sc_units_disconnected) {
919 /* Find out who reselected us. */
920
921 dev->sc_resel[0] &= ~(1<<dev->sc_host_id);
922
923 for(i=0; i<8; i++)
924 if (dev->sc_resel[0] & (1<<i))
925 break;
926
927 if (i == 8)
928 panic("Illegal reselection!");
929
930 if (dev->sc_nexus[i].state == SFAS_NS_DISCONNECTED) {
931 /*
932 * This unit had disconnected, so we reconnect
933 * it.
934 */
935
936 dev->sc_cur_nexus = &dev->sc_nexus[i];
937 nexus = dev->sc_cur_nexus;
938
939 *rp->sfas_syncper = nexus->syncper;
940 *rp->sfas_syncoff = nexus->syncoff;
941 *rp->sfas_config3 = nexus->config3;
942
943 *rp->sfas_dest_id = i & 7;
944
945 dev->sc_units_disconnected--;
946 dev->sc_msg_in_len= 0;
947
948 /* Restore active pointers. */
949 sfas_restore_pointers(dev);
950
951 nexus->state = SFAS_NS_RESELECTED;
952
953 *rp->sfas_command = SFAS_CMD_MESSAGE_ACCEPTED;
954
955 return(1);
956 }
957 }
958
959 /* Somehow we got an illegal reselection. Dump and panic. */
960 printf("sfasintr: resel[0] %x resel[1] %x disconnected %d\n",
961 dev->sc_resel[0], dev->sc_resel[1],
962 dev->sc_units_disconnected);
963 panic("sfasintr: Unexpected reselection!");
964 }
965
966 return(0);
967 }
968
969 /*
970 * Part two of the interrupt machine. Handle disconnection and post command
971 * processing. We know that we have an active nexus here.
972 */
973 int
974 sfas_midaction(struct sfas_softc *dev, sfas_regmap_p rp, struct nexus *nexus)
975 {
976 int i, left, len, s;
977 u_char status, msg;
978
979 if (dev->sc_interrupt & SFAS_INT_DISCONNECT) {
980 s = splbio();
981 dev->sc_cur_nexus = 0;
982
983 /* Mark chip as busy and clean up the chip FIFO. */
984 dev->sc_flags &= ~SFAS_ACTIVE;
985 *rp->sfas_command = SFAS_CMD_FLUSH_FIFO;
986
987 /* Let the nexus state reflect what we have to do. */
988 switch(nexus->state) {
989 case SFAS_NS_SELECTED:
990 dev->sc_sel_nexus = 0;
991 nexus->flags &= ~SFAS_NF_SELECT_ME;
992
993 /*
994 * We were trying to select the unit. Probably no unit
995 * at this ID.
996 */
997 nexus->xs->resid = dev->sc_len;
998
999 nexus->status = -2;
1000 nexus->flags &= ~SFAS_NF_UNIT_BUSY;
1001 nexus->state = SFAS_NS_FINISHED;
1002 break;
1003
1004 case SFAS_NS_DONE:
1005 /* All done. */
1006 nexus->xs->resid = dev->sc_len;
1007
1008 nexus->flags &= ~SFAS_NF_UNIT_BUSY;
1009 nexus->state = SFAS_NS_FINISHED;
1010 dev->sc_led(dev, 0);
1011 break;
1012
1013 case SFAS_NS_DISCONNECTING:
1014 /*
1015 * We have received a DISCONNECT message, so we are
1016 * doing a normal disconnection.
1017 */
1018 nexus->state = SFAS_NS_DISCONNECTED;
1019
1020 dev->sc_units_disconnected++;
1021 break;
1022
1023 case SFAS_NS_RESET:
1024 /*
1025 * We were reseting this SCSI-unit. Clean up the
1026 * nexus struct.
1027 */
1028 dev->sc_led(dev, 0);
1029 sfas_init_nexus(dev, nexus);
1030 break;
1031
1032 default:
1033 /*
1034 * Unexpected disconnection! Cleanup and exit. This
1035 * shouldn't cause any problems.
1036 */
1037 printf("sfasintr: Unexpected disconnection\n");
1038 printf("sfasintr: u %x s %d p %d f %x c %x\n",
1039 nexus->lun_unit, nexus->state,
1040 dev->sc_status & SFAS_STAT_PHASE_MASK,
1041 nexus->flags, nexus->cbuf[0]);
1042
1043 nexus->xs->resid = dev->sc_len;
1044
1045 nexus->flags &= ~SFAS_NF_UNIT_BUSY;
1046 nexus->state = SFAS_NS_FINISHED;
1047 nexus->status = -3;
1048
1049 dev->sc_led(dev, 0);
1050 break;
1051 }
1052
1053 /*
1054 * If we have disconnected units, we MUST enable reselection
1055 * within 250ms.
1056 */
1057 if (dev->sc_units_disconnected &&
1058 !(dev->sc_flags & SFAS_ACTIVE))
1059 *rp->sfas_command = SFAS_CMD_ENABLE_RESEL;
1060
1061 splx(s);
1062
1063 /* Select the first pre-initialized nexus we find. */
1064 for(i=0; i<8; i++)
1065 if (dev->sc_nexus[i].flags & (SFAS_NF_SELECT_ME | SFAS_NF_RETRY_SELECT))
1066 if (sfas_select_unit(dev, i) == 2)
1067 break;
1068
1069 /* We are done with this nexus! */
1070 if (nexus->state == SFAS_NS_FINISHED)
1071 sfas_scsidone(dev, nexus->xs, nexus->status);
1072
1073 return(1);
1074 }
1075
1076 switch(nexus->state) {
1077 case SFAS_NS_SELECTED:
1078 dev->sc_cur_nexus = nexus;
1079 dev->sc_sel_nexus = 0;
1080
1081 nexus->flags &= ~SFAS_NF_SELECT_ME;
1082
1083 /*
1084 * We have selected a unit. Setup chip, restore pointers and
1085 * light the led.
1086 */
1087 *rp->sfas_syncper = nexus->syncper;
1088 *rp->sfas_syncoff = nexus->syncoff;
1089 *rp->sfas_config3 = nexus->config3;
1090
1091 sfas_restore_pointers(dev);
1092
1093 nexus->status = 0xFF;
1094 dev->sc_msg_in[0] = 0xFF;
1095 dev->sc_msg_in_len= 0;
1096
1097 dev->sc_led(dev, 1);
1098
1099 break;
1100
1101 case SFAS_NS_DATA_IN:
1102 case SFAS_NS_DATA_OUT:
1103 /* We have transfered data. */
1104 if (dev->sc_dma_len)
1105 if (dev->sc_cur_link < dev->sc_max_link) {
1106 /*
1107 * Clean up DMA and at the same time get how
1108 * many bytes that were NOT transfered.
1109 */
1110 left = dev->sc_setup_dma(dev, 0, 0, SFAS_DMA_CLEAR);
1111 len = dev->sc_dma_len;
1112
1113 if (nexus->state == SFAS_NS_DATA_IN) {
1114 /*
1115 * If we were bumping we may have had an odd length
1116 * which means that there may be bytes left in the
1117 * fifo. We also need to move the data from the
1118 * bump buffer to the actual memory.
1119 */
1120 if (dev->sc_dma_buf == dev->sc_bump_pa)
1121 {
1122 while((*rp->sfas_fifo_flags&SFAS_FIFO_COUNT_MASK)
1123 && left)
1124 dev->sc_bump_va[len-(left--)] = *rp->sfas_fifo;
1125
1126 memcpy(dev->sc_buf, dev->sc_bump_va, len-left);
1127 }
1128 } else {
1129 /* Count any unsent bytes and flush them. */
1130 left+= *rp->sfas_fifo_flags & SFAS_FIFO_COUNT_MASK;
1131 *rp->sfas_command = SFAS_CMD_FLUSH_FIFO;
1132 }
1133
1134 /*
1135 * Update pointers/length to reflect the transfered
1136 * data.
1137 */
1138 dev->sc_len -= len-left;
1139 dev->sc_buf += len-left;
1140
1141 dev->sc_dma_buf = (char *)dev->sc_dma_buf + len-left;
1142 dev->sc_dma_len = left;
1143
1144 dev->sc_dma_blk_ptr = (char *)dev->sc_dma_blk_ptr +
1145 len-left;
1146 dev->sc_dma_blk_len -= len-left;
1147
1148 /*
1149 * If it was the end of a DMA block, we select the
1150 * next to begin with.
1151 */
1152 if (!dev->sc_dma_blk_len)
1153 dev->sc_cur_link++;
1154 }
1155 break;
1156
1157 case SFAS_NS_STATUS:
1158 /*
1159 * If we were not sensing, grab the status byte. If we were
1160 * sensing and we got a bad status, let the user know.
1161 */
1162
1163 status = *rp->sfas_fifo;
1164 msg = *rp->sfas_fifo;
1165
1166 nexus->status = status;
1167 if (status != 0)
1168 nexus->status = -1;
1169
1170 /*
1171 * Preload the command complete message. Handeled in
1172 * sfas_postaction.
1173 */
1174 dev->sc_msg_in[0] = msg;
1175 dev->sc_msg_in_len = 1;
1176 nexus->flags |= SFAS_NF_HAS_MSG;
1177 break;
1178
1179 default:
1180 break;
1181 }
1182
1183 return(0);
1184 }
1185
1186 /*
1187 * Part three of the interrupt machine. Handle phase changes (and repeated
1188 * phase passes). We know that we have an active nexus here.
1189 */
1190 int
1191 sfas_postaction(struct sfas_softc *dev, sfas_regmap_p rp, struct nexus *nexus)
1192 {
1193 int i, len;
1194 u_char cmd;
1195 short offset, period;
1196
1197 cmd = 0;
1198
1199 switch(dev->sc_status & SFAS_STAT_PHASE_MASK) {
1200 case SFAS_PHASE_DATA_OUT:
1201 case SFAS_PHASE_DATA_IN:
1202 if ((dev->sc_status & SFAS_STAT_PHASE_MASK) ==
1203 SFAS_PHASE_DATA_OUT)
1204 nexus->state = SFAS_NS_DATA_OUT;
1205 else
1206 nexus->state = SFAS_NS_DATA_IN;
1207
1208 /* Make DMA ready to accept new data. Load active pointers
1209 * from the DMA block. */
1210 dev->sc_setup_dma(dev, 0, 0, SFAS_DMA_CLEAR);
1211 if (dev->sc_cur_link < dev->sc_max_link) {
1212 if (!dev->sc_dma_blk_len) {
1213 dev->sc_dma_blk_ptr = dev->sc_chain[dev->sc_cur_link].ptr;
1214 dev->sc_dma_blk_len = dev->sc_chain[dev->sc_cur_link].len;
1215 dev->sc_dma_blk_flg = dev->sc_chain[dev->sc_cur_link].flg;
1216 }
1217
1218 /* We should use polled IO here. */
1219 if (dev->sc_dma_blk_flg == SFAS_CHAIN_PRG) {
1220 dev->sc_ixfer(dev, nexus->xs->xs_control & XS_CTL_POLL);
1221 dev->sc_cur_link++;
1222 dev->sc_dma_len = 0;
1223 break;
1224 }
1225 else if (dev->sc_dma_blk_flg == SFAS_CHAIN_BUMP)
1226 len = dev->sc_dma_blk_len;
1227 else
1228 len = dev->sc_need_bump(dev, dev->sc_dma_blk_ptr,
1229 dev->sc_dma_blk_len);
1230
1231 /*
1232 * If len != 0 we must bump the data, else we just DMA it
1233 * straight into memory.
1234 */
1235 if (len) {
1236 dev->sc_dma_buf = dev->sc_bump_pa;
1237 dev->sc_dma_len = len;
1238
1239 if (nexus->state == SFAS_NS_DATA_OUT)
1240 memcpy(dev->sc_bump_va, dev->sc_buf, dev->sc_dma_len);
1241 } else {
1242 dev->sc_dma_buf = dev->sc_dma_blk_ptr;
1243 dev->sc_dma_len = dev->sc_dma_blk_len;
1244 }
1245
1246 /* Load DMA with address and length of transfer. */
1247 dev->sc_setup_dma(dev, dev->sc_dma_buf, dev->sc_dma_len,
1248 ((nexus->state == SFAS_NS_DATA_OUT) ?
1249 SFAS_DMA_WRITE : SFAS_DMA_READ));
1250
1251 /* printf("Using DMA !!!!\n");*/
1252 cmd = SFAS_CMD_TRANSFER_INFO | SFAS_CMD_DMA;
1253 } else {
1254 /*
1255 * Hmmm, the unit wants more info than we have or has
1256 * more than we want. Let the chip handle that.
1257 */
1258
1259 *rp->sfas_tc_low = 0; /* was 256 but this does not make sense */
1260 *rp->sfas_tc_mid = 1;
1261 *rp->sfas_tc_high = 0;
1262 cmd = SFAS_CMD_TRANSFER_PAD;
1263 }
1264 break;
1265
1266 case SFAS_PHASE_COMMAND:
1267 /* The scsi unit wants the command, send it. */
1268 nexus->state = SFAS_NS_SVC;
1269
1270 *rp->sfas_command = SFAS_CMD_FLUSH_FIFO;
1271 for(i=0; i<5; i++);
1272
1273 for(i=0; i<nexus->clen; i++)
1274 *rp->sfas_fifo = nexus->cbuf[i];
1275 cmd = SFAS_CMD_TRANSFER_INFO;
1276 break;
1277
1278 case SFAS_PHASE_STATUS:
1279 /*
1280 * We've got status phase. Request status and command
1281 * complete message.
1282 */
1283 nexus->state = SFAS_NS_STATUS;
1284 cmd = SFAS_CMD_COMMAND_COMPLETE;
1285 break;
1286
1287 case SFAS_PHASE_MESSAGE_OUT:
1288 /*
1289 * Either the scsi unit wants us to send a message or we have
1290 * asked for it by seting the ATN bit.
1291 */
1292 nexus->state = SFAS_NS_MSG_OUT;
1293
1294 *rp->sfas_command = SFAS_CMD_FLUSH_FIFO;
1295
1296 if (nexus->flags & SFAS_NF_DO_SDTR) {
1297 /* Send a Synchronous Data Transfer Request. */
1298
1299 sfas_build_sdtrm(dev, nexus->period, nexus->offset);
1300 nexus->flags |= SFAS_NF_SDTR_SENT;
1301 nexus->flags &= ~SFAS_NF_DO_SDTR;
1302 } else if (nexus->flags & SFAS_NF_RESET) {
1303 /* Send a reset scsi unit message. */
1304
1305 dev->sc_msg_out[0] = 0x0C;
1306 dev->sc_msg_out_len = 1;
1307 nexus->state = SFAS_NS_RESET;
1308 nexus->flags &= ~SFAS_NF_RESET;
1309 } else if (dev->sc_msg_out_len == 0) {
1310 /* Don't know what to send so we send a NOP message. */
1311
1312 dev->sc_msg_out[0] = 0x08;
1313 dev->sc_msg_out_len = 1;
1314 }
1315
1316 cmd = SFAS_CMD_TRANSFER_INFO;
1317
1318 for(i=0; i<dev->sc_msg_out_len; i++)
1319 *rp->sfas_fifo = dev->sc_msg_out[i];
1320 dev->sc_msg_out_len = 0;
1321
1322 break;
1323
1324 case SFAS_PHASE_MESSAGE_IN:
1325 /* Receive a message from the scsi unit. */
1326 nexus->state = SFAS_NS_MSG_IN;
1327
1328 while(!(nexus->flags & SFAS_NF_HAS_MSG)) {
1329 *rp->sfas_command = SFAS_CMD_TRANSFER_INFO;
1330 sfasiwait(dev);
1331
1332 dev->sc_msg_in[dev->sc_msg_in_len++] = *rp->sfas_fifo;
1333
1334 /* Check if we got all the bytes in the message. */
1335 if (dev->sc_msg_in[0] >= 0x80) ;
1336 else if (dev->sc_msg_in[0] >= 0x30) ;
1337 else if (((dev->sc_msg_in[0] >= 0x20) &&
1338 (dev->sc_msg_in_len == 2)) ||
1339 ((dev->sc_msg_in[0] != 0x01) &&
1340 (dev->sc_msg_in_len == 1))) {
1341 nexus->flags |= SFAS_NF_HAS_MSG;
1342 break;
1343 } else {
1344 if (dev->sc_msg_in_len >= 2)
1345 if ((dev->sc_msg_in[1]+2) == dev->sc_msg_in_len) {
1346 nexus->flags |= SFAS_NF_HAS_MSG;
1347 break;
1348 }
1349 }
1350
1351 *rp->sfas_command = SFAS_CMD_MESSAGE_ACCEPTED;
1352 sfasiwait(dev);
1353
1354 if ((dev->sc_status & SFAS_STAT_PHASE_MASK) !=
1355 SFAS_PHASE_MESSAGE_IN)
1356 break;
1357 }
1358
1359 cmd = SFAS_CMD_MESSAGE_ACCEPTED;
1360 if (nexus->flags & SFAS_NF_HAS_MSG) {
1361 /* We have a message. Decode it. */
1362
1363 switch(dev->sc_msg_in[0]) {
1364 case 0x00: /* COMMAND COMPLETE */
1365 nexus->state = SFAS_NS_DONE;
1366 break;
1367 case 0x04: /* DISCONNECT */
1368 nexus->state = SFAS_NS_DISCONNECTING;
1369 break;
1370 case 0x02: /* SAVE DATA POINTER */
1371 sfas_save_pointers(dev);
1372 break;
1373 case 0x03: /* RESTORE DATA POINTERS */
1374 sfas_restore_pointers(dev);
1375 break;
1376 case 0x07: /* MESSAGE REJECT */
1377 /*
1378 * If we had sent a SDTR and we got a message
1379 * reject, the scsi docs say that we must go
1380 * to async transfer.
1381 */
1382 if (nexus->flags & SFAS_NF_SDTR_SENT) {
1383 nexus->flags &= ~SFAS_NF_SDTR_SENT;
1384
1385 nexus->config3 &= ~SFAS_CFG3_FASTSCSI;
1386 nexus->syncper = 5;
1387 nexus->syncoff = 0;
1388
1389 *rp->sfas_syncper = nexus->syncper;
1390 *rp->sfas_syncoff = nexus->syncoff;
1391 *rp->sfas_config3 = nexus->config3;
1392 } else
1393 /*
1394 * Something was rejected but we don't know
1395 * what! PANIC!
1396 */
1397 panic("sfasintr: Unknown message rejected!");
1398 break;
1399 case 0x08: /* MO OPERATION */
1400 break;
1401 case 0x01: /* EXTENDED MESSAGE */
1402 switch(dev->sc_msg_in[2]) {
1403 case 0x01:/* SYNC. DATA TRANSFER REQUEST */
1404 /* Decode the SDTR message. */
1405 period = 4*dev->sc_msg_in[3];
1406 offset = dev->sc_msg_in[4];
1407
1408 /*
1409 * Make sure that the specs are within
1410 * chip limits. Note that if we
1411 * initiated the negotiation the specs
1412 * WILL be withing chip limits. If it
1413 * was the scsi unit that initiated
1414 * the negotiation, the specs may be
1415 * to high.
1416 */
1417 if (offset > 16)
1418 offset = 16;
1419 if ((period < 200) &&
1420 (dev->sc_clock_freq <= 25))
1421 period = 200;
1422
1423 if (offset == 0)
1424 period = 5*dev->sc_clock_period;
1425
1426 nexus->syncper = period/
1427 dev->sc_clock_period;
1428 nexus->syncoff = offset;
1429
1430 if (period < 200)
1431 nexus->config3 |= SFAS_CFG3_FASTSCSI;
1432 else
1433 nexus->config3 &=~SFAS_CFG3_FASTSCSI;
1434
1435 nexus->flags |= SFAS_NF_SYNC_TESTED;
1436
1437 *rp->sfas_syncper = nexus->syncper;
1438 *rp->sfas_syncoff = nexus->syncoff;
1439 *rp->sfas_config3 = nexus->config3;
1440
1441 /*
1442 * Hmmm, it seems that the scsi unit
1443 * initiated sync negotiation, so lets
1444 * reply acording to scsi-2 standard.
1445 */
1446 if (!(nexus->flags& SFAS_NF_SDTR_SENT))
1447 {
1448 if ((dev->sc_config_flags &
1449 SFAS_NO_SYNCH) ||
1450 (dev->sc_config_flags &
1451 SFAS_NO_DMA) ||
1452 sfas_inhibit_sync[
1453 nexus->lun_unit & 7]) {
1454 period = 200;
1455 offset = 0;
1456 }
1457
1458 nexus->offset = offset;
1459 nexus->period = period;
1460 nexus->flags |= SFAS_NF_DO_SDTR;
1461 *rp->sfas_command = SFAS_CMD_SET_ATN;
1462 }
1463
1464 nexus->flags &= ~SFAS_NF_SDTR_SENT;
1465 break;
1466
1467 case 0x00: /* MODIFY DATA POINTERS */
1468 case 0x02: /* EXTENDED IDENTIFY (SCSI-1) */
1469 case 0x03: /* WIDE DATA TRANSFER REQUEST */
1470 default:
1471 /* Reject any unhandeled messages. */
1472
1473 dev->sc_msg_out[0] = 0x07;
1474 dev->sc_msg_out_len = 1;
1475 *rp->sfas_command = SFAS_CMD_SET_ATN;
1476 cmd = SFAS_CMD_MESSAGE_ACCEPTED;
1477 break;
1478 }
1479 break;
1480
1481 default:
1482 /* Reject any unhandeled messages. */
1483
1484 dev->sc_msg_out[0] = 0x07;
1485 dev->sc_msg_out_len = 1;
1486 *rp->sfas_command = SFAS_CMD_SET_ATN;
1487 cmd = SFAS_CMD_MESSAGE_ACCEPTED;
1488 break;
1489 }
1490 nexus->flags &= ~SFAS_NF_HAS_MSG;
1491 dev->sc_msg_in_len = 0;
1492 }
1493 break;
1494 default:
1495 printf("SFASINTR: UNKNOWN PHASE! phase: %d\n",
1496 dev->sc_status & SFAS_STAT_PHASE_MASK);
1497 dev->sc_led(dev, 0);
1498 sfas_scsidone(dev, nexus->xs, -4);
1499
1500 return(-1);
1501 }
1502
1503 if (cmd)
1504 *rp->sfas_command = cmd;
1505
1506 return(0);
1507 }
1508
1509 /*
1510 * Stub for interrupt machine.
1511 */
1512 void
1513 sfasintr(struct sfas_softc *dev)
1514 {
1515 sfas_regmap_p rp;
1516 struct nexus *nexus;
1517
1518 rp = dev->sc_fas;
1519
1520 if (!sfas_pretests(dev, rp)) {
1521
1522 nexus = dev->sc_cur_nexus;
1523 if (nexus == NULL)
1524 nexus = dev->sc_sel_nexus;
1525
1526 if (nexus)
1527 if (!sfas_midaction(dev, rp, nexus))
1528 sfas_postaction(dev, rp, nexus);
1529 }
1530 }
1531
1532 /*
1533 * sfasicmd is used to perform IO when we can't use interrupts. sfasicmd
1534 * emulates the normal environment by waiting for the chip and calling
1535 * sfasintr.
1536 */
1537 void
1538 sfasicmd(struct sfas_softc *dev, struct sfas_pending *pendp)
1539 {
1540 sfas_regmap_p rp;
1541 struct nexus *nexus;
1542
1543 nexus = &dev->sc_nexus[pendp->xs->xs_periph->periph_target];
1544 rp = dev->sc_fas;
1545
1546 if (!sfasselect(dev, pendp, (char *)pendp->xs->cmd, pendp->xs->cmdlen,
1547 (char *)pendp->xs->data, pendp->xs->datalen,
1548 SFAS_SELECT_I))
1549 panic("sfasicmd: Couldn't select unit");
1550
1551 while(nexus->state != SFAS_NS_FINISHED) {
1552 sfasiwait(dev);
1553 sfasintr(dev);
1554 }
1555
1556 nexus->flags &= ~SFAS_NF_SYNC_TESTED;
1557 }
1558
1559
1560 #ifdef SFAS_DEBUG
1561
1562 void
1563 dump_nexus(struct nexus *nexus)
1564 {
1565 int loop;
1566
1567 printf("nexus=%08x\n", (u_int)nexus);
1568 printf("scsi_fer=%08x\n", (u_int)nexus->xs);
1569 printf("ID=%02x\n", nexus->ID);
1570 printf("clen=%02x\n", nexus->clen);
1571 printf("cbuf=");
1572 for (loop = 0; loop< 14; ++loop)
1573 printf(" %02x\n", nexus->cbuf[loop]);
1574 printf("\n");
1575 printf("DMA:\n");
1576 for (loop = 0; loop < MAXCHAIN; ++loop)
1577 printf("dma_chain: %08x %04x %04x\n", nexus->dma[loop].ptr,
1578 nexus->dma[loop].len, nexus->dma[loop].flg);
1579 printf("\n");
1580
1581 printf("max_link=%d\n", nexus->max_link);
1582 printf("cur_link=%d\n", nexus->cur_link);
1583
1584 printf("buf=%08x\n", (u_int)nexus->buf);
1585 printf("len=%08x\n", nexus->len);
1586 printf("dma_buf=%08x\n", (u_int)nexus->dma_buf);
1587 printf("dma_len=%08x\n", nexus->dma_len);
1588 printf("dma_blk_ptr=%08x\n", (u_int)nexus->dma_blk_ptr);
1589 printf("dma_blk_len=%08x\n", nexus->dma_blk_len);
1590 printf("dma_blk_flag=%08x\n", nexus->dma_blk_flg);
1591 printf("state=%02x\n", nexus->state);
1592 printf("flags=%04x\n", nexus->flags);
1593 printf("period=%d\n", nexus->period);
1594 printf("offset=%d\n", nexus->offset);
1595 printf("syncper=%d\n", nexus->syncper);
1596 printf("syncoff=%d\n", nexus->syncoff);
1597 printf("config3=%02x\n", nexus->config3);
1598 printf("lun_unit=%d\n", nexus->lun_unit);
1599 printf("status=%02x\n", nexus->status);
1600 printf("\n");
1601 }
1602
1603 void
1604 dump_nexii(struct sfas_softc *sc)
1605 {
1606 int loop;
1607
1608 for (loop = 0; loop < 8; ++loop) {
1609 dump_nexus(&sc->sc_nexus[loop]);
1610 }
1611 }
1612
1613 void
1614 dump_sfassoftc(struct sfas_softc *sc)
1615 {
1616 printf("sfassoftc @ 0x%08x\n", (u_int)sc);
1617 printf("clock_freq = %d\n", sc->sc_clock_freq);
1618 printf("timeout = %d\n", sc->sc_timeout);
1619 printf("host_id = %d\n", sc->sc_host_id);
1620 printf("config_flags = 0x%08x\n", sc->sc_config_flags);
1621 printf("led_status = %d\n", sc->sc_led_status);
1622
1623 dump_nexii(sc);
1624 printf("cur_nexus = 0x%08x\n", (u_int)sc->sc_cur_nexus);
1625 printf("sel_nexus = 0x%08x\n", (u_int)sc->sc_sel_nexus);
1626 printf("\n");
1627 }
1628
1629 #endif /* SFAS_DEBUG */
NetBSD on the FriendlyARM MINI2440