1 /* $NetBSD: clock.c,v 1.14.10.1 2007/10/03 19:25:05 garbled Exp $ */
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37 * Copyright (c) 1990 The Regents of the University of California.
38 * All rights reserved.
40 * This code is derived from software contributed to Berkeley by
41 * William Jolitz and Don Ahn.
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63 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
64 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
67 * @(#)clock.c 7.2 (Berkeley) 5/12/91
70 * Copyright (c) 1993, 1994 Charles M. Hannum.
72 * This code is derived from software contributed to Berkeley by
73 * William Jolitz and Don Ahn.
75 * Redistribution and use in source and binary forms, with or without
76 * modification, are permitted provided that the following conditions
78 * 1. Redistributions of source code must retain the above copyright
79 * notice, this list of conditions and the following disclaimer.
80 * 2. Redistributions in binary form must reproduce the above copyright
81 * notice, this list of conditions and the following disclaimer in the
82 * documentation and/or other materials provided with the distribution.
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84 * must display the following acknowledgement:
85 * This product includes software developed by the University of
86 * California, Berkeley and its contributors.
87 * 4. Neither the name of the University nor the names of its contributors
88 * may be used to endorse or promote products derived from this software
89 * without specific prior written permission.
91 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
92 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
93 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
94 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
95 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
96 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
97 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
98 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
99 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
100 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
103 * @(#)clock.c 7.2 (Berkeley) 5/12/91
106 * Mach Operating System
107 * Copyright (c) 1991,1990,1989 Carnegie Mellon University
108 * All Rights Reserved.
110 * Permission to use, copy, modify and distribute this software and its
111 * documentation is hereby granted, provided that both the copyright
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113 * software, derivative works or modified versions, and any portions
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116 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
117 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
118 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
120 * Carnegie Mellon requests users of this software to return to
122 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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124 * Carnegie Mellon University
125 * Pittsburgh PA 15213-3890
127 * any improvements or extensions that they make and grant Carnegie Mellon
128 * the rights to redistribute these changes.
131 Copyright 1988, 1989 by Intel Corporation, Santa Clara, California.
135 Permission to use, copy, modify, and distribute this software and
136 its documentation for any purpose and without fee is hereby
137 granted, provided that the above copyright notice appears in all
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149 WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
153 * Primitive clock interrupt routines.
156 #include <sys/cdefs.h>
157 __KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.14.10.1 2007/10/03 19:25:05 garbled Exp $");
159 #include <sys/param.h>
160 #include <sys/systm.h>
161 #include <sys/time.h>
162 #include <sys/timetc.h>
163 #include <sys/kernel.h>
164 #include <sys/device.h>
166 #include <machine/cpu.h>
167 #include <machine/intr.h>
168 #include <machine/irqhandler.h>
169 #include <machine/pio.h>
170 #include <arm/cpufunc.h>
172 #include <dev/isa/isareg.h>
173 #include <dev/isa/isavar.h>
174 #include <dev/ic/mc146818reg.h>
175 #include <dev/ic/i8253reg.h>
176 #include <shark/isa/nvram.h>
177 #include <shark/isa/spkrreg.h>
178 #include <shark/shark/hat.h>
180 void sysbeepstop(void *);
181 void sysbeep(int, int);
183 int timer_hz_to_count(int);
185 static void findcpuspeed(void);
186 static void delayloop(int);
187 static int clockintr(void *);
188 static int gettick(void);
189 static void tc_init_i8253(void);
191 void startrtclock(void);
193 inline unsigned mc146818_read(void *, unsigned);
194 inline void mc146818_write(void *, unsigned, unsigned);
197 mc146818_read(void *sc
, unsigned reg
)
201 return (inb(IO_RTC
+1));
205 mc146818_write(void *sc
, unsigned reg
, unsigned datum
)
209 outb(IO_RTC
+1, datum
);
212 unsigned int count1024usec
; /* calibrated loop variable (1024 microseconds) */
214 /* number of timer ticks in a Musec = 2^20 usecs */
215 #define TIMER_MUSECFREQ\
216 (((((((TIMER_FREQ) * 1024) + 999) / 1000) * 1024) + 999) / 1000)
217 #define TIMER_MUSECDIV(x) ((TIMER_MUSECFREQ+(x)/2)/(x))
220 * microtime() makes use of the following globals.
221 * timer_msb_table[] and timer_lsb_table[] are used to compute the
222 * microsecond increment.
224 * time.tv_usec += isa_timer_msb_table[cnt_msb] + isa_timer_lsb_table[cnt_lsb];
227 u_short isa_timer_lsb_table
[256]; /* timer->usec conversion for LSB */
229 /* 64 bit counts from timer 0 */
231 unsigned lo
; /* low 32 bits */
232 unsigned hi
; /* high 32 bits */
235 #define TIMER0_ROLLOVER 0xFFFF /* maximum rollover for 8254 counter */
237 struct count64 timer0count
;
238 struct count64 timer0_at_last_clockintr
;
243 #define HATSTACKSIZE 1024
246 unsigned char hatStack
[HATSTACKSIZE
];
248 unsigned testHatOn
= 0;
250 unsigned nHatWedges
= 0;
251 unsigned fiqReason
= 0;
252 unsigned hatCount
= 0;
253 unsigned hatCount2
= 0;
255 void hatTest(int testReason
)
258 fiqReason
|= testReason
;
262 void hatWedge(int nFIQs
)
265 printf("Unwedging the HAT. fiqs_happened = %d\n", nFIQs
);
274 findcpuspeed(); /* use the clock (while it's free) to
275 find the CPU speed */
279 timer0_at_last_clockintr
.lo
= 0;
280 timer0_at_last_clockintr
.hi
= 0;
283 /* initialize 8253 clock */
284 outb(IO_TIMER1
+ TIMER_MODE
, TIMER_SEL0
|TIMER_RATEGEN
|TIMER_16BIT
);
285 outb(IO_TIMER1
+ TIMER_CNTR0
, TIMER0_ROLLOVER
% 256);
286 outb(IO_TIMER1
+ TIMER_CNTR0
, TIMER0_ROLLOVER
/ 256);
289 hatCount
= timer_hz_to_count(HATHZ
);
290 hatCount2
= timer_hz_to_count(HATHZ2
);
291 printf("HAT test on @ %d Hz = %d ticks\n", HATHZ
, hatCount
);
296 timer_hz_to_count(int timer_hz
)
300 tval
= (TIMER_FREQ
* 2) / (u_long
) timer_hz
;
301 tval
= (tval
/ 2) + (tval
& 0x1);
306 void gettimer0count(struct count64
*);
308 /* must be called at SPL_CLOCK or higher */
309 void gettimer0count(struct count64
*pcount
)
311 unsigned current
, ticks
, oldlo
;
314 * Latch the current value of the timer and then read it.
315 * This guarantees an atomic reading of the time.
320 if (timer0last
>= current
)
321 ticks
= timer0last
- current
;
323 ticks
= timer0last
+ (TIMER0_ROLLOVER
- current
);
325 timer0last
= current
;
327 oldlo
= timer0count
.lo
;
329 if (oldlo
> (timer0count
.lo
= oldlo
+ ticks
)) /* carry? */
332 *pcount
= timer0count
;
338 struct clockframe
*frame
= arg
; /* not strictly necessary */
339 extern void isa_specific_eoi(int irq
);
341 static int ticks
= 0;
343 static int hatUnwedgeCtr
= 0;
345 gettimer0count(&timer0_at_last_clockintr
);
347 mc146818_read(NULL
, MC_REGC
); /* clear the clock interrupt */
349 /* check to see if the high-availability timer needs to be unwedged */
350 if (++hatUnwedgeCtr
>= (hz
/ HAT_MIN_FREQ
)) {
358 if (testHatOn
&& ((ticks
& 0x3f) == 0)) {
359 if (testHatOn
== 1) {
360 hatClkAdjust(hatCount2
);
365 printf("hat off status: %d %d %x\n", nHats
,
366 nHatWedges
, fiqReason
);
368 } else if (!testHatOn
&& (ticks
& 0x1ff) == 0) {
369 printf("hat on status: %d %d %x\n",
370 nHats
, nHatWedges
, fiqReason
);
374 hatClkOn(hatCount
, hatTest
, 0xfeedface,
375 hatStack
+ HATSTACKSIZE
- sizeof(unsigned),
389 /* Don't want someone screwing with the counter while we're here. */
390 savedints
= disable_interrupts(I32_bit
);
391 /* Select counter 0 and latch it. */
392 outb(IO_TIMER1
+ TIMER_MODE
, TIMER_SEL0
| TIMER_LATCH
);
393 lo
= inb(IO_TIMER1
+ TIMER_CNTR0
);
394 hi
= inb(IO_TIMER1
+ TIMER_CNTR0
);
395 restore_interrupts(savedints
);
396 return ((hi
<< 8) | lo
);
399 /* modifications from i386 to shark isa version:
400 - removed hardcoded "n -=" values that approximated the time to
401 calculate delay ticks
402 - made the time to calculate delay ticks almost negligable. 4 multiplies
403 = maximum of 12 cycles = 75ns on a slow SA-110, plus a bunch of shifts;
404 as opposed to 4 multiplies plus a bunch of divides.
405 - removed i386 assembly language hack
406 - put code in findcpuspeed that works even if FIRST_GUESS is orders
408 - put code in delay() to use delayloop() for short delays
409 - microtime no longer in assembly language
413 * Wait "n" microseconds.
414 * Relies on timer 1 counting down from (TIMER_FREQ / hz) at TIMER_FREQ Hz.
415 * Note: timer had better have been programmed before this is first used!
416 * (Note that we use `rate generator' mode, which counts at 1:1; `square
417 * wave' mode counts at 2:1).
426 /* it can take a long time (1 usec or longer) just for
427 1 ISA read, so it's best not to use the timer for
429 delayloop((n
* count1024usec
) >> 10);
434 * Read the counter first, so that the rest of the setup overhead is
440 * Calculate ((n * TIMER_FREQ) / 1e6) without using floating point and
441 * without any avoidable overflows.
444 /* a Musec = 2^20 usec */
446 usec
= n
& ((1 << 20) - 1);
448 = (Musec
* TIMER_MUSECFREQ
) +
449 (usec
* (TIMER_MUSECFREQ
>> 20)) +
450 ((usec
* ((TIMER_MUSECFREQ
& ((1 <<20) - 1)) >>10)) >>10) +
451 ((usec
* (TIMER_MUSECFREQ
& ((1 << 10) - 1))) >> 20);
457 nticks
-= TIMER0_ROLLOVER
- (ticks
- otick
);
459 nticks
-= otick
- ticks
;
466 sysbeepstop(void *arg
)
471 sysbeep(int pitch
, int period
)
475 #define FIRST_GUESS 0x2000
481 unsigned int guess
= FIRST_GUESS
;
483 while (1) { /* loop until accurate enough */
484 /* Put counter in count down mode */
485 outb(IO_TIMER1
+ TIMER_MODE
,
486 TIMER_SEL0
| TIMER_16BIT
| TIMER_RATEGEN
);
487 outb(IO_TIMER1
+ TIMER_CNTR0
, 0xff);
488 outb(IO_TIMER1
+ TIMER_CNTR0
, 0xff);
491 /* Read the value left in the counter */
493 * Formula for delaycount is:
494 * (loopcount * timer clock speed) / (counter ticks * 1000)
496 ticks
= 0xFFFF - gettick();
497 if (ticks
== 0) ticks
= 1; /* just in case */
498 if (ticks
< (TIMER_MUSECDIV(1024))) { /* not accurate enough */
499 guess
*= max(2, (TIMER_MUSECDIV(1024) / ticks
));
502 count1024usec
= (guess
* (TIMER_MUSECDIV(1024))) / ticks
;
508 delayloop(int counts
)
519 printf("clock: hz=%d stathz = %d profhz = %d\n", hz
, stathz
, profhz
);
521 /* install RTC interrupt handler */
522 (void)isa_intr_establish(NULL
, IRQ_RTC
, IST_LEVEL
, IPL_CLOCK
,
525 /* set up periodic interrupt @ hz
526 this is the subset of hz values in kern_clock.c that are
527 supported by the ISA RTC */
530 hzval
= MC_RATE_64_Hz
;
533 hzval
= MC_RATE_128_Hz
;
536 hzval
= MC_RATE_256_Hz
;
539 hzval
= MC_RATE_1024_Hz
;
542 panic("cannot configure hz = %d", hz
);
545 rtcinit(); /* make sure basics are done by now */
547 /* blast values to set up clock interrupt */
548 mc146818_write(NULL
, MC_REGA
, MC_BASE_32_KHz
| hzval
);
549 /* enable periodic interrupt */
550 mc146818_write(NULL
, MC_REGB
,
551 mc146818_read(NULL
, MC_REGB
) | MC_REGB_PIE
);
559 static int first_rtcopen_ever
= 1;
561 if (!first_rtcopen_ever
)
563 first_rtcopen_ever
= 0;
565 mc146818_write(NULL
, MC_REGA
, /* XXX softc */
566 MC_BASE_32_KHz
| MC_RATE_1024_Hz
);
567 mc146818_write(NULL
, MC_REGB
, MC_REGB_24HR
); /* XXX softc */
571 setstatclockrate(int arg
)
576 i8253_get_timecount(struct timecounter
*tc
)
578 return (TIMER0_ROLLOVER
- gettick());
584 static struct timecounter i8253_tc
= {
585 .tc_get_timecount
= i8253_get_timecount
,
586 .tc_counter_mask
= TIMER0_ROLLOVER
,
587 .tc_frequency
= TIMER_FREQ
,