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33 .Nd driver for AT-style parallel port chip sets
36 .Cd "atppc* at isa? port 0x378 irq 7 drq 3 flags 0x00"
37 .Cd "atppc* at isapnp?"
38 .Cd "atppc* at ofisa?"
39 .Cd "atppc* at pnpbios? index ?"
40 .Cd "atppc* at puc? port ?"
41 .Cd options ATPPC_VERBOSE
42 .Cd options ATPPC_DEBUG
45 supports parallel ports and provides the low level support needed
46 by higher level drivers such as
48 This driver attaches where the traditional
51 driver would ordinarily.
52 It provides the data transport and chip set manipulation needed by
53 higher driver layers, such as
57 This driver is designed to be one of many possible implementations
58 supporting machine independent parallel device support via
62 is intended to provide to data-link like services to higher level
63 IEEE 1284 device drivers (such as
66 does not directly support IEEE 1284 features such as mode negotiation
67 but rather provides the necessary infrastructure to allow a higher
68 level driver to provide these services.
71 does provide chip set manipulation, device handshakes (where
72 appropriate), low-level error detection, and data transfer.
73 .Ss Supported data transfer modes
75 supports the following data transfer modes: Centronics Compatible
76 (Standard), Nibble, Byte (PS2), Fast Centronics, ECP, and EPP.
77 Standard and Fast Centronics modes are write only, Nibble and Byte
78 modes are read only, and ECP and EPP modes are bidirectional.
93 driver is based on the
95 driver, which originally appeared in
97 The driver was ported over in
100 This manual page is based on the
104 The information has been updated for the
110 driver includes support for some specific chip sets, specifically
111 detection of some non-standard device I/O locations on the ISA bus.
112 This support was not ported over to the
114 version of the driver yet.