sys/arch/powerpc/include/ibm4xx/ibm4xx_intr.h

   1 /*      $NetBSD: ibm4xx_intr.h,v 1.15 2007/12/03 15:34:13 ad Exp $      */
   2
   3 /*-
   4  * Copyright (c) 1998, 2007 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Charles M. Hannum.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 #ifndef _IBM4XX_INTR_H_
  33 #define _IBM4XX_INTR_H_
  34
  35 /* Interrupt priority `levels'. */
  36 #define IPL_NONE        12      /* nothing */
  37 #define IPL_SOFTCLOCK   11      /* software clock interrupt */
  38 #define IPL_SOFTNET     10      /* software network interrupt */
  39 #define IPL_VM          5       /* memory allocation */
  40 #define IPL_SCHED       3       /* clock */
  41 #define IPL_HIGH        1       /* everything */
  42 #define NIPL            13
  43
  44 #define IPL_SOFTBIO     IPL_SOFTNET
  45 #define IPL_SOFTSERIAL  IPL_SOFTNET
  46
  47 /* Interrupt sharing types. */
  48 #define IST_NONE        0       /* none */
  49 #define IST_PULSE       1       /* pulsed */
  50 #define IST_EDGE        2       /* edge-triggered */
  51 #define IST_LEVEL       3       /* level-triggered */
  52
  53 #ifndef _LOCORE
  54
  55 #define CLKF_BASEPRI(frame)     ((frame)->pri == 0)
  56
  57 void    *intr_establish(int, int, int, int (*)(void *), void *);
  58 void    intr_disestablish(void *);
  59 void    intr_init(void);
  60 void    ext_intr(void);                         /* for machdep */
  61 int     splraise(int);
  62 int     spllower(int);
  63 void    splx(int);
  64 void    softintr(int);
  65
  66 extern volatile u_int           imask[NIPL];
  67 extern const int                mask_clock;             /* for clock.c */
  68 extern const int                mask_statclock;         /* for clock.c */
  69
  70 #define spllowersoftclock()     spllower(imask[IPL_SOFTCLOCK])
  71
  72 typedef int ipl_t;
  73 typedef struct {
  74         ipl_t _ipl;
  75 } ipl_cookie_t;
  76
  77 static inline ipl_cookie_t
  78 makeiplcookie(ipl_t ipl)
  79 {
  80
  81         return (ipl_cookie_t){._ipl = ipl};
  82 }
  83
  84 static inline int
  85 splraiseipl(ipl_cookie_t icookie)
  86 {
  87
  88         return splraise(imask[icookie._ipl]);
  89 }
  90
  91 #include <sys/spl.h>
  92
  93 #define spl0()                  spllower(0)
  94
  95 #endif /* !_LOCORE */
  96 #endif /* !_IBM4XX_INTR_H_ */