sys/arch/rs6000/stand/boot/srt0_pwr.s

   1 /*      $NetBSD: srt0.s,v 1.3 2005/12/11 12:18:48 christos Exp $        */
   2
   3 /*
   4  * Copyright (C) 1996-1999 Cort Dougan (cort@fsmlasb.com).
   5  * Copyright (C) 1996-1999 Gary Thomas (gdt@osf.org).
   6  * Copyright (C) 1996-1999 Paul Mackeras (paulus@linuxcare.com).
   7  * All rights reserved.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  * 3. All advertising materials mentioning features or use of this software
  18  *    must display the following acknowledgement:
  19  *      This product includes software developed by TooLs GmbH.
  20  * 4. The name of TooLs GmbH may not be used to endorse or promote products
  21  *    derived from this software without specific prior written permission.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
  24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  26  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  27  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  28  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  29  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  30  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  31  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
  32  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33  */
  34
  35 #define MSR_DR          (1<<4)
  36 #define MSR_IP          (1<<6)
  37 #define MSR_AL          (1<<7)
  38 #define MSR_ME          (1<<12)
  39
  40 #define HID0_DCI        (1<<10)
  41 #define HID0_ICFI       (1<<11)
  42 #define HID0_DCE        (1<<14)
  43 #define HID0_ICE        (1<<15)
  44
  45 /* when we start, the IPLCB pointer is in r3, and the extended one is in r4 */
  46
  47         .machine "com"
  48         .text
  49
  50         .globl  _start
  51 _start:
  52         bl      start
  53 start:
  54         li      2,MSR_ME|MSR_AL /* Establish default MSR value */
  55         mtmsr   2
  56         isync
  57 #if 0
  58 /*
  59         mflr    7
  60         bl      flush_icache
  61         mfspr   3,1008
  62         lis     4,~(HID0_ICE|HID0_DCE)@h
  63         ori     4,4,~(HID0_ICE|HID0_DCE)@l
  64         andc    3,3,4
  65         mtspr   1008,3
  66         mtlr    7
  67 */
  68 /*
  69  * check if we need to relocate ourselves to the link addr or were we
  70  * loaded there to begin with -- Cort
  71  */
  72         lis     4,_start@h
  73         ori     4,4,_start@l
  74         mflr    3
  75         subi    3,3,4           /* we get the nip, not the ip of the branch */
  76         mr      8,3
  77         cmpw    3,4
  78         bne     relocate
  79         b       start_ldr
  80
  81 /*
  82  * no matter where we're loaded, move ourselves to -Ttext address
  83  */
  84 relocate:
  85         lis     4,_start@h
  86         ori     4,4,_start@l
  87         lis     5,end@h
  88         ori     5,5,end@l
  89         addi    5,5,3           /* Round up - just in case */
  90         sub     5,5,4           /* Compute # longwords to move */
  91         srwi    5,5,2
  92         mtctr   5
  93         subi    3,3,4           /* Set up for loop */
  94         subi    4,4,4
  95 2:
  96         lwzu    5,4(3)
  97         stwu    5,4(4)
  98         bdnz    2b
  99         lis     3,start_ldr@h
 100         ori     3,3,start_ldr@l
 101         mtlr    3               /* Easiest way to do an absolute jump */
 102         blr
 103 #endif /* no good */
 104 start_ldr:
 105         mr      9,1             /* Save old stack pointer */
 106         lis     1,.stack@h
 107         ori     1,1,.stack@l
 108         addi    1,1,4096
 109         li      2,0x000F
 110         andc    1,1,2
 111 #if 0
 112         mr      3,11            /* arg1: residual/board data */
 113         mr      4,8             /* arg2: loadaddr */
 114 #endif
 115         bl      boot
 116 hang:
 117         b       hang
 118
 119 /*
 120  * Execute
 121  * run(startsym, endsym, args, bootinfo, entry)
 122  */
 123         .globl  run
 124 run:
 125         mtctr   7                       /* Entry point */
 126         bctr
 127
 128 /*
 129  * Flush instruction cache
 130  */
 131         .globl flush_icache
 132 flush_icache:
 133         mflr    5
 134         bl      flush_dcache
 135         mfspr   4,1008
 136         li      4,0
 137         ori     4,4,HID0_ICE|HID0_ICFI
 138         or      3,3,4
 139         mtspr   1008,3
 140         andc    3,3,4
 141         ori     3,3,HID0_ICE
 142         mtspr   1008,3
 143         mtlr    5
 144         blr
 145
 146 /*
 147  * Flush data cache
 148  */
 149         .globl flush_dcache
 150 flush_dcache:
 151         lis     3,0x1000@h
 152         ori     3,3,0x1000@l
 153         li      4,1024
 154         mtctr   4
 155 1:
 156         lwz     4,0(3)
 157         addi    3,3,32
 158         bdnz    1b
 159         blr
 160
 161 #if 0
 162 /*
 163  * write LEDS
 164  */
 165
 166         .globl led
 167 led:
 168         mfmsr   5       /* save MSR to r5 */
 169         lis     7,0xffff
 170         ori     7,7,~(MSR_DR)
 171         and     6,5,7
 172         mtmsr   6
 173         isync
 174
 175 #endif
 176 /*
 177  * local stack
 178  */
 179         .comm   .stack,8192,4