1 /* $NetBSD: cs89x0var.h,v 1.13 2009/09/22 13:31:26 tsutsui Exp $ */
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38 ** FACILITY Crystal CS8900 Ethernet driver header file
42 ** This module provides CS8900 driver softc and related definitions
46 ** Peter Dettori SEA - Software Engineering.
52 ** MODIFICATION HISTORY:
57 #ifndef _DEV_IC_CS89X0VAR_H_
58 #define _DEV_IC_CS89X0VAR_H_
61 * Ethernet software status per interface.
63 * Each interface is referenced by a network interface structure,
64 * arpcom.ac_if, which the routing code uses to locate the interface.
65 * This structure contains the output queue for the interface,
69 device_t sc_dev
; /* base device glue */
70 struct ethercom sc_ethercom
; /* Ethernet common */
71 struct ifmedia sc_media
; /* media control structures */
73 void *sc_ih
; /* interrupt handler */
75 bus_space_tag_t sc_iot
; /* bus space tag for IO */
76 bus_space_tag_t sc_memt
; /* bus space tag for memory mode */
77 bus_space_handle_t sc_ioh
; /* bus space handles */
78 bus_space_handle_t sc_memh
;
81 isa_chipset_tag_t sc_ic
; /* ISA chipset */
84 int sc_irq
; /* IRQ line */
86 int sc_prodid
; /* saved product ID */
87 int sc_prodrev
; /* saved product rev */
89 bus_addr_t sc_pktpgaddr
; /* PacketPage bus memory address */
91 int sc_cfgflags
; /* software configuration flags */
93 int sc_memorymode
; /* are we in memory mode? */
94 int sc_txbusy
; /* transmit in progress */
95 int sc_resetting
; /* reset in progress */
97 int sc_xe_ent
; /* current early-xmit table entry */
98 int sc_xe_togo
; /* # of packets to go at this ent */
100 int sc_carrier
; /* has carrier */
102 u_int8_t sc_enaddr
[ETHER_ADDR_LEN
]; /* MAC address */
104 int eeprom_size
; /* how large is the eeprom (in bytes) */
105 u_int16_t
*eeprom_data
; /* copy of the eeprom data */
108 rndsource_element_t rnd_source
; /* random source */
111 /* power management */
112 int (*sc_enable
)(struct cs_softc
*);
113 void (*sc_disable
)(struct cs_softc
*);
116 void (*sc_dma_process_rx
)(struct cs_softc
*);
117 void (*sc_dma_chipinit
)(struct cs_softc
*);
118 void (*sc_dma_attach
)(struct cs_softc
*);
120 /* register access hooks */
121 u_int8_t (*sc_io_read_1
)(struct cs_softc
*, bus_size_t
);
122 u_int16_t (*sc_io_read_2
)(struct cs_softc
*, bus_size_t
);
123 void (*sc_io_read_multi_2
)(struct cs_softc
*, bus_size_t
, u_int16_t
*,
125 void (*sc_io_write_2
)(struct cs_softc
*, bus_size_t
, u_int16_t
);
126 void (*sc_io_write_multi_2
)(struct cs_softc
*, bus_size_t
,
127 const u_int16_t
*, bus_size_t
);
128 u_int16_t (*sc_mem_read_2
)(struct cs_softc
*, bus_size_t
);
129 void (*sc_mem_write_2
)(struct cs_softc
*, bus_size_t
, u_int16_t
);
130 void (*sc_mem_write_region_2
)(struct cs_softc
*, bus_size_t
,
131 const u_int16_t
*, bus_size_t
);
134 #define IO_READ_1(sc, a) \
135 (sc)->sc_io_read_1 ? \
136 (sc)->sc_io_read_1((sc), (a)) : \
137 bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, (a))
138 #define IO_READ_2(sc, a) \
139 (sc)->sc_io_read_2 ? \
140 (sc)->sc_io_read_2((sc), (a)) : \
141 bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, (a))
142 #define IO_READ_MULTI_2(sc, a, b, c) \
143 if ((sc)->sc_io_read_multi_2) \
144 (sc)->sc_io_read_multi_2((sc), (a), (b), (c)); else \
145 bus_space_read_multi_2((sc)->sc_iot, (sc)->sc_ioh, (a), (b), (c))
146 #define IO_WRITE_2(sc, a, d) \
147 if ((sc)->sc_io_write_2) \
148 (sc)->sc_io_write_2((sc), (a), (d)); else \
149 bus_space_write_2((sc)->sc_iot, (sc)->sc_ioh, (a), (d))
150 #define IO_WRITE_MULTI_2(sc, a, d, c) \
151 if ((sc)->sc_io_write_multi_2) \
152 (sc)->sc_io_write_multi_2((sc), (a), (d), (c)); else \
153 bus_space_write_multi_2((sc)->sc_iot, (sc)->sc_ioh, (a), (d), (c))
154 #define MEM_READ_2(sc, a) \
155 (sc)->sc_mem_read_2 ? \
156 (sc)->sc_mem_read_2((sc), (a)) : \
157 bus_space_read_2((sc)->sc_memt, (sc)->sc_memh, (a))
158 #define MEM_WRITE_2(sc, a, d) \
159 if ((sc)->sc_mem_write_2) \
160 (sc)->sc_mem_write_2((sc), (a), (d)); else \
161 bus_space_write_2((sc)->sc_memt, (sc)->sc_memh, (a), (d))
162 #define MEM_WRITE_REGION_2(sc, a, d, c) \
163 if ((sc)->sc_mem_write_region_2) \
164 (sc)->sc_mem_write_region_2((sc), (a), (d), (c)); else \
165 bus_space_write_region_2((sc)->sc_memt, (sc)->sc_memh, (a), (d), (c))
168 /* Config Flags in cs_softc */
170 #define CFGFLG_MEM_MODE 0x0001
171 #define CFGFLG_USE_SA 0x0002
172 #define CFGFLG_IOCHRDY 0x0004
173 #define CFGFLG_DCDC_POL 0x0008
174 #define CFGFLG_DMA_MODE 0x0020
175 #define CFGFLG_ATTACHED 0x0040 /* XXX should not be here? */
176 #define CFGFLG_CARDBUS_HACK 0x0080
177 #define CFGFLG_ENABLED 0x0100 /* XXX should not be here? */
178 #define CFGFLG_PARSE_EEPROM 0x0200
179 #define CFGFLG_NOT_EEPROM 0x8000
183 * Inlines for reading/writing the packet page area.
186 static __inline u_int16_t
_cs_read_port(struct cs_softc
*, int);
188 static __inline u_int16_t
189 _cs_read_port(struct cs_softc
*sc
, int off
)
193 if (sc
->sc_cfgflags
& CFGFLG_CARDBUS_HACK
) {
195 * hack for EtherJet PCMCIA and cardbus (obtained from freebsd)
197 * EtherJet PCMCIA don't work with cardbus bridges
198 * (at least TI1250) without this hack.
200 result
= (IO_READ_1(sc
, off
) & 0xff);
201 result
|= ((IO_READ_1(sc
, off
+1) & 0xff) << 8);
204 result
= IO_READ_2(sc
, off
);
210 static __inline u_int16_t
_CS_READ_PACKET_PAGE_IO(struct cs_softc
*, int);
212 static __inline u_int16_t
213 _CS_READ_PACKET_PAGE_IO(struct cs_softc
*sc
, int offset
)
216 IO_WRITE_2(sc
, PORT_PKTPG_PTR
, offset
);
217 return (_cs_read_port(sc
, PORT_PKTPG_DATA
));
220 static __inline u_int16_t
CS_READ_PACKET_PAGE_IO(struct cs_softc
*, int);
222 static __inline u_int16_t
223 CS_READ_PACKET_PAGE_IO(struct cs_softc
*sc
, int offset
)
226 IO_WRITE_2(sc
, PORT_PKTPG_PTR
, offset
);
227 return (IO_READ_2(sc
, PORT_PKTPG_DATA
));
230 #define CS_READ_PACKET_PAGE_MEM(sc, offset) \
231 MEM_READ_2((sc), (offset))
233 #define CS_READ_PACKET_PAGE(sc, offset) \
234 ((sc)->sc_memorymode ? CS_READ_PACKET_PAGE_MEM((sc), (offset)) :\
235 _CS_READ_PACKET_PAGE_IO((sc), (offset)))
237 #define CS_WRITE_PACKET_PAGE_IO(sc, offset, val) \
239 IO_WRITE_2((sc), PORT_PKTPG_PTR, (offset)); \
240 IO_WRITE_2((sc), PORT_PKTPG_DATA, (val)); \
243 #define CS_WRITE_PACKET_PAGE_MEM(sc, offset, val) \
244 MEM_WRITE_2((sc), (offset), (val))
246 #define CS_WRITE_PACKET_PAGE(sc, offset, val) \
248 if ((sc)->sc_memorymode) \
249 CS_WRITE_PACKET_PAGE_MEM((sc), (offset), (val)); \
251 CS_WRITE_PACKET_PAGE_IO((sc), (offset), (val)); \
254 #define CS_READ_PORT(sc, off)\
255 IO_READ_2((sc), (off))
257 #define CS_WRITE_PORT(sc, off, val)\
258 IO_WRITE_2((sc), (off), (val))
266 /* Media Type in cs_softc */
268 #define MEDIA_AUI 0x0001
269 #define MEDIA_10BASE2 0x0002
270 #define MEDIA_10BASET 0x0003
273 /* Miscellaneous definitions */
275 #define MAXLOOP 0x8888
277 int cs_attach(struct cs_softc
*, u_int8_t
*, int *, int, int);
278 int cs_detach(struct cs_softc
*);
279 int cs_verify_eeprom(struct cs_softc
*);
280 int cs_read_eeprom(struct cs_softc
*, int, u_int16_t
*);
282 int cs_activate(device_t
, enum devact
);
283 void cs_ether_input(struct cs_softc
*, struct mbuf
*);
284 void cs_print_rx_errors(struct cs_softc
*, u_int16_t
);
285 int cs_init(struct ifnet
*);
287 #define CS_IS_ENABLED(sc) ((sc)->sc_cfgflags & CFGFLG_ENABLED)
289 #endif /* _DEV_IC_CS89X0VAR_H_ */