sys/dev/ic/hfa3861areg.h

   1 /* $NetBSD: hfa3861areg.h,v 1.3 2007/11/16 04:52:36 dyoung Exp $ */
   2 /* $Id: hfa3861areg.h,v 1.4 2009/10/19 23:19:39 rmind Exp $ */
   3 /*
   4  * Copyright (c) 2007 David Young.  All rights reserved.
   5  *
   6  * Written by David Young.
   7  *
   8  * Redistribution and use in source and binary forms, with or
   9  * without modification, are permitted provided that the following
  10  * conditions are met:
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above
  14  *    copyright notice, this list of conditions and the following
  15  *    disclaimer in the documentation and/or other materials provided
  16  *    with the distribution.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY DAVID YOUNG ``AS IS'' AND ANY
  19  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  20  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
  21  * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL DAVID
  22  * YOUNG BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  23  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
  24  * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  25  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  26  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  27  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
  29  * OF SUCH DAMAGE.
  30  */
  31 #ifndef _DEV_IC_HFA3861A_H_
  32 #define _DEV_IC_HFA3861A_H_
  33
  34 /* Register set for the Intersil HFA3861A. */
  35
  36 #define HFA3861A_CR5    0x0a    /* Tx signal field, read-write */
  37 #define HFA3861A_CR5_RSVD0      __BITS(7, 4)    /* reserved, set to 0 */
  38 #define HFA3861A_CR5_SHORTPRE   __BIT(3)        /* 0: long preamble,
  39                                                  * 1: short preamble
  40                                                  */
  41 #define HFA3861A_CR5_RSVD1      __BIT(2)        /* reserved, set to 0 */
  42 #define HFA3861A_CR5_RATE_MASK  __BITS(1, 0)    /* Tx data rate */
  43 /* 1, 2, 5.5, and 11 Mbps */
  44 #define HFA3861A_CR5_RATE_1     __SHIFTIN(0, HFA3861A_CR5_RATE_MASK)
  45 #define HFA3861A_CR5_RATE_2     __SHIFTIN(1, HFA3861A_CR5_RATE_MASK)
  46 #define HFA3861A_CR5_RATE_5     __SHIFTIN(2, HFA3861A_CR5_RATE_MASK)
  47 #define HFA3861A_CR5_RATE_11    __SHIFTIN(3, HFA3861A_CR5_RATE_MASK)
  48
  49 #define HFA3861A_CR6    0x0c    /* Tx service field: copied directly to 802.11
  50                                  * PLCP header
  51                                  */
  52 #define HFA3861A_CR7    0x0e    /* Tx length, hi: microseconds Tx duration */
  53 #define HFA3861A_CR8    0x10    /* Tx length, lo: microseconds Tx duration */
  54
  55 #define HFA3861A_CR49   0x62    /* Read-only register mux control */
  56 #define HFA3861A_CR49_SEL       __BIT(7)        /* 0: read-only register set 'b'
  57                                                  * 1: read-only register set 'a'
  58                                                  */
  59 #define HFA3861A_CR49_RSVD      __BITS(6, 0)
  60
  61 #define HFA3861A_CR61   0x7c    /* Rx status, read-only, sets 'a' & 'b' */
  62
  63 #define HFA3861A_CR62   0x7e    /* RSSI, read-only */
  64 #define HFA3861A_CR62_RSSI      __BITS(7, 0)    /* RSSI, sets 'a' & 'b' */
  65
  66 #define HFA3861A_CR63   0x80    /* Rx status, read-only */
  67 #define HFA3861A_CR63_SIGNAL_MASK       __BITS(7, 6)    /* signal field value,
  68                                                          * sets 'a' & 'b' */
  69 /* 1 Mbps */
  70 #define HFA3861A_CR63_SIGNAL_1MBPS      __SHIFTIN(0, HFA3861A_CR63_SIGNAL)
  71 /* 2 Mbps */
  72 #define HFA3861A_CR63_SIGNAL_2MBPS      __SHIFTIN(2, HFA3861A_CR63_SIGNAL)
  73 /* 5.5 or 11 Mbps */
  74 #define HFA3861A_CR63_SIGNAL_OTHER_MBPS __SHIFTIN(1, HFA3861A_CR63_SIGNAL)
  75 #define HFA3861A_CR63_SFD       __BIT(5)        /* SFD found, sets 'a' & 'b' */
  76 #define HFA3861A_CR63_SHORTPRE  __BIT(4)        /* short preamble detected,
  77                                                  * sets 'a' & 'b'
  78                                                  */
  79 #define HFA3861A_CR63_SIGNAL_OK __BIT(3)        /* valid signal field,
  80                                                  * sets 'a' & 'b'
  81                                                  */
  82 #define HFA3861A_CR63_CRC16_OK  __BIT(2)        /* valid CRC 16,
  83                                                  * sets 'a' & 'b'
  84                                                  */
  85 #define HFA3861A_CR63_ANTENNA   __BIT(1)        /* antenna used,
  86                                                  * sets 'a' & 'b'
  87                                                  */
  88 #define HFA3861A_CR63_RSVD      __BIT(0)        /* reserved, sets 'a' & 'b' */
  89
  90 #endif /* _DEV_IC_HFA3861A_H_ */