sys/dev/ic/intersil7170.c

   1 /*      $NetBSD: intersil7170.c,v 1.11 2008/01/10 16:04:58 tsutsui Exp $ */
   2 /*-
   3  * Copyright (c) 2000 The NetBSD Foundation, Inc.
   4  * All rights reserved.
   5  *
   6  * This code is derived from software contributed to The NetBSD Foundation
   7  * by Paul Kranenburg.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  19  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  20  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  21  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  22  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  28  * POSSIBILITY OF SUCH DAMAGE.
  29  */
  30
  31 /*
  32  * Intersil 7170 time-of-day chip subroutines.
  33  */
  34
  35 #include <sys/cdefs.h>
  36 __KERNEL_RCSID(0, "$NetBSD: intersil7170.c,v 1.11 2008/01/10 16:04:58 tsutsui Exp $");
  37
  38 #include <sys/param.h>
  39 #include <sys/malloc.h>
  40 #include <sys/systm.h>
  41 #include <sys/device.h>
  42 #include <sys/errno.h>
  43
  44 #include <sys/bus.h>
  45 #include <dev/clock_subr.h>
  46 #include <dev/ic/intersil7170reg.h>
  47 #include <dev/ic/intersil7170var.h>
  48
  49 int intersil7170_gettime_ymdhms(todr_chip_handle_t, struct clock_ymdhms *);
  50 int intersil7170_settime_ymdhms(todr_chip_handle_t, struct clock_ymdhms *);
  51
  52 void
  53 intersil7170_attach(struct intersil7170_softc *sc)
  54 {
  55         todr_chip_handle_t handle;
  56
  57         aprint_normal(": intersil7170");
  58
  59         handle = &sc->sc_handle;
  60
  61         handle->cookie = sc;
  62         handle->todr_gettime = NULL;
  63         handle->todr_settime = NULL;
  64         handle->todr_gettime_ymdhms = intersil7170_gettime_ymdhms;
  65         handle->todr_settime_ymdhms = intersil7170_settime_ymdhms;
  66         handle->todr_setwen = NULL;
  67
  68         todr_attach(handle);
  69 }
  70
  71 /*
  72  * Set up the system's time, given a `reasonable' time value.
  73  */
  74 int
  75 intersil7170_gettime_ymdhms(todr_chip_handle_t handle, struct clock_ymdhms *dt)
  76 {
  77         struct intersil7170_softc *sc = handle->cookie;
  78         bus_space_tag_t bt = sc->sc_bst;
  79         bus_space_handle_t bh = sc->sc_bsh;
  80         uint8_t cmd;
  81         int year;
  82         int s;
  83
  84         /* No interrupts while we're fiddling with the chip */
  85         s = splhigh();
  86
  87         /* Enable read (stop time) */
  88         cmd = INTERSIL_COMMAND(INTERSIL_CMD_STOP, INTERSIL_CMD_IENABLE);
  89         bus_space_write_1(bt, bh, INTERSIL_ICMD, cmd);
  90
  91         /* The order of reading out the clock elements is important */
  92         (void)bus_space_read_1(bt, bh, INTERSIL_ICSEC); /* not used */
  93         dt->dt_hour = bus_space_read_1(bt, bh, INTERSIL_IHOUR);
  94         dt->dt_min = bus_space_read_1(bt, bh, INTERSIL_IMIN);
  95         dt->dt_sec = bus_space_read_1(bt, bh, INTERSIL_ISEC);
  96         dt->dt_mon = bus_space_read_1(bt, bh, INTERSIL_IMON);
  97         dt->dt_day = bus_space_read_1(bt, bh, INTERSIL_IDAY);
  98         year = bus_space_read_1(bt, bh, INTERSIL_IYEAR);
  99         dt->dt_wday = bus_space_read_1(bt, bh, INTERSIL_IDOW);
 100
 101         /* Done writing (time wears on) */
 102         cmd = INTERSIL_COMMAND(INTERSIL_CMD_RUN, INTERSIL_CMD_IENABLE);
 103         bus_space_write_1(bt, bh, INTERSIL_ICMD, cmd);
 104         splx(s);
 105
 106         year += sc->sc_year0;
 107         if (year < POSIX_BASE_YEAR &&
 108             (sc->sc_flag & INTERSIL7170_NO_CENT_ADJUST) == 0)
 109                 year += 100;
 110
 111         dt->dt_year = year;
 112
 113         return 0;
 114 }
 115
 116 /*
 117  * Reset the clock based on the current time.
 118  */
 119 int
 120 intersil7170_settime_ymdhms(todr_chip_handle_t handle, struct clock_ymdhms *dt)
 121 {
 122         struct intersil7170_softc *sc = handle->cookie;
 123         bus_space_tag_t bt = sc->sc_bst;
 124         bus_space_handle_t bh = sc->sc_bsh;
 125         uint8_t cmd;
 126         int year;
 127         int s;
 128
 129         year = dt->dt_year - sc->sc_year0;
 130         if (year > 99 && (sc->sc_flag & INTERSIL7170_NO_CENT_ADJUST) == 0)
 131                 year -= 100;
 132
 133         /* No interrupts while we're fiddling with the chip */
 134         s = splhigh();
 135
 136         /* Enable write (stop time) */
 137         cmd = INTERSIL_COMMAND(INTERSIL_CMD_STOP, INTERSIL_CMD_IENABLE);
 138         bus_space_write_1(bt, bh, INTERSIL_ICMD, cmd);
 139
 140         /* The order of reading writing the clock elements is important */
 141         bus_space_write_1(bt, bh, INTERSIL_ICSEC, 0);
 142         bus_space_write_1(bt, bh, INTERSIL_IHOUR, dt->dt_hour);
 143         bus_space_write_1(bt, bh, INTERSIL_IMIN, dt->dt_min);
 144         bus_space_write_1(bt, bh, INTERSIL_ISEC, dt->dt_sec);
 145         bus_space_write_1(bt, bh, INTERSIL_IMON, dt->dt_mon);
 146         bus_space_write_1(bt, bh, INTERSIL_IDAY, dt->dt_day);
 147         bus_space_write_1(bt, bh, INTERSIL_IYEAR, year);
 148         bus_space_write_1(bt, bh, INTERSIL_IDOW, dt->dt_wday);
 149
 150         /* Done writing (time wears on) */
 151         cmd = INTERSIL_COMMAND(INTERSIL_CMD_RUN, INTERSIL_CMD_IENABLE);
 152         bus_space_write_1(bt, bh, INTERSIL_ICMD, cmd);
 153         splx(s);
 154
 155         return 0;
 156 }