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Expand PMF_FN_* macros.
[netbsd-mini2440.git] / sys / dev / ic / ncr5380sbc.c
blob2498e0b6d1a39f81a1048432f6e79834c1d3482e
1 /* $NetBSD: ncr5380sbc.c,v 1.63 2008/04/04 16:00:58 tsutsui Exp $ */
2
3 /*
4 * Copyright (c) 1995 David Jones, Gordon W. Ross
5 * Copyright (c) 1994 Jarle Greipsland
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. The name of the authors may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
18 * 4. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by
21 * David Jones and Gordon Ross
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35 /*
36 * This is a machine-independent driver for the NCR5380
37 * SCSI Bus Controller (SBC), also known as the Am5380.
38 *
39 * This code should work with any memory-mapped 5380,
40 * and can be shared by multiple adapters that address
41 * the 5380 with different register offset spacings.
42 * (This can happen on the atari, for example.)
43 * For porting/design info. see: ncr5380.doc
44 *
45 * Credits, history:
46 *
47 * David Jones is the author of most of the code that now
48 * appears in this file, and was the architect of the
49 * current overall structure (MI/MD code separation, etc.)
50 *
51 * Gordon Ross integrated the message phase code, added lots of
52 * comments about what happens when and why (re. SCSI spec.),
53 * debugged some reentrance problems, and added several new
54 * "hooks" needed for the Sun3 "si" adapters.
55 *
56 * The message in/out code was taken nearly verbatim from
57 * the aic6360 driver by Jarle Greipsland.
58 *
59 * Several other NCR5380 drivers were used for reference
60 * while developing this driver, including work by:
61 * The Alice Group (mac68k port) namely:
62 * Allen K. Briggs, Chris P. Caputo, Michael L. Finch,
63 * Bradley A. Grantham, and Lawrence A. Kesteloot
64 * Michael L. Hitch (amiga drivers: sci.c)
65 * Leo Weppelman (atari driver: ncr5380.c)
66 * There are others too. Thanks, everyone.
67 *
68 * Transliteration to bus_space() performed 9/17/98 by
69 * John Ruschmeyer (jruschme@exit109.com) for i386 'nca' driver.
70 * Thank you all.
71 */
72
73 #include <sys/cdefs.h>
74 __KERNEL_RCSID(0, "$NetBSD: ncr5380sbc.c,v 1.63 2008/04/04 16:00:58 tsutsui Exp $");
75
76 #include "opt_ddb.h"
77
78 #include <sys/param.h>
79 #include <sys/systm.h>
80 #include <sys/kernel.h>
81 #include <sys/errno.h>
82 #include <sys/device.h>
83 #include <sys/buf.h>
84 #include <sys/proc.h>
85
86 #include <dev/scsipi/scsi_all.h>
87 #include <dev/scsipi/scsipi_all.h>
88 #include <dev/scsipi/scsipi_debug.h>
89 #include <dev/scsipi/scsi_message.h>
90 #include <dev/scsipi/scsiconf.h>
91
92 #ifdef DDB
93 #include <ddb/db_output.h>
94 #endif
95
96 #include <dev/ic/ncr5380reg.h>
97 #include <dev/ic/ncr5380var.h>
98 #include <dev/ic/ncr53c400reg.h>
99
100 static void ncr5380_reset_scsibus(struct ncr5380_softc *);
101 static void ncr5380_sched(struct ncr5380_softc *);
102 static void ncr5380_done(struct ncr5380_softc *);
103
104 static int ncr5380_select(struct ncr5380_softc *, struct sci_req *);
105 static void ncr5380_reselect(struct ncr5380_softc *);
106
107 static int ncr5380_msg_in(struct ncr5380_softc *);
108 static int ncr5380_msg_out(struct ncr5380_softc *);
109 static int ncr5380_data_xfer(struct ncr5380_softc *, int);
110 static int ncr5380_command(struct ncr5380_softc *);
111 static int ncr5380_status(struct ncr5380_softc *);
112 static void ncr5380_machine(struct ncr5380_softc *);
113
114 void ncr5380_abort(struct ncr5380_softc *);
115 void ncr5380_cmd_timeout(void *);
116 /*
117 * Action flags returned by the info_transfer functions:
118 * (These determine what happens next.)
119 */
120 #define ACT_CONTINUE 0x00 /* No flags: expect another phase */
121 #define ACT_DISCONNECT 0x01 /* Target is disconnecting */
122 #define ACT_CMD_DONE 0x02 /* Need to call scsipi_done() */
123 #define ACT_RESET_BUS 0x04 /* Need bus reset (cmd timeout) */
124 #define ACT_WAIT_DMA 0x10 /* Wait for DMA to complete */
125
126 /*****************************************************************
127 * Debugging stuff
128 *****************************************************************/
129
130 #ifndef DDB
131 /* This is used only in recoverable places. */
132 #ifndef Debugger
133 #define Debugger() printf("Debug: ncr5380.c:%d\n", __LINE__)
134 #endif
135 #endif
136
137 #ifdef NCR5380_DEBUG
138
139 #define NCR_DBG_BREAK 1
140 #define NCR_DBG_CMDS 2
141 int ncr5380_debug = 0;
142 #define NCR_BREAK() \
143 do { if (ncr5380_debug & NCR_DBG_BREAK) Debugger(); } while (0)
144 static void ncr5380_show_scsi_cmd(struct scsipi_xfer *);
145 #ifdef DDB
146 void ncr5380_clear_trace(void);
147 void ncr5380_show_trace(void);
148 void ncr5380_show_req(struct sci_req *);
149 void ncr5380_show_state(void);
150 #endif /* DDB */
151 #else /* NCR5380_DEBUG */
152
153 #define NCR_BREAK() /* nada */
154 #define ncr5380_show_scsi_cmd(xs) /* nada */
155
156 #endif /* NCR5380_DEBUG */
157
158 static const char *
159 phase_names[8] = {
160 "DATA_OUT",
161 "DATA_IN",
162 "COMMAND",
163 "STATUS",
164 "UNSPEC1",
165 "UNSPEC2",
166 "MSG_OUT",
167 "MSG_IN",
168 };
169
170 /*****************************************************************
171 * Actual chip control
172 *****************************************************************/
173
174 /*
175 * XXX: These timeouts might need to be tuned...
176 */
177
178 /* This one is used when waiting for a phase change. (X100uS.) */
179 int ncr5380_wait_phase_timo = 1000 * 10 * 300; /* 5 min. */
180
181 /* These are used in the following inline functions. */
182 int ncr5380_wait_req_timo = 1000 * 50; /* X2 = 100 mS. */
183 int ncr5380_wait_nrq_timo = 1000 * 25; /* X2 = 50 mS. */
184
185 static inline int ncr5380_wait_req(struct ncr5380_softc *);
186 static inline int ncr5380_wait_not_req(struct ncr5380_softc *);
187 static inline void ncr_sched_msgout(struct ncr5380_softc *, int);
188
189 /* Return zero on success. */
190 static inline int
191 ncr5380_wait_req(struct ncr5380_softc *sc)
192 {
193 int timo = ncr5380_wait_req_timo;
194
195 for (;;) {
196 if (NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_REQ) {
197 timo = 0; /* return 0 */
198 break;
199 }
200 if (--timo < 0)
201 break; /* return -1 */
202 delay(2);
203 }
204 return timo;
205 }
206
207 /* Return zero on success. */
208 static inline int
209 ncr5380_wait_not_req(struct ncr5380_softc *sc)
210 {
211 int timo = ncr5380_wait_nrq_timo;
212
213 for (;;) {
214 if ((NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_REQ) == 0) {
215 timo = 0; /* return 0 */
216 break;
217 }
218 if (--timo < 0)
219 break; /* return -1 */
220 delay(2);
221 }
222 return timo;
223 }
224
225 /* Ask the target for a MSG_OUT phase. */
226 static inline void
227 ncr_sched_msgout(struct ncr5380_softc *sc, int msg_code)
228 {
229
230 /* First time, raise ATN line. */
231 if (sc->sc_msgpriq == 0) {
232 uint8_t icmd;
233 icmd = NCR5380_READ(sc, sci_icmd) & SCI_ICMD_RMASK;
234 NCR5380_WRITE(sc, sci_icmd, (icmd | SCI_ICMD_ATN));
235 delay(2);
236 }
237 sc->sc_msgpriq |= msg_code;
238 }
239
240
241 int
242 ncr5380_pio_out(struct ncr5380_softc *sc, int phase, int count, uint8_t *data)
243 {
244 uint8_t icmd;
245 int resid;
246 int error;
247
248 icmd = NCR5380_READ(sc, sci_icmd) & SCI_ICMD_RMASK;
249
250 icmd |= SCI_ICMD_DATA;
251 NCR5380_WRITE(sc, sci_icmd, icmd);
252
253 resid = count;
254 while (resid > 0) {
255 if (!SCI_BUSY(sc)) {
256 NCR_TRACE("pio_out: lost BSY, resid=%d\n", resid);
257 break;
258 }
259 if (ncr5380_wait_req(sc)) {
260 NCR_TRACE("pio_out: no REQ, resid=%d\n", resid);
261 break;
262 }
263 if (SCI_BUS_PHASE(NCR5380_READ(sc, sci_bus_csr)) != phase)
264 break;
265
266 /* Put the data on the bus. */
267 if (data)
268 NCR5380_WRITE(sc, sci_odata, *data++);
269 else
270 NCR5380_WRITE(sc, sci_odata, 0);
271
272 /* Tell the target it's there. */
273 icmd |= SCI_ICMD_ACK;
274 NCR5380_WRITE(sc, sci_icmd, icmd);
275
276 /* Wait for target to get it. */
277 error = ncr5380_wait_not_req(sc);
278
279 /* OK, it's got it (or we gave up waiting). */
280 icmd &= ~SCI_ICMD_ACK;
281 NCR5380_WRITE(sc, sci_icmd, icmd);
282
283 if (error) {
284 NCR_TRACE("pio_out: stuck REQ, resid=%d\n", resid);
285 break;
286 }
287
288 --resid;
289 }
290
291 /* Stop driving the data bus. */
292 icmd &= ~SCI_ICMD_DATA;
293 NCR5380_WRITE(sc, sci_icmd, icmd);
294
295 return count - resid;
296 }
297
298
299 int
300 ncr5380_pio_in(struct ncr5380_softc *sc, int phase, int count, uint8_t *data)
301 {
302 uint8_t icmd;
303 int resid;
304 int error;
305
306 icmd = NCR5380_READ(sc, sci_icmd) & SCI_ICMD_RMASK;
307
308 resid = count;
309 while (resid > 0) {
310 if (!SCI_BUSY(sc)) {
311 NCR_TRACE("pio_in: lost BSY, resid=%d\n", resid);
312 break;
313 }
314 if (ncr5380_wait_req(sc)) {
315 NCR_TRACE("pio_in: no REQ, resid=%d\n", resid);
316 break;
317 }
318 /* A phase change is not valid until AFTER REQ rises! */
319 if (SCI_BUS_PHASE(NCR5380_READ(sc, sci_bus_csr)) != phase)
320 break;
321
322 /* Read the data bus. */
323 if (data)
324 *data++ = NCR5380_READ(sc, sci_data);
325 else
326 (void) NCR5380_READ(sc, sci_data);
327
328 /* Tell target we got it. */
329 icmd |= SCI_ICMD_ACK;
330 NCR5380_WRITE(sc, sci_icmd, icmd);
331
332 /* Wait for target to drop REQ... */
333 error = ncr5380_wait_not_req(sc);
334
335 /* OK, we can drop ACK. */
336 icmd &= ~SCI_ICMD_ACK;
337 NCR5380_WRITE(sc, sci_icmd, icmd);
338
339 if (error) {
340 NCR_TRACE("pio_in: stuck REQ, resid=%d\n", resid);
341 break;
342 }
343
344 --resid;
345 }
346
347 return count - resid;
348 }
349
350
351 void
352 ncr5380_init(struct ncr5380_softc *sc)
353 {
354 int i, j;
355
356 #ifdef NCR5380_DEBUG
357 ncr5380_debug_sc = sc;
358 #endif
359
360 for (i = 0; i < SCI_OPENINGS; i++)
361 sc->sc_ring[i].sr_xs = NULL;
362 for (i = 0; i < 8; i++)
363 for (j = 0; j < 8; j++)
364 sc->sc_matrix[i][j] = NULL;
365
366 sc->sc_prevphase = PHASE_INVALID;
367 sc->sc_state = NCR_IDLE;
368
369 #ifdef NCR5380_USE_BUS_SPACE
370 if (sc->sc_rev == NCR_VARIANT_NCR53C400)
371 bus_space_write_1(sc->sc_regt, sc->sc_regh, C400_CSR,
372 C400_CSR_5380_ENABLE);
373 #endif
374
375 NCR5380_WRITE(sc, sci_tcmd, PHASE_INVALID);
376 NCR5380_WRITE(sc, sci_icmd, 0);
377 NCR5380_WRITE(sc, sci_mode, 0);
378 NCR5380_WRITE(sc, sci_sel_enb, 0);
379 SCI_CLR_INTR(sc);
380
381 /* XXX: Enable reselect interrupts... */
382 NCR5380_WRITE(sc, sci_sel_enb, 0x80);
383
384 /* Another hack (Er.. hook!) for the sun3 si: */
385 if (sc->sc_intr_on) {
386 NCR_TRACE("init: intr ON\n", 0);
387 sc->sc_intr_on(sc);
388 }
389 }
390
391
392 static void
393 ncr5380_reset_scsibus(struct ncr5380_softc *sc)
394 {
395
396 NCR_TRACE("reset_scsibus, cur=0x%x\n",
397 (long) sc->sc_current);
398
399 NCR5380_WRITE(sc, sci_icmd, SCI_ICMD_RST);
400 delay(500);
401 NCR5380_WRITE(sc, sci_icmd, 0);
402
403 NCR5380_WRITE(sc, sci_mode, 0);
404 NCR5380_WRITE(sc, sci_tcmd, PHASE_INVALID);
405
406 SCI_CLR_INTR(sc);
407 /* XXX - Need long delay here! */
408 delay(100000);
409
410 /* XXX - Need to cancel disconnected requests. */
411 }
412
413
414 /*
415 * Interrupt handler for the SCSI Bus Controller (SBC)
416 * This may also called for a DMA timeout (at splbio).
417 */
418 int
419 ncr5380_intr(void *arg)
420 {
421 struct ncr5380_softc *sc = arg;
422 int claimed = 0;
423
424 /*
425 * Do not touch SBC regs here unless sc_current == NULL
426 * or it will complain about "register conflict" errors.
427 * Instead, just let ncr5380_machine() deal with it.
428 */
429 NCR_TRACE("intr: top, state=%d\n", sc->sc_state);
430
431 if (sc->sc_state == NCR_IDLE) {
432 /*
433 * Might be reselect. ncr5380_reselect() will check,
434 * and set up the connection if so. This will verify
435 * that sc_current == NULL at the beginning...
436 */
437
438 /* Another hack (Er.. hook!) for the sun3 si: */
439 if (sc->sc_intr_off) {
440 NCR_TRACE("intr: for reselect, intr off\n", 0);
441 sc->sc_intr_off(sc);
442 }
443
444 ncr5380_reselect(sc);
445 }
446
447 /*
448 * The remaining documented interrupt causes are phase mismatch and
449 * disconnect. In addition, the sunsi controller may produce a state
450 * where SCI_CSR_DONE is false, yet DMA is complete.
451 *
452 * The procedure in all these cases is to let ncr5380_machine()
453 * figure out what to do next.
454 */
455 if (sc->sc_state & NCR_WORKING) {
456 NCR_TRACE("intr: call machine, cur=0x%x\n",
457 (long) sc->sc_current);
458 /* This will usually free-up the nexus. */
459 ncr5380_machine(sc);
460 NCR_TRACE("intr: machine done, cur=0x%x\n",
461 (long) sc->sc_current);
462 claimed = 1;
463 }
464
465 /* Maybe we can run some commands now... */
466 if (sc->sc_state == NCR_IDLE) {
467 NCR_TRACE("intr: call sched, cur=0x%x\n",
468 (long) sc->sc_current);
469 ncr5380_sched(sc);
470 NCR_TRACE("intr: sched done, cur=0x%x\n",
471 (long) sc->sc_current);
472 }
473
474 return claimed;
475 }
476
477
478 /*
479 * Abort the current command (i.e. due to timeout)
480 */
481 void
482 ncr5380_abort(struct ncr5380_softc *sc)
483 {
484
485 /*
486 * Finish it now. If DMA is in progress, we
487 * can not call ncr_sched_msgout() because
488 * that hits the SBC (avoid DMA conflict).
489 */
490
491 /* Another hack (Er.. hook!) for the sun3 si: */
492 if (sc->sc_intr_off) {
493 NCR_TRACE("abort: intr off\n", 0);
494 sc->sc_intr_off(sc);
495 }
496
497 sc->sc_state |= NCR_ABORTING;
498 if ((sc->sc_state & NCR_DOINGDMA) == 0) {
499 ncr_sched_msgout(sc, SEND_ABORT);
500 }
501 NCR_TRACE("abort: call machine, cur=0x%x\n",
502 (long) sc->sc_current);
503 ncr5380_machine(sc);
504 NCR_TRACE("abort: machine done, cur=0x%x\n",
505 (long) sc->sc_current);
506
507 /* Another hack (Er.. hook!) for the sun3 si: */
508 if (sc->sc_intr_on) {
509 NCR_TRACE("abort: intr ON\n", 0);
510 sc->sc_intr_on(sc);
511 }
512 }
513
514 /*
515 * Timeout handler, scheduled for each SCSI command.
516 */
517 void
518 ncr5380_cmd_timeout(void *arg)
519 {
520 struct sci_req *sr = arg;
521 struct scsipi_xfer *xs;
522 struct scsipi_periph *periph;
523 struct ncr5380_softc *sc;
524 int s;
525
526 s = splbio();
527
528 /* Get all our variables... */
529 xs = sr->sr_xs;
530 if (xs == NULL) {
531 printf("ncr5380_cmd_timeout: no scsipi_xfer\n");
532 goto out;
533 }
534 periph = xs->xs_periph;
535 sc = device_private(periph->periph_channel->chan_adapter->adapt_dev);
536
537 printf("%s: cmd timeout, targ=%d, lun=%d\n",
538 device_xname(sc->sc_dev),
539 sr->sr_target, sr->sr_lun);
540
541 /*
542 * Mark the overdue job as failed, and arrange for
543 * ncr5380_machine to terminate it. If the victim
544 * is the current job, call ncr5380_machine() now.
545 * Otherwise arrange for ncr5380_sched() to do it.
546 */
547 sr->sr_flags |= SR_OVERDUE;
548 if (sc->sc_current == sr) {
549 NCR_TRACE("cmd_tmo: call abort, sr=0x%x\n", (long) sr);
550 ncr5380_abort(sc);
551 } else {
552 /*
553 * The driver may be idle, or busy with another job.
554 * Arrange for ncr5380_sched() to do the deed.
555 */
556 NCR_TRACE("cmd_tmo: clear matrix, t/l=0x%02x\n",
557 (sr->sr_target << 4) | sr->sr_lun);
558 sc->sc_matrix[sr->sr_target][sr->sr_lun] = NULL;
559 }
560
561 /*
562 * We may have aborted the current job, or may have
563 * already been idle. In either case, we should now
564 * be idle, so try to start another job.
565 */
566 if (sc->sc_state == NCR_IDLE) {
567 NCR_TRACE("cmd_tmo: call sched, cur=0x%x\n",
568 (long) sc->sc_current);
569 ncr5380_sched(sc);
570 NCR_TRACE("cmd_tmo: sched done, cur=0x%x\n",
571 (int)sc->sc_current);
572 }
573
574 out:
575 splx(s);
576 }
577
578
579 /*****************************************************************
580 * Interface to higher level
581 *****************************************************************/
582
583
584 /*
585 * Enter a new SCSI command into the "issue" queue, and
586 * if there is work to do, start it going.
587 *
588 * WARNING: This can be called recursively!
589 * (see comment in ncr5380_done)
590 */
591
592 void
593 ncr5380_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req,
594 void *arg)
595 {
596 struct scsipi_xfer *xs;
597 struct scsipi_periph *periph;
598 struct ncr5380_softc *sc;
599 struct sci_req *sr;
600 int s, i, flags;
601
602 sc = device_private(chan->chan_adapter->adapt_dev);
603
604 switch (req) {
605 case ADAPTER_REQ_RUN_XFER:
606 xs = arg;
607 periph = xs->xs_periph;
608 flags = xs->xs_control;
609
610 if (flags & XS_CTL_DATA_UIO)
611 panic("%s: scsi data uio requested", __func__);
612
613 s = splbio();
614
615 if (flags & XS_CTL_POLL) {
616 /* Terminate any current command. */
617 sr = sc->sc_current;
618 if (sr) {
619 printf("%s: polled request aborting %d/%d\n",
620 device_xname(sc->sc_dev),
621 sr->sr_target, sr->sr_lun);
622 ncr5380_abort(sc);
623 }
624 if (sc->sc_state != NCR_IDLE) {
625 panic("%s: polled request, abort failed",
626 __func__);
627 }
628 }
629
630 /*
631 * Find lowest empty slot in ring buffer.
632 * XXX: What about "fairness" and cmd order?
633 */
634 for (i = 0; i < SCI_OPENINGS; i++)
635 if (sc->sc_ring[i].sr_xs == NULL)
636 goto new;
637
638 /*
639 * This should never happen as we track the resources
640 * in the mid-layer.
641 */
642 scsipi_printaddr(periph);
643 printf("unable to allocate ring slot\n");
644 panic("%s", __func__);
645
646 new:
647 /* Create queue entry */
648 sr = &sc->sc_ring[i];
649 sr->sr_xs = xs;
650 sr->sr_target = periph->periph_target;
651 sr->sr_lun = periph->periph_lun;
652 sr->sr_dma_hand = NULL;
653 sr->sr_dataptr = xs->data;
654 sr->sr_datalen = xs->datalen;
655 sr->sr_flags = (flags & XS_CTL_POLL) ? SR_IMMED : 0;
656 if (xs->xs_control & XS_CTL_REQSENSE)
657 sr->sr_flags |= SR_IMMED; /* no disconnect */
658 sr->sr_status = -1; /* no value */
659 sc->sc_ncmds++;
660
661 NCR_TRACE("scsipi_cmd: new sr=0x0\n", (long)sr);
662
663 if (flags & XS_CTL_POLL) {
664 /* Force this new command to be next. */
665 sc->sc_rr = i;
666 }
667
668 /*
669 * If we were idle, run some commands...
670 */
671 if (sc->sc_state == NCR_IDLE) {
672 NCR_TRACE("scsipi_cmd: call sched, cur=0x%x\n",
673 (long) sc->sc_current);
674 ncr5380_sched(sc);
675 NCR_TRACE("scsipi_cmd: sched done, cur=0x%x\n",
676 (long) sc->sc_current);
677 }
678
679 if (flags & XS_CTL_POLL) {
680 /* Make sure ncr5380_sched() finished it. */
681 if ((xs->xs_status & XS_STS_DONE) == 0)
682 panic("%s: poll didn't finish", __func__);
683 }
684 splx(s);
685 return;
686
687 case ADAPTER_REQ_GROW_RESOURCES:
688 /* XXX Not supported. */
689 return;
690
691 case ADAPTER_REQ_SET_XFER_MODE:
692 {
693 /*
694 * We don't support Sync, Wide, or Tagged Queueing.
695 * Just callback now, to report this.
696 */
697 struct scsipi_xfer_mode *xm = arg;
698
699 xm->xm_mode = 0;
700 xm->xm_period = 0;
701 xm->xm_offset = 0;
702 scsipi_async_event(chan, ASYNC_EVENT_XFER_MODE, xm);
703 return;
704 }
705 }
706 }
707
708 /*
709 * POST PROCESSING OF SCSI_CMD (usually current)
710 * Called by ncr5380_sched(), ncr5380_machine()
711 */
712 static void
713 ncr5380_done(struct ncr5380_softc *sc)
714 {
715 struct sci_req *sr;
716 struct scsipi_xfer *xs;
717
718 #ifdef DIAGNOSTIC
719 if (sc->sc_state == NCR_IDLE)
720 panic("%s: state=idle", __func__);
721 if (sc->sc_current == NULL)
722 panic("%s: current=0", __func__);
723 #endif
724
725 sr = sc->sc_current;
726 xs = sr->sr_xs;
727
728 NCR_TRACE("done: top, cur=0x%x\n", (long) sc->sc_current);
729
730 /*
731 * Clean up DMA resources for this command.
732 */
733 if (sr->sr_dma_hand) {
734 NCR_TRACE("done: dma_free, dh=0x%x\n",
735 (long) sr->sr_dma_hand);
736 (*sc->sc_dma_free)(sc);
737 }
738 #ifdef DIAGNOSTIC
739 if (sr->sr_dma_hand)
740 panic("%s: DMA free did not", __func__);
741 #endif
742
743 if (sc->sc_state & NCR_ABORTING) {
744 NCR_TRACE("done: aborting, error=%d\n", xs->error);
745 if (xs->error == XS_NOERROR)
746 xs->error = XS_TIMEOUT;
747 }
748
749 NCR_TRACE("done: check error=%d\n", (long) xs->error);
750
751 /* If error is already set, ignore sr_status value. */
752 if (xs->error != XS_NOERROR)
753 goto finish;
754
755 NCR_TRACE("done: check status=%d\n", sr->sr_status);
756
757 xs->status = sr->sr_status;
758 switch (sr->sr_status) {
759 case SCSI_OK: /* 0 */
760 xs->error = XS_NOERROR;
761 break;
762
763 case SCSI_CHECK:
764 case SCSI_BUSY:
765 xs->error = XS_BUSY;
766 break;
767
768 case -1:
769 /* This is our "impossible" initial value. */
770 /* fallthrough */
771 default:
772 printf("%s: target %d, bad status=%d\n",
773 device_xname(sc->sc_dev), sr->sr_target, sr->sr_status);
774 xs->error = XS_DRIVER_STUFFUP;
775 break;
776 }
777
778 finish:
779
780 NCR_TRACE("done: finish, error=%d\n", xs->error);
781
782 /*
783 * Dequeue the finished command, but don't clear sc_state until
784 * after the call to scsipi_done(), because that may call back to
785 * ncr5380_scsi_cmd() - unwanted recursion!
786 *
787 * Keeping sc->sc_state != idle terminates the recursion.
788 */
789 #ifdef DIAGNOSTIC
790 if ((sc->sc_state & NCR_WORKING) == 0)
791 panic("%s: bad state", __func__);
792 #endif
793
794 /* Clear our pointers to the request. */
795 sc->sc_current = NULL;
796 sc->sc_matrix[sr->sr_target][sr->sr_lun] = NULL;
797 callout_stop(&sr->sr_xs->xs_callout);
798
799 /* Make the request free. */
800 sr->sr_xs = NULL;
801 sc->sc_ncmds--;
802
803 /* Tell common SCSI code it is done. */
804 scsipi_done(xs);
805
806 sc->sc_state = NCR_IDLE;
807 /* Now ncr5380_sched() may be called again. */
808 }
809
810
811 /*
812 * Schedule a SCSI operation. This routine should return
813 * only after it achieves one of the following conditions:
814 * Busy (sc->sc_state != NCR_IDLE)
815 * No more work can be started.
816 */
817 static void
818 ncr5380_sched(struct ncr5380_softc *sc)
819 {
820 struct sci_req *sr;
821 struct scsipi_xfer *xs;
822 int target = 0, lun = 0;
823 int error, i;
824
825 /* Another hack (Er.. hook!) for the sun3 si: */
826 if (sc->sc_intr_off) {
827 NCR_TRACE("sched: top, intr off\n", 0);
828 sc->sc_intr_off(sc);
829 }
830
831 next_job:
832 /*
833 * Grab the next job from queue. Must be idle.
834 */
835 #ifdef DIAGNOSTIC
836 if (sc->sc_state != NCR_IDLE)
837 panic("%s: not idle", __func__);
838 if (sc->sc_current)
839 panic("%s: current set", __func__);
840 #endif
841
842 /*
843 * Always start the search where we last looked.
844 * The REQUEST_SENSE logic depends on this to
845 * choose the same job as was last picked, so it
846 * can just clear sc_current and reschedule.
847 * (Avoids loss of "contingent allegiance".)
848 */
849 i = sc->sc_rr;
850 sr = NULL;
851 do {
852 if (sc->sc_ring[i].sr_xs) {
853 target = sc->sc_ring[i].sr_target;
854 lun = sc->sc_ring[i].sr_lun;
855 if (sc->sc_matrix[target][lun] == NULL) {
856 /*
857 * Do not mark the target/LUN busy yet,
858 * because reselect may cause some other
859 * job to become the current one, so we
860 * might not actually start this job.
861 * Instead, set sc_matrix later on.
862 */
863 sc->sc_rr = i;
864 sr = &sc->sc_ring[i];
865 break;
866 }
867 }
868 i++;
869 if (i == SCI_OPENINGS)
870 i = 0;
871 } while (i != sc->sc_rr);
872
873 if (sr == NULL) {
874 NCR_TRACE("sched: no work, cur=0x%x\n",
875 (long) sc->sc_current);
876
877 /* Another hack (Er.. hook!) for the sun3 si: */
878 if (sc->sc_intr_on) {
879 NCR_TRACE("sched: ret, intr ON\n", 0);
880 sc->sc_intr_on(sc);
881 }
882
883 return; /* No more work to do. */
884 }
885
886 NCR_TRACE("sched: select for t/l=0x%02x\n",
887 (sr->sr_target << 4) | sr->sr_lun);
888
889 sc->sc_state = NCR_WORKING;
890 error = ncr5380_select(sc, sr);
891 if (sc->sc_current) {
892 /* Lost the race! reselected out from under us! */
893 /* Work with the reselected job. */
894 if (sr->sr_flags & SR_IMMED) {
895 printf("%s: reselected while polling (abort)\n",
896 device_xname(sc->sc_dev));
897 /* Abort the reselected job. */
898 sc->sc_state |= NCR_ABORTING;
899 sc->sc_msgpriq |= SEND_ABORT;
900 }
901 sr = sc->sc_current;
902 xs = sr->sr_xs;
903 NCR_TRACE("sched: reselect, new sr=0x%x\n", (long)sr);
904 goto have_nexus;
905 }
906
907 /* Normal selection result. Target/LUN is now busy. */
908 sc->sc_matrix[target][lun] = sr;
909 sc->sc_current = sr; /* connected */
910 xs = sr->sr_xs;
911
912 /*
913 * Initialize pointers, etc. for this job
914 */
915 sc->sc_dataptr = sr->sr_dataptr;
916 sc->sc_datalen = sr->sr_datalen;
917 sc->sc_prevphase = PHASE_INVALID;
918 sc->sc_msgpriq = SEND_IDENTIFY;
919 sc->sc_msgoutq = 0;
920 sc->sc_msgout = 0;
921
922 NCR_TRACE("sched: select rv=%d\n", error);
923
924 switch (error) {
925 case XS_NOERROR:
926 break;
927
928 case XS_BUSY:
929 /* XXX - Reset and try again. */
930 printf("%s: select found SCSI bus busy, resetting...\n",
931 device_xname(sc->sc_dev));
932 ncr5380_reset_scsibus(sc);
933 /* fallthrough */
934 case XS_SELTIMEOUT:
935 default:
936 xs->error = error; /* from select */
937 NCR_TRACE("sched: call done, sr=0x%x\n", (long)sr);
938 ncr5380_done(sc);
939
940 /* Paranoia: clear everything. */
941 sc->sc_dataptr = NULL;
942 sc->sc_datalen = 0;
943 sc->sc_prevphase = PHASE_INVALID;
944 sc->sc_msgpriq = 0;
945 sc->sc_msgoutq = 0;
946 sc->sc_msgout = 0;
947
948 goto next_job;
949 }
950
951 /*
952 * Selection was successful. Normally, this means
953 * we are starting a new command. However, this
954 * might be the termination of an overdue job.
955 */
956 if (sr->sr_flags & SR_OVERDUE) {
957 NCR_TRACE("sched: overdue, sr=0x%x\n", (long)sr);
958 sc->sc_state |= NCR_ABORTING;
959 sc->sc_msgpriq |= SEND_ABORT;
960 goto have_nexus;
961 }
962
963 /*
964 * OK, we are starting a new command.
965 * Initialize and allocate resources for the new command.
966 * Device reset is special (only uses MSG_OUT phase).
967 * Normal commands start in MSG_OUT phase where we will
968 * send and IDENDIFY message, and then expect CMD phase.
969 */
970 #ifdef NCR5380_DEBUG
971 if (ncr5380_debug & NCR_DBG_CMDS) {
972 printf("ncr5380_sched: begin, target=%d, LUN=%d\n",
973 xs->xs_periph->periph_target, xs->xs_periph->periph_lun);
974 ncr5380_show_scsi_cmd(xs);
975 }
976 #endif
977 if (xs->xs_control & XS_CTL_RESET) {
978 NCR_TRACE("sched: cmd=reset, sr=0x%x\n", (long)sr);
979 /* Not an error, so do not set NCR_ABORTING */
980 sc->sc_msgpriq |= SEND_DEV_RESET;
981 goto have_nexus;
982 }
983
984 #ifdef DIAGNOSTIC
985 if ((xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) == 0) {
986 if (sc->sc_dataptr) {
987 printf("%s: ptr but no data in/out flags?\n",
988 device_xname(sc->sc_dev));
989 NCR_BREAK();
990 sc->sc_dataptr = NULL;
991 }
992 }
993 #endif
994
995 /* Allocate DMA space (maybe) */
996 if (sc->sc_dataptr && sc->sc_dma_alloc &&
997 (sc->sc_datalen >= sc->sc_min_dma_len))
998 {
999 NCR_TRACE("sched: dma_alloc, len=%d\n", sc->sc_datalen);
1000 (*sc->sc_dma_alloc)(sc);
1001 }
1002
1003 /*
1004 * Initialization hook called just after select,
1005 * at the beginning of COMMAND phase.
1006 * (but AFTER the DMA allocation is done)
1007 *
1008 * The evil Sun "si" adapter (OBIO variant) needs some
1009 * setup done to the DMA engine BEFORE the target puts
1010 * the SCSI bus into any DATA phase.
1011 */
1012 if (sr->sr_dma_hand && sc->sc_dma_setup) {
1013 NCR_TRACE("sched: dma_setup, dh=0x%x\n",
1014 (long) sr->sr_dma_hand);
1015 sc->sc_dma_setup(sc);
1016 }
1017
1018 /*
1019 * Schedule a timeout for the job we are starting.
1020 */
1021 if ((sr->sr_flags & SR_IMMED) == 0) {
1022 i = mstohz(xs->timeout);
1023 NCR_TRACE("sched: set timeout=%d\n", i);
1024 callout_reset(&sr->sr_xs->xs_callout, i,
1025 ncr5380_cmd_timeout, sr);
1026 }
1027
1028 have_nexus:
1029 NCR_TRACE("sched: call machine, cur=0x%x\n",
1030 (long) sc->sc_current);
1031 ncr5380_machine(sc);
1032 NCR_TRACE("sched: machine done, cur=0x%x\n",
1033 (long) sc->sc_current);
1034
1035 /*
1036 * What state did ncr5380_machine() leave us in?
1037 * Hopefully it sometimes completes a job...
1038 */
1039 if (sc->sc_state == NCR_IDLE)
1040 goto next_job;
1041
1042 return; /* Have work in progress. */
1043 }
1044
1045
1046 /*
1047 * Reselect handler: checks for reselection, and if we are being
1048 * reselected, it sets up sc->sc_current.
1049 *
1050 * We are reselected when:
1051 * SEL is TRUE
1052 * IO is TRUE
1053 * BSY is FALSE
1054 */
1055 void
1056 ncr5380_reselect(struct ncr5380_softc *sc)
1057 {
1058 struct sci_req *sr;
1059 int target, lun, phase, timo;
1060 int target_mask = 0; /* XXX gcc (on ns32k) */
1061 uint8_t bus, data, icmd, mode, msg;
1062
1063 #ifdef DIAGNOSTIC
1064 /*
1065 * Note: sc_state will be "idle" when ncr5380_intr()
1066 * calls, or "working" when ncr5380_select() calls.
1067 * (So don't test that in this DIAGNOSTIC)
1068 */
1069 if (sc->sc_current)
1070 panic("%s: current set", __func__);
1071 #endif
1072
1073 /*
1074 * First, check the select line.
1075 * (That has to be set first.)
1076 */
1077 bus = NCR5380_READ(sc, sci_bus_csr);
1078 if ((bus & SCI_BUS_SEL) == 0) {
1079 /* Not a selection or reselection. */
1080 return;
1081 }
1082
1083 /*
1084 * The target will assert BSY first (for bus arbitration),
1085 * then raise SEL, and finally drop BSY. Only then is the
1086 * data bus required to have valid selection ID bits set.
1087 * Wait for: SEL==1, BSY==0 before reading the data bus.
1088 * While this theoretically can happen, we are apparently
1089 * never fast enough to get here before BSY drops.
1090 */
1091 timo = ncr5380_wait_nrq_timo;
1092 for (;;) {
1093 if ((bus & SCI_BUS_BSY) == 0)
1094 break;
1095 /* Probably never get here... */
1096 if (--timo <= 0) {
1097 printf("%s: reselect, BSY stuck, bus=0x%x\n",
1098 device_xname(sc->sc_dev), bus);
1099 /* Not much we can do. Reset the bus. */
1100 ncr5380_reset_scsibus(sc);
1101 return;
1102 }
1103 delay(2);
1104 bus = NCR5380_READ(sc, sci_bus_csr);
1105 /* If SEL went away, forget it. */
1106 if ((bus & SCI_BUS_SEL) == 0)
1107 return;
1108 /* Still have SEL, check BSY. */
1109 }
1110 NCR_TRACE("reselect, valid data after %d loops\n",
1111 ncr5380_wait_nrq_timo - timo);
1112
1113 /*
1114 * Good. We have SEL=1 and BSY=0. Now wait for a
1115 * "bus settle delay" before we sample the data bus
1116 */
1117 delay(2);
1118 data = NCR5380_READ(sc, sci_data) & 0xFF;
1119 /* Parity check is implicit in data validation below. */
1120
1121 /*
1122 * Is this a reselect (I/O == 1) or have we been
1123 * selected as a target? (I/O == 0)
1124 */
1125 if ((bus & SCI_BUS_IO) == 0) {
1126 printf("%s: selected as target, data=0x%x\n",
1127 device_xname(sc->sc_dev), data);
1128 /* Not much we can do. Reset the bus. */
1129 /* XXX: send some sort of message? */
1130 ncr5380_reset_scsibus(sc);
1131 return;
1132 }
1133
1134 /*
1135 * OK, this is a reselection.
1136 */
1137 for (target = 0; target < 7; target++) {
1138 target_mask = (1 << target);
1139 if (data & target_mask)
1140 break;
1141 }
1142 if ((data & 0x7F) != target_mask) {
1143 /* No selecting ID? or >2 IDs on bus? */
1144 printf("%s: bad reselect, data=0x%x\n",
1145 device_xname(sc->sc_dev), data);
1146 return;
1147 }
1148
1149 NCR_TRACE("reselect: target=0x%x\n", target);
1150
1151 /* Raise BSY to acknowledge target reselection. */
1152 NCR5380_WRITE(sc, sci_icmd, SCI_ICMD_BSY);
1153
1154 /* Wait for target to drop SEL. */
1155 timo = ncr5380_wait_nrq_timo;
1156 for (;;) {
1157 bus = NCR5380_READ(sc, sci_bus_csr);
1158 if ((bus & SCI_BUS_SEL) == 0)
1159 break; /* success */
1160 if (--timo <= 0) {
1161 printf("%s: reselect, SEL stuck, bus=0x%x\n",
1162 device_xname(sc->sc_dev), bus);
1163 NCR_BREAK();
1164 /* assume connected (fail later if not) */
1165 break;
1166 }
1167 delay(2);
1168 }
1169
1170 /* Now we drop BSY, and we are connected. */
1171 NCR5380_WRITE(sc, sci_icmd, 0);
1172 NCR5380_WRITE(sc, sci_sel_enb, 0);
1173 SCI_CLR_INTR(sc);
1174
1175 /*
1176 * At this point the target should send an IDENTIFY message,
1177 * which will permit us to determine the reselecting LUN.
1178 * If not, we assume LUN 0.
1179 */
1180 lun = 0;
1181 /* Wait for REQ before reading bus phase. */
1182 if (ncr5380_wait_req(sc)) {
1183 printf("%s: reselect, no REQ\n",
1184 device_xname(sc->sc_dev));
1185 /* Try to send an ABORT message. */
1186 goto abort;
1187 }
1188 phase = SCI_BUS_PHASE(NCR5380_READ(sc, sci_bus_csr));
1189 if (phase != PHASE_MSG_IN) {
1190 printf("%s: reselect, phase=%d\n",
1191 device_xname(sc->sc_dev), phase);
1192 goto abort;
1193 }
1194
1195 /* Ack. the change to PHASE_MSG_IN */
1196 NCR5380_WRITE(sc, sci_tcmd, PHASE_MSG_IN);
1197
1198 /* Peek at the message byte without consuming it! */
1199 msg = NCR5380_READ(sc, sci_data);
1200 if ((msg & 0x80) == 0) {
1201 printf("%s: reselect, not identify, msg=%d\n",
1202 device_xname(sc->sc_dev), msg);
1203 goto abort;
1204 }
1205 lun = msg & 7;
1206
1207 /* We now know target/LUN. Do we have the request? */
1208 sr = sc->sc_matrix[target][lun];
1209 if (sr) {
1210 /* We now have a nexus. */
1211 sc->sc_state |= NCR_WORKING;
1212 sc->sc_current = sr;
1213 NCR_TRACE("reselect: resume sr=0x%x\n", (long)sr);
1214
1215 /* Implicit restore pointers message */
1216 sc->sc_dataptr = sr->sr_dataptr;
1217 sc->sc_datalen = sr->sr_datalen;
1218
1219 sc->sc_prevphase = PHASE_INVALID;
1220 sc->sc_msgpriq = 0;
1221 sc->sc_msgoutq = 0;
1222 sc->sc_msgout = 0;
1223
1224 /* XXX: Restore the normal mode register. */
1225 /* If this target's bit is set, do NOT check parity. */
1226 if (sc->sc_parity_disable & target_mask)
1227 mode = SCI_MODE_MONBSY;
1228 else
1229 mode = SCI_MODE_MONBSY | SCI_MODE_PAR_CHK;
1230 /* XXX CXD1180 asserts MONBSY before disconnect */
1231 if (sc->sc_rev == NCR_VARIANT_CXD1180)
1232 mode &= ~SCI_MODE_MONBSY;
1233
1234 NCR5380_WRITE(sc, sci_mode, mode);
1235
1236 /*
1237 * Another hack for the Sun3 "si", which needs
1238 * some setup done to its DMA engine before the
1239 * target puts the SCSI bus into any DATA phase.
1240 */
1241 if (sr->sr_dma_hand && sc->sc_dma_setup) {
1242 NCR_TRACE("reselect: call DMA setup, dh=0x%x\n",
1243 (long) sr->sr_dma_hand);
1244 sc->sc_dma_setup(sc);
1245 }
1246
1247 /* Now consume the IDENTIFY message. */
1248 ncr5380_pio_in(sc, PHASE_MSG_IN, 1, &msg);
1249 return;
1250 }
1251
1252 printf("%s: phantom reselect: target=%d, LUN=%d\n",
1253 device_xname(sc->sc_dev), target, lun);
1254 abort:
1255 /*
1256 * Try to send an ABORT message. This makes us
1257 * temporarily busy, but no current command...
1258 */
1259 sc->sc_state |= NCR_ABORTING;
1260
1261 /* Raise ATN, delay, raise ACK... */
1262 icmd = SCI_ICMD_ATN;
1263 NCR5380_WRITE(sc, sci_icmd, icmd);
1264 delay(2);
1265
1266 /* Now consume the IDENTIFY message. */
1267 ncr5380_pio_in(sc, PHASE_MSG_IN, 1, &msg);
1268
1269 /* Finally try to send the ABORT. */
1270 sc->sc_prevphase = PHASE_INVALID;
1271 sc->sc_msgpriq = SEND_ABORT;
1272 ncr5380_msg_out(sc);
1273
1274 NCR5380_WRITE(sc, sci_tcmd, PHASE_INVALID);
1275 NCR5380_WRITE(sc, sci_sel_enb, 0);
1276 SCI_CLR_INTR(sc);
1277 NCR5380_WRITE(sc, sci_sel_enb, 0x80);
1278
1279 sc->sc_state &= ~NCR_ABORTING;
1280 }
1281
1282
1283 /*
1284 * Select target: xs is the transfer that we are selecting for.
1285 * sc->sc_current should be NULL.
1286 *
1287 * Returns:
1288 * sc->sc_current != NULL ==> we were reselected (race!)
1289 * XS_NOERROR ==> selection worked
1290 * XS_BUSY ==> lost arbitration
1291 * XS_SELTIMEOUT ==> no response to selection
1292 */
1293 static int
1294 ncr5380_select(struct ncr5380_softc *sc, struct sci_req *sr)
1295 {
1296 int timo, s, target_mask;
1297 uint8_t data, icmd, mode;
1298
1299 /* Check for reselect */
1300 ncr5380_reselect(sc);
1301 if (sc->sc_current) {
1302 NCR_TRACE("select: reselect, cur=0x%x\n",
1303 (long) sc->sc_current);
1304 return XS_BUSY; /* reselected */
1305 }
1306
1307 /*
1308 * Set phase bits to 0, otherwise the 5380 won't drive the bus during
1309 * selection.
1310 */
1311 NCR5380_WRITE(sc, sci_tcmd, PHASE_DATA_OUT);
1312 NCR5380_WRITE(sc, sci_icmd, 0);
1313 icmd = 0;
1314 NCR5380_WRITE(sc, sci_mode, 0);
1315
1316 /*
1317 * Arbitrate for the bus. The 5380 takes care of the
1318 * time-critical bus interactions. We set our ID bit
1319 * in the output data register and set MODE_ARB. The
1320 * 5380 watches for the required "bus free" period.
1321 * If and when the "bus free" period is detected, the
1322 * 5380 drives BSY, drives the data bus, and sets the
1323 * "arbitration in progress" (AIP) bit to let us know
1324 * arbitration has started (and that it asserts BSY).
1325 * We then wait for one arbitration delay (2.2uS) and
1326 * check the ICMD_LST bit, which will be set if some
1327 * other target drives SEL during arbitration.
1328 *
1329 * There is a time-critical section during the period
1330 * after we enter arbitration up until we assert SEL.
1331 * Avoid long interrupts during this period.
1332 */
1333 s = splvm(); /* XXX: Begin time-critical section */
1334
1335 NCR5380_WRITE(sc, sci_odata, 0x80); /* OUR_ID */
1336 NCR5380_WRITE(sc, sci_mode, SCI_MODE_ARB);
1337
1338 #define WAIT_AIP_USEC 20 /* pleanty of time */
1339 /* Wait for the AIP bit to turn on. */
1340 timo = WAIT_AIP_USEC;
1341 for (;;) {
1342 if (NCR5380_READ(sc, sci_icmd) & SCI_ICMD_AIP)
1343 break;
1344 if (timo <= 0) {
1345 /*
1346 * Did not see any "bus free" period.
1347 * The usual reason is a reselection,
1348 * so treat this as arbitration loss.
1349 */
1350 NCR_TRACE("select: bus busy, rc=%d\n", XS_BUSY);
1351 goto lost_arb;
1352 }
1353 timo -= 2;
1354 delay(2);
1355 }
1356 NCR_TRACE("select: have AIP after %d uSec.\n",
1357 WAIT_AIP_USEC - timo);
1358
1359 /* Got AIP. Wait one arbitration delay (2.2 uS.) */
1360 delay(3);
1361
1362 /* Check for ICMD_LST */
1363 if (NCR5380_READ(sc, sci_icmd) & SCI_ICMD_LST) {
1364 /* Some other target asserted SEL. */
1365 NCR_TRACE("select: lost one, rc=%d\n", XS_BUSY);
1366 goto lost_arb;
1367 }
1368
1369 /*
1370 * No other device has declared itself the winner.
1371 * The spec. says to check for higher IDs, but we
1372 * are always the highest (ID=7) so don't bother.
1373 * We can now declare victory by asserting SEL.
1374 *
1375 * Note that the 5380 is asserting BSY because we
1376 * have entered arbitration mode. We will now hold
1377 * BSY directly so we can turn off ARB mode.
1378 */
1379 icmd = (SCI_ICMD_BSY | SCI_ICMD_SEL);
1380 NCR5380_WRITE(sc, sci_icmd, icmd);
1381
1382 /*
1383 * "The SCSI device that wins arbitration shall wait
1384 * at least a bus clear delay plus a bus settle delay
1385 * after asserting the SEL signal before changing
1386 * any [other] signal." (1.2uS. total)
1387 */
1388 delay(2);
1389
1390 /*
1391 * Check one last time to see if we really did
1392 * win arbitration. This might only happen if
1393 * there can be a higher selection ID than ours.
1394 * Keep this code for reference anyway...
1395 */
1396 /* XXX CXD1180 asserts LST here */
1397 if ((sc->sc_rev != NCR_VARIANT_CXD1180) &&
1398 (NCR5380_READ(sc, sci_icmd) & SCI_ICMD_LST)) {
1399 /* Some other target asserted SEL. */
1400 NCR_TRACE("select: lost two, rc=%d\n", XS_BUSY);
1401
1402 lost_arb:
1403 NCR5380_WRITE(sc, sci_icmd, 0);
1404 NCR5380_WRITE(sc, sci_mode, 0);
1405
1406 splx(s); /* XXX: End of time-critical section. */
1407
1408 /*
1409 * When we lose arbitration, it usually means
1410 * there is a target trying to reselect us.
1411 */
1412 ncr5380_reselect(sc);
1413 return XS_BUSY;
1414 }
1415
1416 /* Leave ARB mode Now that we drive BSY+SEL */
1417 NCR5380_WRITE(sc, sci_mode, 0);
1418 NCR5380_WRITE(sc, sci_sel_enb, 0);
1419
1420 splx(s); /* XXX: End of time-critical section. */
1421
1422 /*
1423 * Arbitration is complete. Now do selection:
1424 * Drive the data bus with the ID bits for both
1425 * the host and target. Also set ATN now, to
1426 * ask the target for a message out phase.
1427 */
1428 target_mask = (1 << sr->sr_target);
1429 data = 0x80 | target_mask;
1430 NCR5380_WRITE(sc, sci_odata, data);
1431 icmd |= (SCI_ICMD_DATA | SCI_ICMD_ATN);
1432 NCR5380_WRITE(sc, sci_icmd, icmd);
1433 delay(2); /* two deskew delays. */
1434
1435 /* De-assert BSY (targets sample the data now). */
1436 icmd &= ~SCI_ICMD_BSY;
1437 NCR5380_WRITE(sc, sci_icmd, icmd);
1438 delay(3); /* Bus settle delay. */
1439
1440 /*
1441 * Wait for the target to assert BSY.
1442 * SCSI spec. says wait for 250 mS.
1443 */
1444 for (timo = 25000;;) {
1445 if (NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_BSY)
1446 goto success;
1447 if (--timo <= 0)
1448 break;
1449 delay(10);
1450 }
1451
1452 /*
1453 * There is no reaction from the target. Start the selection
1454 * timeout procedure. We release the databus but keep SEL+ATN
1455 * asserted. After that we wait a 'selection abort time' (200
1456 * usecs) and 2 deskew delays (90 ns) and check BSY again.
1457 * When BSY is asserted, we assume the selection succeeded,
1458 * otherwise we release the bus.
1459 */
1460 icmd &= ~SCI_ICMD_DATA;
1461 NCR5380_WRITE(sc, sci_icmd, icmd);
1462 delay(201);
1463 if ((NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_BSY) == 0) {
1464 /* Really no device on bus */
1465 NCR5380_WRITE(sc, sci_tcmd, PHASE_INVALID);
1466 NCR5380_WRITE(sc, sci_icmd, 0);
1467 NCR5380_WRITE(sc, sci_mode, 0);
1468 NCR5380_WRITE(sc, sci_sel_enb, 0);
1469 SCI_CLR_INTR(sc);
1470 NCR5380_WRITE(sc, sci_sel_enb, 0x80);
1471 NCR_TRACE("select: device down, rc=%d\n", XS_SELTIMEOUT);
1472 return XS_SELTIMEOUT;
1473 }
1474
1475 success:
1476 /*
1477 * The target is now driving BSY, so we can stop
1478 * driving SEL and the data bus (keep ATN true).
1479 * Configure the ncr5380 to monitor BSY, parity.
1480 */
1481 icmd &= ~(SCI_ICMD_DATA | SCI_ICMD_SEL);
1482 NCR5380_WRITE(sc, sci_icmd, icmd);
1483
1484 /* If this target's bit is set, do NOT check parity. */
1485 if (sc->sc_parity_disable & target_mask)
1486 mode = SCI_MODE_MONBSY;
1487 else
1488 mode = SCI_MODE_MONBSY | SCI_MODE_PAR_CHK;
1489 /* XXX CXD1180 asserts MONBSY before disconnect */
1490 if (sc->sc_rev == NCR_VARIANT_CXD1180)
1491 mode &= ~SCI_MODE_MONBSY;
1492
1493 NCR5380_WRITE(sc, sci_mode, mode);
1494
1495 return XS_NOERROR;
1496 }
1497
1498
1499 /*****************************************************************
1500 * Functions to handle each info. transfer phase:
1501 *****************************************************************/
1502
1503 /*
1504 * The message system:
1505 *
1506 * This is a revamped message system that now should easier accommodate
1507 * new messages, if necessary.
1508 *
1509 * Currently we accept these messages:
1510 * IDENTIFY (when reselecting)
1511 * COMMAND COMPLETE # (expect bus free after messages marked #)
1512 * NOOP
1513 * MESSAGE REJECT
1514 * SYNCHRONOUS DATA TRANSFER REQUEST
1515 * SAVE DATA POINTER
1516 * RESTORE POINTERS
1517 * DISCONNECT #
1518 *
1519 * We may send these messages in prioritized order:
1520 * BUS DEVICE RESET # if XS_CTL_RESET & xs->xs_control (or in
1521 * weird sits.)
1522 * MESSAGE PARITY ERROR par. err. during MSGI
1523 * MESSAGE REJECT If we get a message we don't know how to handle
1524 * ABORT # send on errors
1525 * INITIATOR DETECTED ERROR also on errors (SCSI2) (during info xfer)
1526 * IDENTIFY At the start of each transfer
1527 * SYNCHRONOUS DATA TRANSFER REQUEST if appropriate
1528 * NOOP if nothing else fits the bill ...
1529 */
1530
1531 /*
1532 * Precondition:
1533 * The SCSI bus is already in the MSGI phase and there is a message byte
1534 * on the bus, along with an asserted REQ signal.
1535 *
1536 * Our return value determines whether our caller, ncr5380_machine()
1537 * will expect to see another REQ (and possibly phase change).
1538 */
1539 static int
1540 ncr5380_msg_in(struct ncr5380_softc *sc)
1541 {
1542 struct sci_req *sr = sc->sc_current;
1543 struct scsipi_xfer *xs = sr->sr_xs;
1544 int n, phase;
1545 int act_flags;
1546 uint8_t icmd;
1547
1548 /* acknowledge phase change */
1549 NCR5380_WRITE(sc, sci_tcmd, PHASE_MSG_IN);
1550
1551 act_flags = ACT_CONTINUE;
1552 icmd = NCR5380_READ(sc, sci_icmd) & SCI_ICMD_RMASK;
1553
1554 if (sc->sc_prevphase == PHASE_MSG_IN) {
1555 /* This is a continuation of the previous message. */
1556 n = sc->sc_imp - sc->sc_imess;
1557 NCR_TRACE("msg_in: continuation, n=%d\n", n);
1558 goto nextbyte;
1559 }
1560
1561 /* This is a new MESSAGE IN phase. Clean up our state. */
1562 sc->sc_state &= ~NCR_DROP_MSGIN;
1563
1564 nextmsg:
1565 n = 0;
1566 sc->sc_imp = &sc->sc_imess[n];
1567
1568 nextbyte:
1569 /*
1570 * Read a whole message, but don't ack the last byte. If we reject the
1571 * message, we have to assert ATN during the message transfer phase
1572 * itself.
1573 */
1574 for (;;) {
1575 /*
1576 * Read a message byte.
1577 * First, check BSY, REQ, phase...
1578 */
1579 if (!SCI_BUSY(sc)) {
1580 NCR_TRACE("msg_in: lost BSY, n=%d\n", n);
1581 /* XXX - Assume the command completed? */
1582 act_flags |= (ACT_DISCONNECT | ACT_CMD_DONE);
1583 return act_flags;
1584 }
1585 if (ncr5380_wait_req(sc)) {
1586 NCR_TRACE("msg_in: BSY but no REQ, n=%d\n", n);
1587 /* Just let ncr5380_machine() handle it... */
1588 return act_flags;
1589 }
1590 phase = SCI_BUS_PHASE(NCR5380_READ(sc, sci_bus_csr));
1591 if (phase != PHASE_MSG_IN) {
1592 /*
1593 * Target left MESSAGE IN, probably because it
1594 * a) noticed our ATN signal, or
1595 * b) ran out of messages.
1596 */
1597 return act_flags;
1598 }
1599 /* Still in MESSAGE IN phase, and REQ is asserted. */
1600 if (NCR5380_READ(sc, sci_csr) & SCI_CSR_PERR) {
1601 ncr_sched_msgout(sc, SEND_PARITY_ERROR);
1602 sc->sc_state |= NCR_DROP_MSGIN;
1603 }
1604
1605 /* Gather incoming message bytes if needed. */
1606 if ((sc->sc_state & NCR_DROP_MSGIN) == 0) {
1607 if (n >= NCR_MAX_MSG_LEN) {
1608 ncr_sched_msgout(sc, SEND_REJECT);
1609 sc->sc_state |= NCR_DROP_MSGIN;
1610 } else {
1611 *sc->sc_imp++ = NCR5380_READ(sc, sci_data);
1612 n++;
1613 /*
1614 * This testing is suboptimal, but most
1615 * messages will be of the one byte variety, so
1616 * it should not affect performance
1617 * significantly.
1618 */
1619 if (n == 1 && MSG_IS1BYTE(sc->sc_imess[0]))
1620 goto have_msg;
1621 if (n == 2 && MSG_IS2BYTE(sc->sc_imess[0]))
1622 goto have_msg;
1623 if (n >= 3 && MSG_ISEXTENDED(sc->sc_imess[0]) &&
1624 n == sc->sc_imess[1] + 2)
1625 goto have_msg;
1626 }
1627 }
1628
1629 /*
1630 * If we reach this spot we're either:
1631 * a) in the middle of a multi-byte message, or
1632 * b) dropping bytes.
1633 */
1634
1635 /* Ack the last byte read. */
1636 icmd |= SCI_ICMD_ACK;
1637 NCR5380_WRITE(sc, sci_icmd, icmd);
1638
1639 if (ncr5380_wait_not_req(sc)) {
1640 NCR_TRACE("msg_in: drop, stuck REQ, n=%d\n", n);
1641 act_flags |= ACT_RESET_BUS;
1642 }
1643
1644 icmd &= ~SCI_ICMD_ACK;
1645 NCR5380_WRITE(sc, sci_icmd, icmd);
1646
1647 if (act_flags != ACT_CONTINUE)
1648 return act_flags;
1649
1650 /* back to nextbyte */
1651 }
1652
1653 have_msg:
1654 /* We now have a complete message. Parse it. */
1655
1656 switch (sc->sc_imess[0]) {
1657 case MSG_CMDCOMPLETE:
1658 NCR_TRACE("msg_in: CMDCOMPLETE\n", 0);
1659 /* Target is about to disconnect. */
1660 act_flags |= (ACT_DISCONNECT | ACT_CMD_DONE);
1661 break;
1662
1663 case MSG_PARITY_ERROR:
1664 NCR_TRACE("msg_in: PARITY_ERROR\n", 0);
1665 /* Resend the last message. */
1666 ncr_sched_msgout(sc, sc->sc_msgout);
1667 /* Reset icmd after scheduling the REJECT cmd - jwg */
1668 icmd = NCR5380_READ(sc, sci_icmd) & SCI_ICMD_RMASK;
1669 break;
1670
1671 case MSG_MESSAGE_REJECT:
1672 /* The target rejects the last message we sent. */
1673 NCR_TRACE("msg_in: got reject for 0x%x\n", sc->sc_msgout);
1674 switch (sc->sc_msgout) {
1675 case SEND_IDENTIFY:
1676 /* Really old target controller? */
1677 /* XXX ... */
1678 break;
1679 case SEND_INIT_DET_ERR:
1680 goto abort;
1681 }
1682 break;
1683
1684 case MSG_NOOP:
1685 NCR_TRACE("msg_in: NOOP\n", 0);
1686 break;
1687
1688 case MSG_DISCONNECT:
1689 NCR_TRACE("msg_in: DISCONNECT\n", 0);
1690 /* Target is about to disconnect. */
1691 act_flags |= ACT_DISCONNECT;
1692 if ((xs->xs_periph->periph_quirks & PQUIRK_AUTOSAVE) == 0)
1693 break;
1694 /*FALLTHROUGH*/
1695
1696 case MSG_SAVEDATAPOINTER:
1697 NCR_TRACE("msg_in: SAVE_PTRS\n", 0);
1698 sr->sr_dataptr = sc->sc_dataptr;
1699 sr->sr_datalen = sc->sc_datalen;
1700 break;
1701
1702 case MSG_RESTOREPOINTERS:
1703 NCR_TRACE("msg_in: RESTORE_PTRS\n", 0);
1704 sc->sc_dataptr = sr->sr_dataptr;
1705 sc->sc_datalen = sr->sr_datalen;
1706 break;
1707
1708 case MSG_EXTENDED:
1709 switch (sc->sc_imess[2]) {
1710 case MSG_EXT_SDTR:
1711 case MSG_EXT_WDTR:
1712 /* The ncr5380 can not do synchronous mode. */
1713 goto reject;
1714 default:
1715 printf("%s: unrecognized MESSAGE EXTENDED; "
1716 "sending REJECT\n",
1717 device_xname(sc->sc_dev));
1718 NCR_BREAK();
1719 goto reject;
1720 }
1721 break;
1722
1723 default:
1724 NCR_TRACE("msg_in: eh? imsg=0x%x\n", sc->sc_imess[0]);
1725 printf("%s: unrecognized MESSAGE; sending REJECT\n",
1726 device_xname(sc->sc_dev));
1727 NCR_BREAK();
1728 /* fallthrough */
1729 reject:
1730 ncr_sched_msgout(sc, SEND_REJECT);
1731 /* Reset icmd after scheduling the REJECT cmd - jwg */
1732 icmd = NCR5380_READ(sc, sci_icmd) & SCI_ICMD_RMASK;
1733 break;
1734
1735 abort:
1736 sc->sc_state |= NCR_ABORTING;
1737 ncr_sched_msgout(sc, SEND_ABORT);
1738 break;
1739 }
1740
1741 /* Ack the last byte read. */
1742 icmd |= SCI_ICMD_ACK;
1743 NCR5380_WRITE(sc, sci_icmd, icmd);
1744
1745 if (ncr5380_wait_not_req(sc)) {
1746 NCR_TRACE("msg_in: last, stuck REQ, n=%d\n", n);
1747 act_flags |= ACT_RESET_BUS;
1748 }
1749
1750 icmd &= ~SCI_ICMD_ACK;
1751 NCR5380_WRITE(sc, sci_icmd, icmd);
1752
1753 /* Go get the next message, if any. */
1754 if (act_flags == ACT_CONTINUE)
1755 goto nextmsg;
1756
1757 return act_flags;
1758 }
1759
1760
1761 /*
1762 * The message out (and in) stuff is a bit complicated:
1763 * If the target requests another message (sequence) without
1764 * having changed phase in between it really asks for a
1765 * retransmit, probably due to parity error(s).
1766 * The following messages can be sent:
1767 * IDENTIFY @ These 4 stem from SCSI command activity
1768 * SDTR @
1769 * WDTR @
1770 * DEV_RESET @
1771 * REJECT if MSGI doesn't make sense
1772 * PARITY_ERROR if parity error while in MSGI
1773 * INIT_DET_ERR if parity error while not in MSGI
1774 * ABORT if INIT_DET_ERR rejected
1775 * NOOP if asked for a message and there's nothing to send
1776 *
1777 * Note that we call this one with (sc_current == NULL)
1778 * when sending ABORT for unwanted reselections.
1779 */
1780 static int
1781 ncr5380_msg_out(struct ncr5380_softc *sc)
1782 {
1783 struct sci_req *sr = sc->sc_current;
1784 int act_flags, n, phase, progress;
1785 uint8_t icmd, msg;
1786
1787 /* acknowledge phase change */
1788 NCR5380_WRITE(sc, sci_tcmd, PHASE_MSG_OUT);
1789
1790 progress = 0; /* did we send any messages? */
1791 act_flags = ACT_CONTINUE;
1792
1793 /*
1794 * Set ATN. If we're just sending a trivial 1-byte message,
1795 * we'll clear ATN later on anyway. Also drive the data bus.
1796 */
1797 icmd = NCR5380_READ(sc, sci_icmd) & SCI_ICMD_RMASK;
1798 icmd |= (SCI_ICMD_ATN | SCI_ICMD_DATA);
1799 NCR5380_WRITE(sc, sci_icmd, icmd);
1800
1801 if (sc->sc_prevphase == PHASE_MSG_OUT) {
1802 if (sc->sc_omp == sc->sc_omess) {
1803 /*
1804 * This is a retransmission.
1805 *
1806 * We get here if the target stayed in MESSAGE OUT
1807 * phase. Section 5.1.9.2 of the SCSI 2 spec indicates
1808 * that all of the previously transmitted messages must
1809 * be sent again, in the same order. Therefore, we
1810 * requeue all the previously transmitted messages, and
1811 * start again from the top. Our simple priority
1812 * scheme keeps the messages in the right order.
1813 */
1814 sc->sc_msgpriq |= sc->sc_msgoutq;
1815 NCR_TRACE("msg_out: retrans priq=0x%x\n",
1816 sc->sc_msgpriq);
1817 } else {
1818 /* This is a continuation of the previous message. */
1819 n = sc->sc_omp - sc->sc_omess;
1820 NCR_TRACE("msg_out: continuation, n=%d\n", n);
1821 goto nextbyte;
1822 }
1823 }
1824
1825 /* No messages transmitted so far. */
1826 sc->sc_msgoutq = 0;
1827
1828 nextmsg:
1829 /* Pick up highest priority message. */
1830 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq;
1831 sc->sc_msgpriq &= ~sc->sc_msgout;
1832 sc->sc_msgoutq |= sc->sc_msgout;
1833
1834 /* Build the outgoing message data. */
1835 switch (sc->sc_msgout) {
1836 case SEND_IDENTIFY:
1837 NCR_TRACE("msg_out: SEND_IDENTIFY\n", 0);
1838 if (sr == NULL) {
1839 printf("%s: SEND_IDENTIFY while not connected; "
1840 "sending NOOP\n",
1841 device_xname(sc->sc_dev));
1842 NCR_BREAK();
1843 goto noop;
1844 }
1845 /*
1846 * The identify message we send determines whether
1847 * disconnect/reselect is allowed for this command.
1848 * 0xC0+LUN: allows it, 0x80+LUN disallows it.
1849 */
1850 msg = 0xc0; /* MSG_IDENTIFY(0,1) */
1851 if (sc->sc_no_disconnect & (1 << sr->sr_target))
1852 msg = 0x80;
1853 if (sr->sr_flags & (SR_IMMED))
1854 msg = 0x80;
1855 sc->sc_omess[0] = msg | sr->sr_lun;
1856 n = 1;
1857 break;
1858
1859 case SEND_DEV_RESET:
1860 NCR_TRACE("msg_out: SEND_DEV_RESET\n", 0);
1861 /* Expect disconnect after this! */
1862 /* XXX: Kill jobs for this target? */
1863 act_flags |= (ACT_DISCONNECT | ACT_CMD_DONE);
1864 sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1865 n = 1;
1866 break;
1867
1868 case SEND_REJECT:
1869 NCR_TRACE("msg_out: SEND_REJECT\n", 0);
1870 sc->sc_omess[0] = MSG_MESSAGE_REJECT;
1871 n = 1;
1872 break;
1873
1874 case SEND_PARITY_ERROR:
1875 NCR_TRACE("msg_out: SEND_PARITY_ERROR\n", 0);
1876 sc->sc_omess[0] = MSG_PARITY_ERROR;
1877 n = 1;
1878 break;
1879
1880 case SEND_INIT_DET_ERR:
1881 NCR_TRACE("msg_out: SEND_INIT_DET_ERR\n", 0);
1882 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1883 n = 1;
1884 break;
1885
1886 case SEND_ABORT:
1887 NCR_TRACE("msg_out: SEND_ABORT\n", 0);
1888 /* Expect disconnect after this! */
1889 /* XXX: Set error flag? */
1890 act_flags |= (ACT_DISCONNECT | ACT_CMD_DONE);
1891 sc->sc_omess[0] = MSG_ABORT;
1892 n = 1;
1893 break;
1894
1895 case 0:
1896 printf("%s: unexpected MESSAGE OUT; sending NOOP\n",
1897 device_xname(sc->sc_dev));
1898 NCR_BREAK();
1899 noop:
1900 NCR_TRACE("msg_out: send NOOP\n", 0);
1901 sc->sc_omess[0] = MSG_NOOP;
1902 n = 1;
1903 break;
1904
1905 default:
1906 printf("%s: weird MESSAGE OUT; sending NOOP\n",
1907 device_xname(sc->sc_dev));
1908 NCR_BREAK();
1909 goto noop;
1910 }
1911 sc->sc_omp = &sc->sc_omess[n];
1912
1913 nextbyte:
1914 /* Send message bytes. */
1915 while (n > 0) {
1916 /*
1917 * Send a message byte.
1918 * First check BSY, REQ, phase...
1919 */
1920 if (!SCI_BUSY(sc)) {
1921 NCR_TRACE("msg_out: lost BSY, n=%d\n", n);
1922 goto out;
1923 }
1924 if (ncr5380_wait_req(sc)) {
1925 NCR_TRACE("msg_out: no REQ, n=%d\n", n);
1926 goto out;
1927 }
1928 phase = SCI_BUS_PHASE(NCR5380_READ(sc, sci_bus_csr));
1929 if (phase != PHASE_MSG_OUT) {
1930 /*
1931 * Target left MESSAGE OUT, possibly to reject
1932 * our message.
1933 */
1934 NCR_TRACE("msg_out: new phase=%d\n", phase);
1935 goto out;
1936 }
1937
1938 /* Yes, we can send this message byte. */
1939 --n;
1940
1941 /* Clear ATN before last byte if this is the last message. */
1942 if (n == 0 && sc->sc_msgpriq == 0) {
1943 icmd &= ~SCI_ICMD_ATN;
1944 NCR5380_WRITE(sc, sci_icmd, icmd);
1945 /* 2 deskew delays */
1946 delay(2); /* XXX */
1947 }
1948
1949 /* Put data on the bus. */
1950 NCR5380_WRITE(sc, sci_odata, *--sc->sc_omp);
1951
1952 /* Raise ACK to tell target data is on the bus. */
1953 icmd |= SCI_ICMD_ACK;
1954 NCR5380_WRITE(sc, sci_icmd, icmd);
1955
1956 /* Wait for REQ to be negated. */
1957 if (ncr5380_wait_not_req(sc)) {
1958 NCR_TRACE("msg_out: stuck REQ, n=%d\n", n);
1959 act_flags |= ACT_RESET_BUS;
1960 }
1961
1962 /* Finally, drop ACK. */
1963 icmd &= ~SCI_ICMD_ACK;
1964 NCR5380_WRITE(sc, sci_icmd, icmd);
1965
1966 /* Stuck bus or something... */
1967 if (act_flags & ACT_RESET_BUS)
1968 goto out;
1969
1970 }
1971 progress++;
1972
1973 /* We get here only if the entire message has been transmitted. */
1974 if (sc->sc_msgpriq != 0) {
1975 /* There are more outgoing messages. */
1976 goto nextmsg;
1977 }
1978
1979 /*
1980 * The last message has been transmitted. We need to remember the last
1981 * message transmitted (in case the target switches to MESSAGE IN phase
1982 * and sends a MESSAGE REJECT), and the list of messages transmitted
1983 * this time around (in case the target stays in MESSAGE OUT phase to
1984 * request a retransmit).
1985 */
1986
1987 out:
1988 /* Stop driving the data bus. */
1989 icmd &= ~SCI_ICMD_DATA;
1990 NCR5380_WRITE(sc, sci_icmd, icmd);
1991
1992 if (!progress)
1993 act_flags |= ACT_RESET_BUS;
1994
1995 return act_flags;
1996 }
1997
1998
1999 /*
2000 * Handle command phase.
2001 */
2002 static int
2003 ncr5380_command(struct ncr5380_softc *sc)
2004 {
2005 struct sci_req *sr = sc->sc_current;
2006 struct scsipi_xfer *xs = sr->sr_xs;
2007 int len;
2008
2009 /* acknowledge phase change */
2010 NCR5380_WRITE(sc, sci_tcmd, PHASE_COMMAND);
2011
2012 /* Assume command can be sent in one go. */
2013 /* XXX: Do this using DMA, and get a phase change intr? */
2014 len = ncr5380_pio_out(sc, PHASE_COMMAND, xs->cmdlen,
2015 (uint8_t *)xs->cmd);
2016
2017 if (len != xs->cmdlen) {
2018 #ifdef NCR5380_DEBUG
2019 printf("%s: short transfer: wanted %d got %d.\n",
2020 __func__, xs->cmdlen, len);
2021 ncr5380_show_scsi_cmd(xs);
2022 NCR_BREAK();
2023 #endif
2024 if (len < 6) {
2025 xs->error = XS_DRIVER_STUFFUP;
2026 sc->sc_state |= NCR_ABORTING;
2027 ncr_sched_msgout(sc, SEND_ABORT);
2028 }
2029
2030 }
2031
2032 return ACT_CONTINUE;
2033 }
2034
2035
2036 /*
2037 * Handle either data_in or data_out
2038 */
2039 static int
2040 ncr5380_data_xfer(struct ncr5380_softc *sc, int phase)
2041 {
2042 struct sci_req *sr = sc->sc_current;
2043 struct scsipi_xfer *xs = sr->sr_xs;
2044 int expected_phase;
2045 int len;
2046
2047 /*
2048 * When aborting a command, disallow any data phase.
2049 */
2050 if (sc->sc_state & NCR_ABORTING) {
2051 printf("%s: aborting, but phase=%s (reset)\n",
2052 device_xname(sc->sc_dev), phase_names[phase & 7]);
2053 return ACT_RESET_BUS; /* XXX */
2054 }
2055
2056 /* Validate expected phase (data_in or data_out) */
2057 expected_phase = (xs->xs_control & XS_CTL_DATA_OUT) ?
2058 PHASE_DATA_OUT : PHASE_DATA_IN;
2059 if (phase != expected_phase) {
2060 printf("%s: data phase error\n", device_xname(sc->sc_dev));
2061 goto abort;
2062 }
2063
2064 /* Make sure we have some data to move. */
2065 if (sc->sc_datalen <= 0) {
2066 /* Device needs padding. */
2067 if (phase == PHASE_DATA_IN)
2068 ncr5380_pio_in(sc, phase, 4096, NULL);
2069 else
2070 ncr5380_pio_out(sc, phase, 4096, NULL);
2071 /* Make sure that caused a phase change. */
2072 if (SCI_BUS_PHASE(NCR5380_READ(sc, sci_bus_csr)) == phase) {
2073 /* More than 4k is just too much! */
2074 printf("%s: too much data padding\n",
2075 device_xname(sc->sc_dev));
2076 goto abort;
2077 }
2078 return ACT_CONTINUE;
2079 }
2080
2081 /*
2082 * Attempt DMA only if dma_alloc gave us a DMA handle AND
2083 * there is enough left to transfer so DMA is worth while.
2084 */
2085 if (sr->sr_dma_hand &&
2086 (sc->sc_datalen >= sc->sc_min_dma_len))
2087 {
2088 /*
2089 * OK, really start DMA. Note, the MD start function
2090 * is responsible for setting the TCMD register, etc.
2091 * (Acknowledge the phase change there, not here.)
2092 */
2093 NCR_TRACE("data_xfer: dma_start, dh=0x%x\n",
2094 (long) sr->sr_dma_hand);
2095 (*sc->sc_dma_start)(sc);
2096 return ACT_WAIT_DMA;
2097 }
2098
2099 /*
2100 * Doing PIO for data transfer. (Possibly "Pseudo DMA")
2101 * XXX: Do PDMA functions need to set tcmd later?
2102 */
2103 NCR_TRACE("data_xfer: doing PIO, len=%d\n", sc->sc_datalen);
2104 /* acknowledge phase change */
2105 NCR5380_WRITE(sc, sci_tcmd, phase); /* XXX: OK for PDMA? */
2106 if (phase == PHASE_DATA_OUT) {
2107 len = (*sc->sc_pio_out)(sc, phase, sc->sc_datalen,
2108 sc->sc_dataptr);
2109 } else {
2110 len = (*sc->sc_pio_in)(sc, phase, sc->sc_datalen,
2111 sc->sc_dataptr);
2112 }
2113 sc->sc_dataptr += len;
2114 sc->sc_datalen -= len;
2115
2116 NCR_TRACE("data_xfer: did PIO, resid=%d\n", sc->sc_datalen);
2117 return ACT_CONTINUE;
2118
2119 abort:
2120 sc->sc_state |= NCR_ABORTING;
2121 ncr_sched_msgout(sc, SEND_ABORT);
2122 return ACT_CONTINUE;
2123 }
2124
2125
2126 static int
2127 ncr5380_status(struct ncr5380_softc *sc)
2128 {
2129 int len;
2130 uint8_t status;
2131 struct sci_req *sr = sc->sc_current;
2132
2133 /* acknowledge phase change */
2134 NCR5380_WRITE(sc, sci_tcmd, PHASE_STATUS);
2135
2136 len = ncr5380_pio_in(sc, PHASE_STATUS, 1, &status);
2137 if (len) {
2138 sr->sr_status = status;
2139 } else {
2140 printf("%s: none?\n", __func__);
2141 }
2142
2143 return ACT_CONTINUE;
2144 }
2145
2146
2147 /*
2148 * This is the big state machine that follows SCSI phase changes.
2149 * This is somewhat like a co-routine. It will do a SCSI command,
2150 * and exit if the command is complete, or if it must wait, i.e.
2151 * for DMA to complete or for reselect to resume the job.
2152 *
2153 * The bus must be selected, and we need to know which command is
2154 * being undertaken.
2155 */
2156 static void
2157 ncr5380_machine(struct ncr5380_softc *sc)
2158 {
2159 struct sci_req *sr;
2160 struct scsipi_xfer *xs;
2161 int act_flags, phase, timo;
2162
2163 #ifdef DIAGNOSTIC
2164 if (sc->sc_state == NCR_IDLE)
2165 panic("%s: state=idle", __func__);
2166 if (sc->sc_current == NULL)
2167 panic("%s: no current cmd", __func__);
2168 #endif
2169
2170 sr = sc->sc_current;
2171 xs = sr->sr_xs;
2172 act_flags = ACT_CONTINUE;
2173
2174 /*
2175 * This will be called by ncr5380_intr() when DMA is
2176 * complete. Must stop DMA before touching the 5380 or
2177 * there will be "register conflict" errors.
2178 */
2179 if (sc->sc_state & NCR_DOINGDMA) {
2180 /* Pick-up where where we left off... */
2181 goto dma_done;
2182 }
2183
2184 next_phase:
2185
2186 if (!SCI_BUSY(sc)) {
2187 /* Unexpected disconnect */
2188 printf("%s: unexpected disconnect.\n", __func__);
2189 xs->error = XS_DRIVER_STUFFUP;
2190 act_flags |= (ACT_DISCONNECT | ACT_CMD_DONE);
2191 goto do_actions;
2192 }
2193
2194 /*
2195 * Wait for REQ before reading the phase.
2196 * Need to wait longer than usual here, because
2197 * some devices are just plain slow...
2198 */
2199 timo = ncr5380_wait_phase_timo;
2200 for (;;) {
2201 if (NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_REQ)
2202 break;
2203 if (--timo <= 0) {
2204 if (sc->sc_state & NCR_ABORTING) {
2205 printf("%s: no REQ while aborting, reset\n",
2206 device_xname(sc->sc_dev));
2207 act_flags |= ACT_RESET_BUS;
2208 goto do_actions;
2209 }
2210 printf("%s: no REQ for next phase, abort\n",
2211 device_xname(sc->sc_dev));
2212 sc->sc_state |= NCR_ABORTING;
2213 ncr_sched_msgout(sc, SEND_ABORT);
2214 goto next_phase;
2215 }
2216 delay(100);
2217 }
2218
2219 phase = SCI_BUS_PHASE(NCR5380_READ(sc, sci_bus_csr));
2220 NCR_TRACE("machine: phase=%s\n",
2221 (long) phase_names[phase & 7]);
2222
2223 /*
2224 * We assume that the device knows what it's doing,
2225 * so any phase is good.
2226 */
2227
2228 #if 0
2229 /*
2230 * XXX: Do not ACK the phase yet! do it later...
2231 * XXX: ... each phase routine does that itself.
2232 * In particular, DMA needs it done LATER.
2233 */
2234 NCR5380_WRITE(sc, sci_tcmd, phase); /* acknowledge phase change */
2235 #endif
2236
2237 switch (phase) {
2238
2239 case PHASE_DATA_OUT:
2240 case PHASE_DATA_IN:
2241 act_flags = ncr5380_data_xfer(sc, phase);
2242 break;
2243
2244 case PHASE_COMMAND:
2245 act_flags = ncr5380_command(sc);
2246 break;
2247
2248 case PHASE_STATUS:
2249 act_flags = ncr5380_status(sc);
2250 break;
2251
2252 case PHASE_MSG_OUT:
2253 act_flags = ncr5380_msg_out(sc);
2254 break;
2255
2256 case PHASE_MSG_IN:
2257 act_flags = ncr5380_msg_in(sc);
2258 break;
2259
2260 default:
2261 printf("%s: Unexpected phase 0x%x\n", __func__, phase);
2262 sc->sc_state |= NCR_ABORTING;
2263 ncr_sched_msgout(sc, SEND_ABORT);
2264 goto next_phase;
2265
2266 } /* switch */
2267 sc->sc_prevphase = phase;
2268
2269 do_actions:
2270
2271 if (act_flags & ACT_WAIT_DMA) {
2272 act_flags &= ~ACT_WAIT_DMA;
2273 /* Wait for DMA to complete (polling, or interrupt). */
2274 if ((sr->sr_flags & SR_IMMED) == 0) {
2275 NCR_TRACE("machine: wait for DMA intr.\n", 0);
2276 return; /* will resume at dma_done */
2277 }
2278 /* Busy-wait for it to finish. */
2279 NCR_TRACE("machine: dma_poll, dh=0x%x\n",
2280 (long) sr->sr_dma_hand);
2281 (*sc->sc_dma_poll)(sc);
2282 dma_done:
2283 /* Return here after interrupt. */
2284 if (sr->sr_flags & SR_OVERDUE)
2285 sc->sc_state |= NCR_ABORTING;
2286 NCR_TRACE("machine: dma_stop, dh=0x%x\n",
2287 (long) sr->sr_dma_hand);
2288 (*sc->sc_dma_stop)(sc);
2289 SCI_CLR_INTR(sc); /* XXX */
2290 /*
2291 * While DMA is running we can not touch the SBC,
2292 * so various places just set NCR_ABORTING and
2293 * expect us the "kick it" when DMA is done.
2294 */
2295 if (sc->sc_state & NCR_ABORTING) {
2296 ncr_sched_msgout(sc, SEND_ABORT);
2297 }
2298 }
2299
2300 /*
2301 * Check for parity error.
2302 * XXX - better place to check?
2303 */
2304 if (NCR5380_READ(sc, sci_csr) & SCI_CSR_PERR) {
2305 printf("%s: parity error!\n", device_xname(sc->sc_dev));
2306 /* XXX: sc->sc_state |= NCR_ABORTING; */
2307 ncr_sched_msgout(sc, SEND_PARITY_ERROR);
2308 }
2309
2310 if (act_flags == ACT_CONTINUE)
2311 goto next_phase;
2312 /* All other actions "break" from the loop. */
2313
2314 NCR_TRACE("machine: act_flags=0x%x\n", act_flags);
2315
2316 if (act_flags & ACT_RESET_BUS) {
2317 act_flags |= ACT_CMD_DONE;
2318 /*
2319 * Reset the SCSI bus, usually due to a timeout.
2320 * The error code XS_TIMEOUT allows retries.
2321 */
2322 sc->sc_state |= NCR_ABORTING;
2323 printf("%s: reset SCSI bus for TID=%d LUN=%d\n",
2324 device_xname(sc->sc_dev), sr->sr_target, sr->sr_lun);
2325 ncr5380_reset_scsibus(sc);
2326 }
2327
2328 if (act_flags & ACT_CMD_DONE) {
2329 act_flags |= ACT_DISCONNECT;
2330 /* Need to call scsipi_done() */
2331 /* XXX: from the aic6360 driver, but why? */
2332 if (sc->sc_datalen < 0) {
2333 printf("%s: %d extra bytes from %d:%d\n",
2334 device_xname(sc->sc_dev), -sc->sc_datalen,
2335 sr->sr_target, sr->sr_lun);
2336 sc->sc_datalen = 0;
2337 }
2338 xs->resid = sc->sc_datalen;
2339 /* Note: this will clear sc_current */
2340 NCR_TRACE("machine: call done, cur=0x%x\n", (long)sr);
2341 ncr5380_done(sc);
2342 }
2343
2344 if (act_flags & ACT_DISCONNECT) {
2345 /*
2346 * The device has dropped BSY (or will soon).
2347 * We have to wait here for BSY to drop, otherwise
2348 * the next command may decide we need a bus reset.
2349 */
2350 timo = ncr5380_wait_req_timo; /* XXX */
2351 for (;;) {
2352 if (!SCI_BUSY(sc))
2353 goto busfree;
2354 if (--timo <= 0)
2355 break;
2356 delay(2);
2357 }
2358 /* Device is sitting on the bus! */
2359 printf("%s: Target %d LUN %d stuck busy, resetting...\n",
2360 device_xname(sc->sc_dev), sr->sr_target, sr->sr_lun);
2361 ncr5380_reset_scsibus(sc);
2362 busfree:
2363 NCR_TRACE("machine: discon, waited %d\n",
2364 ncr5380_wait_req_timo - timo);
2365
2366 NCR5380_WRITE(sc, sci_icmd, 0);
2367 NCR5380_WRITE(sc, sci_mode, 0);
2368 NCR5380_WRITE(sc, sci_tcmd, PHASE_INVALID);
2369 NCR5380_WRITE(sc, sci_sel_enb, 0);
2370 SCI_CLR_INTR(sc);
2371 NCR5380_WRITE(sc, sci_sel_enb, 0x80);
2372
2373 if ((act_flags & ACT_CMD_DONE) == 0) {
2374 NCR_TRACE("machine: discon, cur=0x%x\n", (long)sr);
2375 }
2376
2377 /*
2378 * We may be here due to a disconnect message,
2379 * in which case we did NOT call ncr5380_done,
2380 * and we need to clear sc_current.
2381 */
2382 sc->sc_state = NCR_IDLE;
2383 sc->sc_current = NULL;
2384
2385 /* Paranoia: clear everything. */
2386 sc->sc_dataptr = NULL;
2387 sc->sc_datalen = 0;
2388 sc->sc_prevphase = PHASE_INVALID;
2389 sc->sc_msgpriq = 0;
2390 sc->sc_msgoutq = 0;
2391 sc->sc_msgout = 0;
2392
2393 /* Our caller will re-enable interrupts. */
2394 }
2395 }
2396
2397
2398 #ifdef NCR5380_DEBUG
2399
2400 static void
2401 ncr5380_show_scsi_cmd(struct scsipi_xfer *xs)
2402 {
2403 uint8_t *b = (uint8_t *)xs->cmd;
2404 int i = 0;
2405
2406 scsipi_printaddr(xs->xs_periph);
2407 if ((xs->xs_control & XS_CTL_RESET) == 0) {
2408 while (i < xs->cmdlen) {
2409 if (i)
2410 printf(",");
2411 printf("%x",b[i++]);
2412 }
2413 printf("\n");
2414 } else {
2415 printf("RESET\n");
2416 }
2417 }
2418
2419
2420 int ncr5380_traceidx = 0;
2421
2422 #define TRACE_MAX 1024
2423 struct trace_ent {
2424 const char *msg;
2425 long val;
2426 } ncr5380_tracebuf[TRACE_MAX];
2427
2428 void
2429 ncr5380_trace(const char *msg, long val)
2430 {
2431 struct trace_ent *tr;
2432 int s;
2433
2434 s = splbio();
2435
2436 tr = &ncr5380_tracebuf[ncr5380_traceidx];
2437
2438 ncr5380_traceidx++;
2439 if (ncr5380_traceidx >= TRACE_MAX)
2440 ncr5380_traceidx = 0;
2441
2442 tr->msg = msg;
2443 tr->val = val;
2444
2445 splx(s);
2446 }
2447
2448 #ifdef DDB
2449 void
2450 ncr5380_clear_trace(void)
2451 {
2452
2453 ncr5380_traceidx = 0;
2454 memset((char *)ncr5380_tracebuf, 0, sizeof(ncr5380_tracebuf));
2455 }
2456
2457 void
2458 ncr5380_show_trace(void)
2459 {
2460 struct trace_ent *tr;
2461 int idx;
2462
2463 idx = ncr5380_traceidx;
2464 do {
2465 tr = &ncr5380_tracebuf[idx];
2466 idx++;
2467 if (idx >= TRACE_MAX)
2468 idx = 0;
2469 if (tr->msg)
2470 db_printf(tr->msg, tr->val);
2471 } while (idx != ncr5380_traceidx);
2472 }
2473
2474 void
2475 ncr5380_show_req(struct sci_req *sr)
2476 {
2477 struct scsipi_xfer *xs = sr->sr_xs;
2478
2479 db_printf("TID=%d ", sr->sr_target);
2480 db_printf("LUN=%d ", sr->sr_lun);
2481 db_printf("dh=%p ", sr->sr_dma_hand);
2482 db_printf("dptr=%p ", sr->sr_dataptr);
2483 db_printf("dlen=0x%x ", sr->sr_datalen);
2484 db_printf("flags=%d ", sr->sr_flags);
2485 db_printf("stat=%d ", sr->sr_status);
2486
2487 if (xs == NULL) {
2488 db_printf("(xs=NULL)\n");
2489 return;
2490 }
2491 db_printf("\n");
2492 #ifdef SCSIPI_DEBUG
2493 show_scsipi_xs(xs);
2494 #else
2495 db_printf("xs=%p\n", xs);
2496 #endif
2497 }
2498
2499 void
2500 ncr5380_show_state(void)
2501 {
2502 struct ncr5380_softc *sc;
2503 struct sci_req *sr;
2504 int i, j, k;
2505
2506 sc = ncr5380_debug_sc;
2507
2508 if (sc == NULL) {
2509 db_printf("ncr5380_debug_sc == NULL\n");
2510 return;
2511 }
2512
2513 db_printf("sc_ncmds=%d\n", sc->sc_ncmds);
2514 k = -1; /* which is current? */
2515 for (i = 0; i < SCI_OPENINGS; i++) {
2516 sr = &sc->sc_ring[i];
2517 if (sr->sr_xs) {
2518 if (sr == sc->sc_current)
2519 k = i;
2520 db_printf("req %d: (sr=%p)", i, sr);
2521 ncr5380_show_req(sr);
2522 }
2523 }
2524 db_printf("sc_rr=%d, current=%d\n", sc->sc_rr, k);
2525
2526 db_printf("Active request matrix:\n");
2527 for(i = 0; i < 8; i++) { /* targets */
2528 for (j = 0; j < 8; j++) { /* LUN */
2529 sr = sc->sc_matrix[i][j];
2530 if (sr) {
2531 db_printf("TID=%d LUN=%d sr=%p\n", i, j, sr);
2532 }
2533 }
2534 }
2535
2536 db_printf("sc_state=0x%x\n", sc->sc_state);
2537 db_printf("sc_current=%p\n", sc->sc_current);
2538 db_printf("sc_dataptr=%p\n", sc->sc_dataptr);
2539 db_printf("sc_datalen=0x%x\n", sc->sc_datalen);
2540
2541 db_printf("sc_prevphase=%d\n", sc->sc_prevphase);
2542 db_printf("sc_msgpriq=0x%x\n", sc->sc_msgpriq);
2543 }
2544 #endif /* DDB */
2545 #endif /* NCR5380_DEBUG */
2546
2547 void
2548 ncr5380_attach(struct ncr5380_softc *sc)
2549 {
2550 struct scsipi_adapter *adapt = &sc->sc_adapter;
2551 struct scsipi_channel *chan = &sc->sc_channel;
2552
2553 /*
2554 * Fill in the scsipi_adapter.
2555 */
2556 adapt->adapt_request = ncr5380_scsipi_request;
2557 adapt->adapt_dev = sc->sc_dev;
2558 adapt->adapt_nchannels = 1;
2559 adapt->adapt_openings = SCI_OPENINGS;
2560 adapt->adapt_max_periph = 1;
2561 if (sc->sc_flags & NCR5380_FORCE_POLLING)
2562 adapt->adapt_flags |= SCSIPI_ADAPT_POLL_ONLY;
2563 /* adapt_minphys filled in by front-end */
2564
2565 /*
2566 * Fill in the scsipi_channel.
2567 */
2568 chan->chan_adapter = adapt;
2569 chan->chan_bustype = &scsi_bustype;
2570 chan->chan_channel = 0;
2571 chan->chan_ntargets = 8;
2572 chan->chan_nluns = 8;
2573 /* chan_id filled in by front-end */
2574
2575 /*
2576 * Add reference to adapter so that we drop the reference after
2577 * config_found() to make sure the adatper is disabled.
2578 */
2579 if (scsipi_adapter_addref(adapt) != 0) {
2580 aprint_error_dev(sc->sc_dev, "unable to enable controller\n");
2581 return;
2582 }
2583
2584 ncr5380_init(sc); /* Init chip and driver */
2585 ncr5380_reset_scsibus(sc);
2586
2587 /*
2588 * Ask the adapter what subunits are present
2589 */
2590 (void)config_found(sc->sc_dev, chan, scsiprint);
2591 scsipi_adapter_delref(adapt);
2592 }
2593
2594 int
2595 ncr5380_detach(struct ncr5380_softc *sc, int flags)
2596 {
2597
2598 return EOPNOTSUPP;
2599 }
NetBSD on the FriendlyARM MINI2440