sys/dev/ic/nec7210reg.h

   1 /*      $NetBSD: nec7210reg.h,v 1.3 2005/12/11 12:21:28 christos Exp $  */
   2
   3 /*-
   4  * Copyright (c) 2003 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Gregory McGarry.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 #define NEC7210_IOSIZE          8
  33
  34 /*
  35  * Direct-access Registers (write only)
  36  */
  37
  38 #define NEC7210_CDOR            0       /* (W) command/data out */
  39 #define NEC7210_IMR1            1       /* (W) interrupt mask 1 */
  40 #define         IMR1_DI         0x01
  41 #define         IMR1_DO         0x02
  42 #define         IMR1_ERR        0x04
  43 #define         IMR1_DEC        0x08
  44 #define         IMR1_END        0x10
  45 #define         IMR1_DET        0x20
  46 #define         IMR1_APT        0x20
  47 #define         IMR1_CPT        0x80
  48 #define NEC7210_IMR2            2       /* (W) interrupt mask 2 */
  49 #define         IMR2_ADSC       0x01
  50 #define         IMR2_REMC       0x02
  51 #define         IMR2_LOKC       0x04
  52 #define         IMR2_CO         0x08
  53 #define         IMR2_DMAI       0x10
  54 #define         IMR2_DMAO       0x20
  55 #define         IMR2_SRQ        0x40
  56 #define NEC7210_SPMR            3       /* (W) serial poll mode */
  57 #define         SPMR_RSV        0x80
  58 #define NEC7210_ADMR            4       /* (W) address mode */
  59 #define         ADMR_ADM0       0x01
  60 #define         ADMR_ADM1       0x02
  61 #define         ADMR_TRM0       0x10
  62 #define         ADMR_TRM1       0x20
  63 #define         ADMR_LON        0x40
  64 #define         ADMR_TON        0x80
  65 #define NEC7210_AUXMR           5       /* (W) auxilliary mode */
  66 #define         AUXMR_CMD       0x00    /* see below */
  67 #define         AUXMR_ICR       0x20
  68 #define         AUXMR_REGD      0x40
  69 #define         AUXMR_PPOLL     0x60
  70 #define         AUXMR_REGA      0x80
  71 #define         AUXMR_REGB      0xa0
  72 #define         AUXMR_REGE      0xc0
  73 #define         AUXMR_EXTERN    0xe0
  74 #define NEC7210_ADDR            6       /* (W) address */
  75 #define         ADDR_MASK       0x1f
  76 #define         ADDR_DL         0x20
  77 #define         ADDR_DT         0x40
  78 #define         ADDR_ARS        0x80
  79 #define NEC7210_EOSR            7       /* (W) end-of-string */
  80
  81 /*
  82  * Direct-access Registers (read only)
  83  */
  84
  85 #define NEC7210_DIR             0       /* (R) data in */
  86 #define NEC7210_ISR1            1       /* (R) interrupt status 1 */
  87 #define         ISR1_DI         0x01
  88 #define         ISR1_DO         0x02
  89 #define         ISR1_ERR        0x04
  90 #define         ISR1_DEC        0x08
  91 #define         ISR1_END        0x10
  92 #define         ISR1_DET        0x20
  93 #define         ISR1_APT        0x40
  94 #define         ISR1_CPT        0x80
  95 #define NEC7210_ISR2            2       /* (R) interrupt status 2 */
  96 #define         ISR2_ADSC       0x01
  97 #define         ISR2_REMC       0x02
  98 #define         ISR2_LOKC       0x04
  99 #define         ISR2_CO         0x08
 100 #define         ISR2_REM        0x10
 101 #define         ISR2_LOK        0x20
 102 #define         ISR2_SRQI       0x40
 103 #define         ISR2_INT        0x80
 104 #define NEC7210_SPSR            3       /* (R) serial poll status */
 105 #define         SPSR_PEND       0x80
 106 #define NEC7210_ADSR            4       /* (R) address status */
 107 #define         ADSR_MJMN       0x01
 108 #define         ADSR_TA         0x02
 109 #define         ADSR_LA         0x04
 110 #define         ADSR_TPAS       0x08
 111 #define         ADSR_LPAS       0x10
 112 #define         ADSR_SPMS       0x20
 113 #define         ADSR_NATN       0x40
 114 #define         ADSR_CIC        0x80
 115 #define NEC7210_CPTR            5       /* (R) command pass-though */
 116 #define NEC7210_ADDR0           6       /* (R) address 1 */
 117 #define         ADDR1_EOI       0x80
 118 #define NEC7210_ADDR1           7       /* (R) address 2 */
 119
 120 /*
 121  * Auxiliary Register A (indirect-access)
 122  */
 123
 124 #define AUX_A_HSNORM            0x00
 125 #define AUX_A_HLDA              0x01
 126 #define AUX_A_HLDE              0x02
 127 #define AUX_A_REOS              0x04
 128 #define AUX_A_XEOS              0x08
 129 #define AUX_A_BIN               0x10
 130 #define AUX_A_CONT              (AUX_A_HLDA | AUX_A_HLDE)
 131
 132 /*
 133  * Auxiliary Register B (indirect-access)
 134  */
 135
 136 #define AUX_B_CPTE              0x01
 137 #define AUX_B_SPEOI             0x02
 138 #define AUX_B_TRI               0x04
 139 #define AUX_B_INV               0x08
 140 #define AUX_B_ISS               0x10
 141
 142 /*
 143  * Parallel Poll Register (indirect-access)
 144  */
 145
 146 #define PPOLL_PPS               0x08
 147 #define PPOLL_PPU               0x10    /* Parallel poll unconfigure */
 148
 149 /*
 150  * nec7210 Auxiliary Commands (NEC7210_AUXMR)
 151  */
 152
 153 #define AUXCMD_IEPON            0x0     /* Immediate Execute pon */
 154 #define AUXCMD_CPPF             0x1     /* Clear Parallel Poll Flag */
 155 #define AUXCMD_CRST             0x2     /* Chip Reset */
 156 #define AUXCMD_RHDF             0x3     /* Release RFD holdoff */
 157 #define AUXCMD_TRIG             0x4     /* Trigger */
 158 #define AUXCMD_RTL              0x5     /* Return to local */
 159 #define AUXCMD_SEOI             0x6     /* Send EOI */
 160 #define AUXCMD_NVLD             0x7     /* Non-Valid Secondary Cmd or Addr */
 161 #define AUXCMD_SPPF             0x9     /* Set Parallel Poll Flag */
 162 #define AUXCMD_VLD              0xf     /* Valid Secondary Cmd or Addr */
 163 #define AUXCMD_GTS              0x10    /* Go To Standby */
 164 #define AUXCMD_TCA              0x11    /* Take Control Asynchronously */
 165 #define AUXCMD_TCS              0x12    /* Take Control Synchronously */
 166 #define AUXCMD_LTN              0x13    /* Listen */
 167 #define AUXCMD_DSC              0x14    /* Disable System Control */
 168 #define AUXCMD_CIFC             0x16    /* Clear IFC */
 169 #define AUXCMD_CREN             0x17    /* Clear REN */
 170 #define AUXCMD_TCSE             0x1a    /* Take Control Synchronously on End */
 171 #define AUXCMD_LTNC             0x1b    /* Listen in Continuous Mode */
 172 #define AUXCMD_LUN              0x1c    /* Local Unlisten */
 173 #define AUXCMD_EPP              0x1d    /* Execute Parallel Poll */
 174 #define AUXCMD_SIFC             0x1e    /* Set IFC */
 175 #define AUXCMD_SREN             0x1f    /* Set REN */