sys/dev/ic/rrunnervar.h

   1 /*      $NetBSD: rrunnervar.h,v 1.12 2007/03/04 06:02:00 christos Exp $ */
   2
   3 /* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
   4  * All rights reserved.
   5  *
   6  * This code contributed to The NetBSD Foundation by Kevin M. Lahey
   7  * of the Numerical Aerospace Simulation Facility, NASA Ames Research
   8  * Center.
   9  *
  10  * Partially based on a HIPPI driver written by Essential Communications
  11  * Corporation.  Thanks to Jason Thorpe, Matt Jacob, and Fred Templin
  12  * for invaluable advice and encouragement!
  13  *
  14  * Redistribution and use in source and binary forms, with or without
  15  * modification, are permitted provided that the following conditions
  16  * are met:
  17  * 1. Redistributions of source code must retain the above copyright
  18  *    notice, this list of conditions and the following disclaimer.
  19  * 2. Redistributions in binary form must reproduce the above copyright
  20  *    notice, this list of conditions and the following disclaimer in the
  21  *    documentation and/or other materials provided with the distribution.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  24  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  25  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  26  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  27  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  28  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  29  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  30  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  31  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  32  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  33  * POSSIBILITY OF SUCH DAMAGE.
  34  */
  35
  36 /* RoadRunner software status per interface */
  37
  38 struct rr_tuning {
  39
  40         /* Performance tuning registers: */
  41
  42         u_int32_t               rt_mode_and_status;
  43         u_int32_t               rt_conn_retry_count;
  44         u_int32_t               rt_conn_retry_timer;
  45         u_int32_t               rt_conn_timeout;
  46         u_int32_t               rt_stats_timer;
  47         u_int32_t               rt_interrupt_timer;
  48         u_int32_t               rt_tx_timeout;
  49         u_int32_t               rt_rx_timeout;
  50
  51         /* DMA performance tuning registers: */
  52
  53         u_int32_t               rt_pci_state;
  54         u_int32_t               rt_dma_write_state;
  55         u_int32_t               rt_dma_read_state;
  56         u_int32_t               rt_driver_param;
  57 };
  58
  59
  60
  61 struct rr_eeprom {
  62         u_int32_t       ifr_offset;     /* initial offset in bytes */
  63         u_int32_t       ifr_length;     /* length in bytes to write */
  64         u_int32_t       *ifr_buffer;    /* data to be written */
  65 };
  66
  67 #define EIOCGTUNE   1   /* retrieve tuning */
  68 #define EIOCSTUNE   2   /* set tuning */
  69 #define EIOCGEEPROM 3   /* get eeprom */
  70 #define EIOCSEEPROM 4   /* set eeprom */
  71 #define EIOCGSTATS  5   /* get statistics */
  72 #define EIOCRESET   6   /* reset the card */
  73
  74 #ifdef _KERNEL
  75
  76 /* Per-ring information for the SNAP (network) receive ring */
  77
  78 struct esh_snap_ring_ctl {
  79         bus_dmamap_t ec_dma[RR_MAX_DESCR];
  80         struct mbuf *ec_m[RR_MAX_DESCR];
  81         struct mbuf *ec_cur_pkt;        /* current packet being processed */
  82         struct mbuf *ec_cur_mbuf;       /* current mbuf being processed */
  83         int ec_error;                   /* encountered error? */
  84         u_int16_t ec_producer;          /* latest buffer driver produced */
  85         u_int16_t ec_consumer;          /* latest buffer runcode consumed */
  86         struct rr_descr *ec_descr;      /* array of descriptors for ring */
  87 };
  88
  89 TAILQ_HEAD(esh_dmainfo_list, esh_dmainfo);
  90
  91 struct esh_dmainfo {
  92         u_int32_t ed_flags;
  93 #define ESH_DI_BUSY     0x1
  94 #define ESH_DI_READING  0x2
  95         bus_dmamap_t ed_dma;
  96         struct buf *ed_buf;
  97         int ed_read_len;
  98         int ed_error;
  99         TAILQ_ENTRY(esh_dmainfo) ed_list;
 100 };
 101
 102 struct esh_send_ring_ctl {
 103         bus_dmamap_t ec_dma;            /* dmamap for data to transmit */
 104         int ec_offset;                  /* offset in dmamap to send next */
 105         size_t ec_len;                  /* total length of current buf */
 106         struct mbuf *ec_cur_mbuf;       /* current mbuf being processed */
 107         struct buf *ec_cur_buf;         /* current buf being processed */
 108         struct esh_dmainfo *ec_cur_dmainfo;
 109                                         /* current dmainfo being processed */
 110         struct bufq_state *ec_buf_queue;/* queue of bufs to send */
 111         int ec_error;                   /* encountered error? */
 112         u_int16_t ec_producer;          /* latest buffer driver produced */
 113         u_int16_t ec_consumer;          /* latest buffer runcode consumed */
 114         struct rr_descr *ec_descr;      /* array of descriptors for ring */
 115         struct esh_dmainfo_list ec_di_queue;
 116 };
 117
 118 struct esh_fp_ring_ctl {
 119         struct esh_dmainfo *ec_dmainfo[RR_MAX_DESCR];
 120         struct esh_dmainfo *ec_cur_dmainfo;
 121         int ec_offset;                  /* offset of current buf */
 122         int ec_error;                   /* encountered error? */
 123         int ec_seen_end;                /* seen the end of the buffer? */
 124         int ec_dmainfo_count;           /* dmainfo buffers in use count */
 125         u_int16_t ec_producer;          /* latest buffer driver produced */
 126         u_int16_t ec_consumer;          /* latest buffer runcode consumed */
 127         u_int32_t ec_read_len;          /* length of packet being read in */
 128         struct rr_descr *ec_descr;      /* array of descriptors for ring */
 129         struct esh_dmainfo_list ec_queue;
 130         u_int ec_ulp;                   /* ULP for this ring */
 131         int ec_index;                   /* index into list of active rings */
 132         bus_dmamap_t ec_dma;
 133         bus_dma_segment_t ec_dmaseg;
 134 };
 135
 136
 137 struct esh_softc {
 138         struct device           sc_dev;
 139         struct ifnet            sc_if;
 140         struct ifmedia          sc_media;
 141
 142         volatile int            sc_flags;
 143 #define ESH_FL_INITIALIZING     0x001
 144 #define ESH_FL_INITIALIZED      0x002
 145 #define ESH_FL_RUNCODE_UP       0x004
 146 #define ESH_FL_LINK_UP          0x008
 147 #define ESH_FL_SNAP_RING_UP     0x010
 148 #define ESH_FL_FP_RING_UP       0x020
 149 #define ESH_FL_EEPROM_BUSY      0x040
 150 #define ESH_FL_FP_OPEN          0x080
 151 #define ESH_FL_CRASHED          0x100
 152 #define ESH_FL_CLOSING_SNAP     0x200
 153
 154         void                    *sc_ih;
 155
 156         bus_space_tag_t         sc_iot;      /* bus cookie      */
 157         bus_space_handle_t      sc_ioh;      /* bus i/o handle  */
 158
 159         bus_dma_tag_t           sc_dmat;     /* dma tag */
 160
 161         bus_dma_segment_t       sc_dmaseg;   /* segment holding the various
 162                                                 data structures in host memory
 163                                                 that are DMA'ed to the NIC */
 164         bus_dmamap_t            sc_dma;      /* dma map for the segment */
 165         char                    *sc_dma_addr; /* address in kernel of DMA mem */
 166         bus_size_t              sc_dma_size; /* size of dma-able region */
 167
 168         u_int8_t        (*sc_bist_read)(struct esh_softc *);
 169         void            (*sc_bist_write)(struct esh_softc *, u_int8_t);
 170
 171         /*
 172          * Definitions for the various driver structures that sit in host
 173          * memory and are read by the NIC via DMA:
 174          */
 175
 176         struct rr_gen_info      *sc_gen_info;   /* gen info block pointer */
 177         bus_addr_t              sc_gen_info_dma;
 178
 179         struct rr_ring_ctl      *sc_recv_ring_table;
 180         bus_addr_t              sc_recv_ring_table_dma;
 181
 182         struct rr_event         *sc_event_ring;
 183         bus_addr_t              sc_event_ring_dma;
 184
 185         struct rr_descr         *sc_send_ring;
 186         struct rr2_descr        *sc2_send_ring;
 187         bus_addr_t              sc_send_ring_dma;
 188
 189         struct rr_descr         *sc_snap_recv_ring;
 190         struct rr2_descr        *sc2_snap_recv_ring;
 191         bus_addr_t              sc_snap_recv_ring_dma;
 192
 193         /*
 194          * Control structures for the various rings that we definitely
 195          * know we want to keep track of.
 196          */
 197
 198         struct esh_send_ring_ctl
 199                                 sc_send;
 200         struct esh_snap_ring_ctl
 201                                 sc_snap_recv;
 202         struct esh_fp_ring_ctl  *sc_fp_recv[RR_ULP_COUNT];
 203         struct esh_fp_ring_ctl  *sc_fp_recv_index[RR_MAX_RECV_RING];
 204         int                     sc_event_consumer;
 205         int                     sc_event_producer;
 206         int                     sc_cmd_consumer;
 207         int                     sc_cmd_producer;
 208
 209         /*
 210          * Various maintainance values we need
 211          */
 212
 213         int                     sc_watchdog;
 214
 215         /*
 216          * Various hardware parameters we need to keep track of.
 217          */
 218
 219         u_int32_t               sc_sram_size;
 220         u_int32_t               sc_runcode_start;
 221         u_int32_t               sc_runcode_version;
 222         u_int32_t               sc_version; /* interface of runcode (1 or 2) */
 223         u_int16_t               sc_options; /* options in current RunCode */
 224         u_int                   sc_max_rings;
 225
 226         u_int32_t               sc_pci_latency;
 227         u_int32_t               sc_pci_lat_gnt;
 228         u_int32_t               sc_pci_cache_line;
 229
 230         /* ULA assigned to hardware */
 231
 232         u_int8_t                sc_ula[6];
 233
 234         /* Tuning parameters */
 235
 236         struct rr_tuning        sc_tune;
 237
 238         /* Measure of how ugly this is. */
 239
 240         u_int32_t               sc_misaligned_bufs;
 241         u_int32_t               sc_bad_lens;
 242
 243         struct esh_dmainfo_list sc_dmainfo_freelist;
 244         u_int                   sc_dmainfo_freelist_count;
 245         u_int                   sc_fp_rings;
 246 };
 247
 248 void    eshconfig(struct esh_softc *);
 249 int     eshintr(void *);
 250 #endif /* _KERNEL */
 251
 252 /* Define a few constants for future use */
 253
 254 #define ESH_MAX_NSEGS                   512     /* room for 2MB of data */
 255 #define ESH_STATS_TIMER_DEFAULT         1030900
 256         /* 1000000 usecs / 0.97 usecs/tick */
 257
 258 #define NEXT_EVENT(i)  (((i) + 1) & (RR_EVENT_RING_SIZE - 1))
 259 #define NEXT_SEND(i)  (((i) + 1) & (RR_SEND_RING_SIZE - 1))
 260 #define NEXT_RECV(i)  (((i) + 1) & (RR_SNAP_RECV_RING_SIZE - 1))
 261
 262 #define PREV_SEND(i)  (((i) + RR_SEND_RING_SIZE - 1) & (RR_SEND_RING_SIZE - 1))
 263 #define PREV_RECV(i)  \
 264         (((i) + RR_SNAP_RECV_RING_SIZE - 1) & (RR_SNAP_RECV_RING_SIZE - 1))
 265