sys/dev/isa/smscvar.h

   1 /*      $NetBSD: smscvar.h,v 1.3 2008/04/03 13:36:33 xtraeme Exp $ */
   2
   3 /*-
   4  * Copyright (c) 2000 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Bill Squier.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 #ifndef _DEV_SMSC47B397VAR_H_
  33 #define _DEV_SMSC47B397VAR_H_
  34
  35 /*
  36  * SMSC LPC47B397-NC "super-io" chip
  37  */
  38
  39 #define SMSC_ADDR               0
  40 #define SMSC_DATA               1
  41
  42 /* Chip control registers */
  43
  44 #define SMSC_LOGICAL_DEV_SEL    0x07    /* Selector for logical device */
  45 #define SMSC_DEVICE_ID          0x20    /* Device ID register */
  46 #define SMSC_DEVICE_REVISION    0x21    /* Device revision */
  47 #define SMSC_IO_BASE_MSB        0x60
  48 #define SMSC_IO_BASE_LSB        0x61
  49
  50
  51 #define SMSC_LOGICAL_DEVICE     0x08    /* Magic number to select monitoring
  52                                            functions. */
  53 #define SMSC_CONFIG_START       0x55    /* Start configuration mode */
  54 #define SMSC_CONFIG_END         0xAA    /* End configuration mode */
  55
  56 #define SMSC_ID_47B397          0x6F    /* Chip ID */
  57 #define SMSC_ID_SCH5307NS       0x81
  58 #define SMSC_ID_SCH5317         0x85
  59
  60 /* Data registers */
  61 #define SMSC_TEMP1              0x25
  62 #define SMSC_TEMP2              0x26
  63 #define SMSC_TEMP3              0x27
  64 #define SMSC_TEMP4              0x80
  65
  66 /* NOTE: Reading the Fan LSB locks the Fan MSB. The LSB Must be read first. */
  67 #define SMSC_FAN1_LSB           0x28
  68 #define SMSC_FAN1_MSB           0x29
  69 #define SMSC_FAN2_LSB           0x2A
  70 #define SMSC_FAN2_MSB           0x2B
  71 #define SMSC_FAN3_LSB           0x2C
  72 #define SMSC_FAN3_MSB           0x2D
  73 #define SMSC_FAN4_LSB           0x2E
  74 #define SMSC_FAN4_MSB           0x2F
  75
  76 #define SMSC_MAX_SENSORS        8       /* 4 temp sensors, 4 fan sensors */
  77
  78 struct smsc_softc {
  79         struct device           sc_dev;
  80
  81         bus_space_tag_t         sc_iot;
  82         bus_space_handle_t      sc_ioh;
  83
  84         int                     sc_flags;
  85         struct sysmon_envsys    *sc_sme;
  86         envsys_data_t           sc_sensor[SMSC_MAX_SENSORS];
  87
  88         uint8_t                 sc_regs[SMSC_MAX_SENSORS];
  89 };
  90
  91 #endif /* _DEV_SMSC47B397VAR_H_ */