sys/dev/ofw/ofw_pci.h

   1 /*      $NetBSD: ofw_pci.h,v 1.6 2005/12/11 12:22:48 christos Exp $     */
   2
   3 /*-
   4  * Copyright (c) 1999 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
   9  * NASA Ames Research Center.
  10  *
  11  * Redistribution and use in source and binary forms, with or without
  12  * modification, are permitted provided that the following conditions
  13  * are met:
  14  * 1. Redistributions of source code must retain the above copyright
  15  *    notice, this list of conditions and the following disclaimer.
  16  * 2. Redistributions in binary form must reproduce the above copyright
  17  *    notice, this list of conditions and the following disclaimer in the
  18  *    documentation and/or other materials provided with the distribution.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  30  * POSSIBILITY OF SUCH DAMAGE.
  31  */
  32
  33 #ifndef _DEV_OFW_OFW_PCI_H_
  34 #define _DEV_OFW_OFW_PCI_H_
  35
  36 /*
  37  * PCI Bus Binding to:
  38  *
  39  * IEEE Std 1275-1994
  40  * Standard for Boot (Initialization Configuration) Firmware
  41  *
  42  * Revision 2.1
  43  */
  44
  45 /*
  46  * Section 2.2.1. Physical Address Formats
  47  *
  48  * A PCI physical address is represented by 3 address cells:
  49  *
  50  *      phys.hi cell:   npt000ss bbbbbbbb dddddfff rrrrrrrr
  51  *      phys.mid cell:  hhhhhhhh hhhhhhhh hhhhhhhh hhhhhhhh
  52  *      phys.lo cell:   llllllll llllllll llllllll llllllll
  53  *
  54  *      n       nonrelocatable
  55  *      p       prefetchable
  56  *      t       aliased below 1MB (memory) or 64k (i/o)
  57  *      ss      space code
  58  *      b       bus number
  59  *      d       device number
  60  *      f       function number
  61  *      r       register number
  62  *      h       high 32-bits of PCI address
  63  *      l       low 32-bits of PCI address
  64  */
  65
  66 #define OFW_PCI_PHYS_HI_NONRELOCATABLE  0x80000000
  67 #define OFW_PCI_PHYS_HI_PREFETCHABLE    0x40000000
  68 #define OFW_PCI_PHYS_HI_ALIASED         0x20000000
  69 #define OFW_PCI_PHYS_HI_SPACEMASK       0x03000000
  70 #define OFW_PCI_PHYS_HI_BUSMASK         0x00ff0000
  71 #define OFW_PCI_PHYS_HI_BUSSHIFT        16
  72 #define OFW_PCI_PHYS_HI_DEVICEMASK      0x0000f800
  73 #define OFW_PCI_PHYS_HI_DEVICESHIFT     11
  74 #define OFW_PCI_PHYS_HI_FUNCTIONMASK    0x00000700
  75 #define OFW_PCI_PHYS_HI_FUNCTIONSHIFT   8
  76 #define OFW_PCI_PHYS_HI_REGISTERMASK    0x000000ff
  77
  78 #define OFW_PCI_PHYS_HI_SPACE_CONFIG    0x00000000
  79 #define OFW_PCI_PHYS_HI_SPACE_IO        0x01000000
  80 #define OFW_PCI_PHYS_HI_SPACE_MEM32     0x02000000
  81 #define OFW_PCI_PHYS_HI_SPACE_MEM64     0x03000000
  82
  83 #define OFW_PCI_PHYS_HI_BUS(hi) \
  84         (((hi) & OFW_PCI_PHYS_HI_BUSMASK) >> OFW_PCI_PHYS_HI_BUSSHIFT)
  85 #define OFW_PCI_PHYS_HI_DEVICE(hi) \
  86         (((hi) & OFW_PCI_PHYS_HI_DEVICEMASK) >> OFW_PCI_PHYS_HI_DEVICESHIFT)
  87 #define OFW_PCI_PHYS_HI_FUNCTION(hi) \
  88         (((hi) & OFW_PCI_PHYS_HI_FUNCTIONMASK) >> OFW_PCI_PHYS_HI_FUNCTIONSHIFT)
  89
  90 /*
  91  * This has the 3 32bit cell values, plus 2 more to make up a 64-bit size.
  92  */
  93 struct ofw_pci_register {
  94         u_int32_t       phys_hi;
  95         u_int32_t       phys_mid;
  96         u_int32_t       phys_lo;
  97         u_int32_t       size_hi;
  98         u_int32_t       size_lo;
  99 };
 100
 101 #endif /* _DEV_OFW_OFW_PCI_H_ */