sys/dev/pci/cy82c693.c

   1 /* $NetBSD: cy82c693.c,v 1.5 2008/01/04 21:18:01 ad Exp $ */
   2
   3 /*-
   4  * Copyright (c) 2000 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Jason R. Thorpe.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 /*
  33  * Common routines to read/write control registers on the Cypress 82c693
  34  * hyperCache(tm) Stand-Alone PCI Peripheral Controller with USB.
  35  */
  36
  37 #include <sys/cdefs.h>
  38 __KERNEL_RCSID(0, "$NetBSD: cy82c693.c,v 1.5 2008/01/04 21:18:01 ad Exp $");
  39
  40 #include "opt_multiprocessor.h"
  41 #include "opt_lockdebug.h"
  42
  43 #include <sys/param.h>
  44 #include <sys/device.h>
  45 #include <sys/systm.h>
  46 #include <sys/bus.h>
  47 #include <sys/simplelock.h>
  48
  49 #include <dev/pci/pcireg.h>
  50 #include <dev/pci/pcivar.h>
  51
  52 #include <dev/pci/cy82c693reg.h>
  53 #include <dev/pci/cy82c693var.h>
  54
  55 static struct cy82c693_handle cyhc_handle;
  56 static int cyhc_initialized;
  57
  58 static struct simplelock cyhc_slock = SIMPLELOCK_INITIALIZER;
  59
  60 #define CYHC_LOCK(s)                                                    \
  61 do {                                                                    \
  62         s = splhigh();                                                  \
  63         simple_lock(&cyhc_slock);                                       \
  64 } while (0)
  65
  66 #define CYHC_UNLOCK(s)                                                  \
  67 do {                                                                    \
  68         simple_unlock(&cyhc_slock);                                     \
  69         splx(s);                                                        \
  70 } while (0)
  71
  72 const struct cy82c693_handle *
  73 cy82c693_init(bus_space_tag_t iot)
  74 {
  75         bus_space_handle_t ioh;
  76         int s;
  77
  78         CYHC_LOCK(s);
  79
  80         if (cyhc_initialized) {
  81                 CYHC_UNLOCK(s);
  82                 if (iot != cyhc_handle.cyhc_iot)
  83                         panic("cy82c693_init");
  84                 return (&cyhc_handle);
  85         }
  86
  87         if (bus_space_map(iot, CYHC_CONFIG_ADDR, 2, 0, &ioh) != 0) {
  88                 CYHC_UNLOCK(s);
  89                 return (NULL);
  90         }
  91
  92         cyhc_handle.cyhc_iot = iot;
  93         cyhc_handle.cyhc_ioh = ioh;
  94
  95         cyhc_initialized = 1;
  96
  97         CYHC_UNLOCK(s);
  98
  99         return (&cyhc_handle);
 100 }
 101
 102 u_int8_t
 103 cy82c693_read(const struct cy82c693_handle *cyhc, int reg)
 104 {
 105         int s;
 106         u_int8_t rv;
 107
 108         CYHC_LOCK(s);
 109
 110         if (cyhc_initialized == 0) {
 111                 CYHC_UNLOCK(s);
 112                 panic("cy82c693_read");
 113         }
 114
 115         bus_space_write_1(cyhc->cyhc_iot, cyhc->cyhc_ioh, 0, reg);
 116         rv = bus_space_read_1(cyhc->cyhc_iot, cyhc->cyhc_ioh, 1);
 117
 118         CYHC_UNLOCK(s);
 119
 120         return (rv);
 121 }
 122
 123 void
 124 cy82c693_write(const struct cy82c693_handle *cyhc, int reg, u_int8_t val)
 125 {
 126         int s;
 127
 128         CYHC_LOCK(s);
 129
 130         if (cyhc_initialized == 0) {
 131                 CYHC_UNLOCK(s);
 132                 panic("cy82c693_write");
 133         }
 134
 135         bus_space_write_1(cyhc->cyhc_iot, cyhc->cyhc_ioh, 0, reg);
 136         bus_space_write_1(cyhc->cyhc_iot, cyhc->cyhc_ioh, 1, val);
 137
 138         CYHC_UNLOCK(s);
 139 }