Expand PMF_FN_* macros.
[netbsd-mini2440.git] / sys / dev / pci / cyberreg.h
blob5797361a300bcb3162729981adbb8798c1022670
1 /* $NetBSD: cyberreg.h,v 1.2 2005/12/11 12:22:49 christos Exp $ */
3 /*-
4 * Copyright (c) 2004 The NetBSD Foundation, Inc.
5 * All rights reserved.
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Frederick S. Bruckman.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
33 * These cards have various combinations of serial and parallel ports. All
34 * varieties have up to 6 1-bit registers for extended capabilities, named
35 * "Usr0, ..., Usr5". The functional registers are mapped to the proper
36 * "Usr" register at attachment time. The only functional registers the
37 * kernel currently deals with are the registers to enable or disable the
38 * alternate clock, which permits speeds of the serial port all the way to
39 * 960Kbps. (In the documentation, those registers are called "Clks0" and
40 * "Clks1" on the "10x" series, and * "K0" and "K1" on the 20x series.)
43 #ifndef _PCI_CYBERREG_H_
44 #define _PCI_CYBERREG_H_
46 /* The "10x" series cards have 4 1-bit registers, spaced 3 bits apart. */
47 #define SIIG10x_USR_BASE 0x50
48 #define SIIG10x_USR0_MASK (1 << 2 << 16)
49 #define SIIG10x_USR1_MASK (1 << 5 << 16)
50 #define SIIG10x_USR2_MASK (1 << 8 << 16)
51 #define SIIG10x_USR3_MASK (1 << 11 << 16)
53 /* The "20x" series cards have 6 1-bit registers, spaced 32 bits apart. */
54 #define SIIG20x_USR0 0x6c
55 #define SIIG20x_USR1 0x70
56 #define SIIG20x_USR2 0x74
57 #define SIIG20x_USR3 0x78
58 #define SIIG20x_USR4 0x7c
59 #define SIIG20x_USR5 0x80
60 #define SIIG20x_USR_MASK (1 << 28)
62 #endif /* !_PCI_CYBERREG_H_ */