| blob | da291c565a63106bf19eb17fa9b44d44de90990e |
1 /* $NetBSD: hdaudioreg.h,v 1.2 2009/09/06 17:33:53 sborrill Exp $ */
3 /*
4 * Copyright (c) 2009 Precedence Technologies Ltd <support@precedence.co.uk>
5 * Copyright (c) 2009 Jared D. McNeill <jmcneill@invisible.ca>
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Precedence Technologies Ltd
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. The name of the author may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
24 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
26 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
27 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 */
32 #ifndef _HDAUDIOREG_H
33 #define _HDAUDIOREG_H
35 /*
36 * High Definition Audio Audio PCI Configuration Space
37 */
38 #define HDAUDIO_PCI_AZBARL 0x10
39 #define HDAUDIO_PCI_AZBARU 0x14
40 #define HDAUDIO_PCI_AZCTL 0x40
41 #define HDAUDIO_PCI_TCSEL 0x44
43 /*
44 * High Definition Audio Memory Mapped Configuration Registers
45 */
46 #define HDAUDIO_MMIO_GCAP 0x000
47 #define HDAUDIO_MMIO_VMIN 0x002
48 #define HDAUDIO_MMIO_VMAJ 0x003
49 #define HDAUDIO_MMIO_OUTPAY 0x004
50 #define HDAUDIO_MMIO_INPAY 0x006
51 #define HDAUDIO_MMIO_GCTL 0x008
52 #define HDAUDIO_GCTL_UNSOL_EN (1 << 8)
53 #define HDAUDIO_GCTL_FLUSH_CTL (1 << 1)
54 #define HDAUDIO_GCTL_CRST (1 << 0)
55 #define HDAUDIO_MMIO_WAKEEN 0x00c
56 #define HDAUDIO_MMIO_STATESTS 0x00e
57 #define HDAUDIO_STATESTS_SDIWAKE 0x7fff
58 #define HDAUDIO_MMIO_GSTS 0x010
59 #define HDAUDIO_MMIO_INTCTL 0x020
60 #define HDAUDIO_INTCTL_GIE (1 << 31)
61 #define HDAUDIO_INTCTL_CIE (1 << 30)
62 #define HDAUDIO_MMIO_INTSTS 0x024
63 #define HDAUDIO_INTSTS_GIS (1 << 31)
64 #define HDAUDIO_INTSTS_CIS (1 << 30)
65 #define HDAUDIO_INTSTS_SIS_MASK 0x3fffffff
66 #define HDAUDIO_MMIO_WALCLK 0x030
67 #define HDAUDIO_MMIO_SYNC 0x034
68 #define HDAUDIO_MMIO_CORBLBASE 0x040
69 #define HDAUDIO_MMIO_CORBUBASE 0x044
70 #define HDAUDIO_MMIO_CORBWP 0x048
71 #define HDAUDIO_MMIO_CORBRP 0x04a
72 #define HDAUDIO_CORBRP_RP_RESET (1 << 15)
73 #define HDAUDIO_MMIO_CORBCTL 0x04c
74 #define HDAUDIO_CORBCTL_RUN (1 << 1)
75 #define HDAUDIO_CORBCTL_CMEI_EN (1 << 0)
76 #define HDAUDIO_MMIO_CORBST 0x04d
77 #define HDAUDIO_MMIO_CORBSIZE 0x04e
78 #define HDAUDIO_MMIO_RIRBLBASE 0x050
79 #define HDAUDIO_MMIO_RIRBUBASE 0x054
80 #define HDAUDIO_MMIO_RIRBWP 0x058
81 #define HDAUDIO_RIRBWP_WP_RESET (1 << 15)
82 #define HDAUDIO_MMIO_RINTCNT 0x05a
83 #define HDAUDIO_MMIO_RIRBCTL 0x05c
84 #define HDAUDIO_RIRBCTL_ROI_EN (1 << 2)
85 #define HDAUDIO_RIRBCTL_RUN (1 << 1)
86 #define HDAUDIO_RIRBCTL_INT_EN (1 << 0)
87 #define HDAUDIO_MMIO_RIRBSTS 0x05d
88 #define HDAUDIO_RIRBSTS_RIRBOIS (1 << 2)
89 #define HDAUDIO_RIRBSTS_RINTFL (1 << 0)
90 #define HDAUDIO_MMIO_RIRBSIZE 0x05e
91 #define HDAUDIO_MMIO_IC 0x060
92 #define HDAUDIO_MMIO_IR 0x064
93 #define HDAUDIO_MMIO_IRS 0x068
94 #define HDAUDIO_MMIO_DPLBASE 0x070
95 #define HDAUDIO_MMIO_DPUBASE 0x074
97 #define HDAUDIO_MMIO_SD_SIZE 0x20
98 #define HDAUDIO_MMIO_SD_BASE 0x080
100 #define HDAUDIO_SD_REG(off, x) \
101 (HDAUDIO_MMIO_SD_BASE + ((x) * HDAUDIO_MMIO_SD_SIZE) + (off))
102 #define HDAUDIO_SD_CTL0(x) HDAUDIO_SD_REG(0x00, x)
103 #define HDAUDIO_CTL_SRST (1 << 0)
104 #define HDAUDIO_CTL_RUN (1 << 1)
105 #define HDAUDIO_CTL_IOCE (1 << 2)
106 #define HDAUDIO_CTL_FEIE (1 << 3)
107 #define HDAUDIO_CTL_DEIE (1 << 4)
108 #define HDAUDIO_SD_CTL1(x) HDAUDIO_SD_REG(0x01, x)
109 #define HDAUDIO_SD_CTL2(x) HDAUDIO_SD_REG(0x02, x)
110 #define HDAUDIO_SD_STS(x) HDAUDIO_SD_REG(0x03, x)
111 #define HDAUDIO_STS_FIFORDY (1 << 5)
112 #define HDAUDIO_STS_DESE (1 << 4)
113 #define HDAUDIO_STS_FIFOE (1 << 3)
114 #define HDAUDIO_STS_BCIS (1 << 2)
115 #define HDAUDIO_SD_LPIB(x) HDAUDIO_SD_REG(0x04, x)
116 #define HDAUDIO_SD_CBL(x) HDAUDIO_SD_REG(0x08, x)
117 #define HDAUDIO_SD_LVI(x) HDAUDIO_SD_REG(0x0c, x)
118 #define HDAUDIO_SD_FIFOW(x) HDAUDIO_SD_REG(0x0e, x)
119 #define HDAUDIO_SD_FIFOS(x) HDAUDIO_SD_REG(0x10, x)
120 #define HDAUDIO_SD_FMT(x) HDAUDIO_SD_REG(0x12, x)
121 #define HDAUDIO_FMT_BASE_MASK 0x4000
122 #define HDAUDIO_FMT_BASE_48 0x0000
123 #define HDAUDIO_FMT_BASE_44 0x4000
124 #define HDAUDIO_FMT_MULT_MASK 0x3800
125 #define HDAUDIO_FMT_MULT(x) ((((x) - 1) << 11) & HDAUDIO_FMT_MULT_MASK)
126 #define HDAUDIO_FMT_DIV_MASK 0x0700
127 #define HDAUDIO_FMT_DIV(x) ((((x) - 1) << 8) & HDAUDIO_FMT_DIV_MASK)
128 #define HDAUDIO_FMT_BITS_MASK 0x0070
129 #define HDAUDIO_FMT_BITS_8_16 (0 << 4)
130 #define HDAUDIO_FMT_BITS_16_16 (1 << 4)
131 #define HDAUDIO_FMT_BITS_20_32 (2 << 4)
132 #define HDAUDIO_FMT_BITS_24_32 (3 << 4)
133 #define HDAUDIO_FMT_BITS_32_32 (4 << 4)
134 #define HDAUDIO_FMT_CHAN_MASK 0x000f
135 #define HDAUDIO_FMT_CHAN(x) (((x) - 1) & HDAUDIO_FMT_CHAN_MASK)
136 #define HDAUDIO_SD_BDPL(x) HDAUDIO_SD_REG(0x18, x)
137 #define HDAUDIO_SD_BDPU(x) HDAUDIO_SD_REG(0x1c, x)
139 /*
140 * Codec Parameters and Controls
141 */
142 #define CORB_GET_PARAMETER 0xf00
143 #define COP_VENDOR_ID 0x00
144 #define COP_REVISION_ID 0x02
145 #define COP_SUBORDINATE_NODE_COUNT 0x04
146 #define COP_NODECNT_STARTNODE(x) (((x) >> 16) & 0xff)
147 #define COP_NODECNT_NUMNODES(x) (((x) >> 0) & 0xff)
148 #define COP_FUNCTION_GROUP_TYPE 0x05
149 #define COP_AUDIO_FUNCTION_GROUP_CAPABILITIES 0x08
150 #define COP_AUDIO_WIDGET_CAPABILITIES 0x09
151 #define COP_AWCAP_STEREO (1 << 0)
152 #define COP_AWCAP_INAMP_PRESENT (1 << 1)
153 #define COP_AWCAP_OUTAMP_PRESENT (1 << 2)
154 #define COP_AWCAP_AMP_PARAM_OVERRIDE (1 << 3)
155 #define COP_AWCAP_FORMAT_OVERRIDE (1 << 4)
156 #define COP_AWCAP_STRIPE (1 << 5)
157 #define COP_AWCAP_PROC_WIDGET (1 << 6)
158 #define COP_AWCAP_UNSOL_CAPABLE (1 << 7)
159 #define COP_AWCAP_CONN_LIST (1 << 8)
160 #define COP_AWCAP_DIGITAL (1 << 9)
161 #define COP_AWCAP_POWER_CNTRL (1 << 10)
162 #define COP_AWCAP_LR_SWAP (1 << 11)
163 #define COP_AWCAP_DELAY(x) (((x) >> 16) & 0xf)
164 #define COP_AWCAP_TYPE(x) (((x) >> 20) & 0xf)
165 #define COP_AWCAP_TYPE_MASK 0x00f00000
166 #define COP_AWCAP_TYPE_SHIFT 20
167 #define COP_AWCAP_TYPE_AUDIO_OUTPUT 0x0
168 #define COP_AWCAP_TYPE_AUDIO_INPUT 0x1
169 #define COP_AWCAP_TYPE_AUDIO_MIXER 0x2
170 #define COP_AWCAP_TYPE_AUDIO_SELECTOR 0x3
171 #define COP_AWCAP_TYPE_PIN_COMPLEX 0x4
172 #define COP_AWCAP_TYPE_POWER_WIDGET 0x5
173 #define COP_AWCAP_TYPE_VOLUME_KNOB 0x6
174 #define COP_AWCAP_TYPE_BEEP_GENERATOR 0x7
175 #define COP_AWCAP_TYPE_VENDOR_DEFINED 0xf
176 #define COP_SUPPORTED_PCM_SIZE_RATES 0x0a
177 #define COP_SUPPORTED_STREAM_FORMATS 0x0b
178 #define COP_PIN_CAPABILITIES 0x0c
179 #define COP_PINCAP_IMPEDANCE_SENSE_CAPABLE (1 << 0)
180 #define COP_PINCAP_TRIGGER_REQD (1 << 1)
181 #define COP_PINCAP_PRESENSE_DETECT_CAPABLE (1 << 2)
182 #define COP_PINCAP_HEADPHONE_DRIVE_CAPABLE (1 << 3)
183 #define COP_PINCAP_OUTPUT_CAPABLE (1 << 4)
184 #define COP_PINCAP_INPUT_CAPABLE (1 << 5)
185 #define COP_PINCAP_BALANCED_IO_PINS (1 << 6)
186 #define COP_PINCAP_VREF_CONTROL(x) (((x) >> 8) & 0xff)
187 #define COP_VREF_HIZ (1 << 0)
188 #define COP_VREF_50 (1 << 1)
189 #define COP_VREF_GROUND (1 << 2)
190 #define COP_VREF_80 (1 << 4)
191 #define COP_VREF_100 (1 << 5)
192 #define COP_PINCAP_EAPD_CAPABLE (1 << 16)
193 #define COP_AMPLIFIER_CAPABILITIES_INAMP 0x0d
194 #define COP_AMPLIFIER_CAPABILITIES_OUTAMP 0x12
195 #define COP_AMPCAP_OFFSET(x) (((x) >> 0) & 0x7f)
196 #define COP_AMPCAP_NUM_STEPS(x) (((x) >> 8) & 0x7f)
197 #define COP_AMPCAP_STEP_SIZE(x) (((x) >> 16) & 0x7f)
198 #define COP_AMPCAP_MUTE_CAPABLE(x) (((x) >> 31) & 0x1)
199 #define COP_CONNECTION_LIST_LENGTH 0x0e
200 #define COP_CONNECTION_LIST_LENGTH_LEN(x) ((x) & 0x7f)
201 #define COP_CONNECTION_LIST_LENGTH_LONG_FORM (1 << 7)
202 #define COP_SUPPORTED_POWER_STATES 0x0f
203 #define COP_PROCESSING_CAPABILITIES 0x10
204 #define COP_GPIO_COUNT 0x11
205 #define COP_GPIO_COUNT_NUM_GPIO(x) ((x) & 0xff)
206 #define COP_VOLUME_KNOB_CAPABILITIES 0x13
207 #define CORB_GET_CONNECTION_SELECT_CONTROL 0xf01
208 #define CORB_SET_CONNECTION_SELECT_CONTROL 0x701
209 #define CORB_GET_CONNECTION_LIST_ENTRY 0xf02
210 #define CORB_GET_PROCESSING_STATE 0xf03
211 #define CORB_SET_PROCESSING_STATE 0x703
212 #define CORB_GET_COEFFICIENT_INDEX 0xd00
213 #define CORB_SET_COEFFICIENT_INDEX 0x500
214 #define CORB_GET_PROCESSING_COEFFICIENT 0xc00
215 #define CORB_SET_PROCESSING_COEFFICIENT 0x400
216 #define CORB_GET_AMPLIFIER_GAIN_MUTE 0xb00
217 #define CORB_SET_AMPLIFIER_GAIN_MUTE 0x300
218 #define CORB_GET_CONVERTER_FORMAT 0xa00
219 #define CORB_SET_CONVERTER_FORMAT 0x200
220 #define CORB_GET_DIGITAL_CONVERTER_CONTROL 0xf0d
221 #define CORB_SET_DIGITAL_CONVERTER_CONTROL_1 0x70d
222 #define COP_DIGITAL_CONVCTRL1_DIGEN (1 << 0)
223 #define COP_DIGITAL_CONVCTRL1_V (1 << 1)
224 #define COP_DIGITAL_CONVCTRL1_VCFG (1 << 2)
225 #define COP_DIGITAL_CONVCTRL1_PRE (1 << 3)
226 #define COP_DIGITAL_CONVCTRL1_COPY (1 << 4)
227 #define COP_DIGITAL_CONVCTRL1_NAUDIO (1 << 5)
228 #define COP_DIGITAL_CONVCTRL1_PRO (1 << 6)
229 #define COP_DIGITAL_CONVCTRL1_L (1 << 7)
230 #define CORB_SET_DIGITAL_CONVERTER_CONTROL_2 0x70e
231 #define COP_DIGITAL_CONVCTRL2_CC_MASK 0x7f
232 #define CORB_GET_POWER_STATE 0xf05
233 #define CORB_SET_POWER_STATE 0x705
234 #define COP_POWER_STATE_D0 0x00
235 #define COP_POWER_STATE_D1 0x01
236 #define COP_POWER_STATE_D2 0x02
237 #define COP_POWER_STATE_D3 0x03
238 #define CORB_GET_CONVERTER_STREAM_CHANNEL 0xf06
239 #define CORB_SET_CONVERTER_STREAM_CHANNEL 0x706
240 #define CORB_GET_INPUT_CONVERTER_SDI_SELECT 0xf04
241 #define CORB_SET_INPUT_CONVERTER_SDI_SELECT 0x704
242 #define CORB_GET_PIN_WIDGET_CONTROL 0xf07
243 #define CORB_SET_PIN_WIDGET_CONTROL 0x707
244 #define COP_PWC_VREF_ENABLE_MASK (7 << 0)
245 #define COP_PWC_VREF_HIZ 0x00
246 #define COP_PWC_VREF_50 0x01
247 #define COP_PWC_VREF_GND 0x02
248 #define COP_PWC_VREF_80 0x04
249 #define COP_PWC_VREF_100 0x05
250 #define COP_PWC_IN_ENABLE (1 << 5)
251 #define COP_PWC_OUT_ENABLE (1 << 6)
252 #define COP_PWC_HPHN_ENABLE (1 << 7)
253 #define CORB_GET_UNSOLICITED_RESPONSE 0xf08
254 #define CORB_SET_UNSOLICITED_RESPONSE 0x708
255 #define COP_SET_UNSOLICITED_RESPONSE_ENABLE (1 << 7)
256 #define CORB_GET_PIN_SENSE 0xf09
257 #define COP_GET_PIN_SENSE_PRESENSE_DETECT (1 << 31)
258 #define COP_GET_PIN_SENSE_IMPEDENCE_SENSE(x) ((x) & 0x7fffffff)
259 #define CORB_SET_PIN_SENSE 0x709
260 #define CORB_GET_EAPD_BTL_ENABLE 0xf0c
261 #define CORB_SET_EAPD_BTL_ENABLE 0x70c
262 #define COP_EAPD_ENABLE_BTL (1 << 0)
263 #define COP_EAPD_ENABLE_EAPD (1 << 1)
264 #define COP_EAPD_ENABLE_LR_SWAP (1 << 2)
265 #define CORB_GET_GPI_DATA 0xf10
266 #define CORB_SET_GPI_DATA 0x710
267 #define CORB_GET_GPI_WAKE_ENABLE_MASK 0xf11
268 #define CORB_SET_GPI_WAKE_ENABLE_MASK 0x711
269 #define CORB_GET_GPI_UNSOLICITED_ENABLE_MASK 0xf12
270 #define CORB_SET_GPI_UNSOLICITED_ENABLE_MASK 0x712
271 #define CORB_GET_GPI_STICKY_MASK 0xf13
272 #define CORB_SET_GPI_STICKY_MASK 0x713
273 #define CORB_GET_GPO_DATA 0xf14
274 #define CORB_SET_GPO_DATA 0x714
275 #define CORB_GET_GPIO_DATA 0xf15
276 #define CORB_SET_GPIO_DATA 0x715
277 #define CORB_GET_GPIO_ENABLE_MASK 0xf16
278 #define CORB_SET_GPIO_ENABLE_MASK 0x716
279 #define CORB_GET_GPIO_DIRECTION 0xf17
280 #define CORB_SET_GPIO_DIRECTION 0x717
281 #define CORB_GET_GPIO_WAKE_ENABLE_MASK 0xf18
282 #define CORB_SET_GPIO_WAKE_ENABLE_MASK 0x718
283 #define CORB_GET_GPIO_UNSOLICITED_ENABLE_MASK 0xf19
284 #define CORB_SET_GPIO_UNSOLICITED_ENABLE_MASK 0x719
285 #define CORB_GET_GPIO_STICKY_MASK 0xf1a
286 #define CORB_SET_GPIO_STICKY_MASK 0x71a
287 #define CORB_GET_BEEP_GENERATION 0xf0a
288 #define CORB_SET_BEEP_GENERATION 0x70a
289 #define CORB_GET_VOLUME_KNOB 0xf0f
290 #define CORB_SET_VOLUME_KNOB 0x70f
291 #define CORB_GET_SUBSYSTEM_ID 0xf20
292 #define CORB_SET_SUBSYSTEM_ID_1 0x720
293 #define CORB_SET_SUBSYSTEM_ID_2 0x721
294 #define CORB_SET_SUBSYSTEM_ID_3 0x722
295 #define CORB_SET_SUBSYSTEM_ID_4 0x723
296 #define CORB_GET_CONFIGURATION_DEFAULT 0xf1c
297 #define COP_CFG_SEQUENCE(x) (((x) >> 0) & 0xf)
298 #define COP_CFG_DEFAULT_ASSOCIATION(x) (((x) >> 4) & 0xf)
299 #define COP_CFG_MISC(x) (((x) >> 8) & 0xf)
300 #define COP_CFG_COLOR(x) (((x) >> 12) & 0xf)
301 #define COP_CFG_CONNECTION_TYPE(x) (((x) >> 16) & 0xf)
302 #define COP_CONN_TYPE_UNKNOWN 0x0
303 #define COP_CONN_TYPE_18INCH 0x1
304 #define COP_CONN_TYPE_14INCH 0x2
305 #define COP_CONN_TYPE_ATAPI_INTERNAL 0x3
306 #define COP_CONN_TYPE_RCA 0x4
307 #define COP_CONN_TYPE_OPTICAL 0x5
308 #define COP_CONN_TYPE_OTHER_DIGITAL 0x6
309 #define COP_CONN_TYPE_OTHER_ANALOG 0x7
310 #define COP_CONN_TYPE_DIN 0x8
311 #define COP_CONN_TYPE_XLR 0x9
312 #define COP_CONN_TYPE_RJ11 0xa
313 #define COP_CONN_TYPE_COMBINATION 0xb
314 #define COP_CONN_TYPE_OTHER 0xf
315 #define COP_CFG_DEFAULT_DEVICE(x) (((x) >> 20) & 0xf)
316 #define COP_DEVICE_MASK 0x00f00000
317 #define COP_DEVICE_SHIFT 20
318 #define COP_DEVICE_LINE_OUT 0x0
319 #define COP_DEVICE_SPEAKER 0x1
320 #define COP_DEVICE_HP_OUT 0x2
321 #define COP_DEVICE_CD 0x3
322 #define COP_DEVICE_SPDIF_OUT 0x4
323 #define COP_DEVICE_DIGITAL_OTHER_OUT 0x5
324 #define COP_DEVICE_MODEM_LINE_SIDE 0x6
325 #define COP_DEVICE_MODEM_HANDSET_SIDE 0x7
326 #define COP_DEVICE_LINE_IN 0x8
327 #define COP_DEVICE_AUX 0x9
328 #define COP_DEVICE_MIC_IN 0xa
329 #define COP_DEVICE_TELEPHONY 0xb
330 #define COP_DEVICE_SPDIF_IN 0xc
331 #define COP_DEVICE_DIGITAL_OTHER_IN 0xd
332 #define COP_DEVICE_OTHER 0xf
333 #define COP_CFG_LOCATION(x) (((x) >> 24) & 0x3f)
334 #define COP_CFG_PORT_CONNECTIVITY(x) (((x) >> 30) & 0x3)
335 #define COP_PORT_JACK 0x0
336 #define COP_PORT_NONE 0x1
337 #define COP_PORT_FIXED_FUNCTION 0x2
338 #define COP_PORT_BOTH 0x3
339 #define CORB_SET_CONFIGURATION_DEFAULT_1 0x71c
340 #define CORB_SET_CONFIGURATION_DEFAULT_2 0x71d
341 #define CORB_SET_CONFIGURATION_DEFAULT_3 0x71e
342 #define CORB_SET_CONFIGURATION_DEFAULT_4 0x71f
343 #define CORB_GET_STRIPE_CONTROL 0xf24
344 #define CORB_SET_STRIPE_CONTROL 0x720
345 #define CORB_EXECUTE_RESET 0x7ff
347 /*
348 * RIRB Entry Format
349 */
353 #define RIRB_CODEC_ID(entry) ((entry)->resp_ex & 0xf)
354 #define RIRB_UNSOL(entry) ((entry)->resp_ex & 0x10)