1 /* $NetBSD: if_atw_pci.c,v 1.22 2009/09/16 16:34:50 dyoung Exp $ */
4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc.
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center; Charles M. Hannum; and David Young.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
34 * PCI bus front-end for the ADMtek ADM8211 802.11 MAC/BBP chip.
36 * Derived from the ``Tulip'' PCI bus front-end.
39 #include <sys/cdefs.h>
40 __KERNEL_RCSID(0, "$NetBSD: if_atw_pci.c,v 1.22 2009/09/16 16:34:50 dyoung Exp $");
42 #include <sys/param.h>
43 #include <sys/systm.h>
45 #include <sys/malloc.h>
46 #include <sys/kernel.h>
47 #include <sys/socket.h>
48 #include <sys/ioctl.h>
49 #include <sys/errno.h>
50 #include <sys/device.h>
52 #include <machine/endian.h>
55 #include <net/if_dl.h>
56 #include <net/if_media.h>
57 #include <net/if_ether.h>
59 #include <net80211/ieee80211_netbsd.h>
60 #include <net80211/ieee80211_radiotap.h>
61 #include <net80211/ieee80211_var.h>
66 #include <dev/ic/atwreg.h>
67 #include <dev/ic/rf3000reg.h>
68 #include <dev/ic/si4136reg.h>
69 #include <dev/ic/atwvar.h>
71 #include <dev/pci/pcivar.h>
72 #include <dev/pci/pcireg.h>
73 #include <dev/pci/pcidevs.h>
76 * PCI configuration space registers used by the ADM8211.
78 #define ATW_PCI_IOBA 0x10 /* i/o mapped base */
79 #define ATW_PCI_MMBA 0x14 /* memory mapped base */
81 struct atw_pci_softc
{
82 struct atw_softc psc_atw
; /* real ADM8211 softc */
84 pci_intr_handle_t psc_ih
; /* interrupt handle */
87 pci_chipset_tag_t psc_pc
; /* our PCI chipset */
88 pcitag_t psc_pcitag
; /* our PCI tag */
91 static int atw_pci_match(device_t
, cfdata_t
, void *);
92 static void atw_pci_attach(device_t
, device_t
, void *);
93 static bool atw_pci_suspend(device_t
, pmf_qual_t
);
94 static bool atw_pci_resume(device_t
, pmf_qual_t
);
96 CFATTACH_DECL_NEW(atw_pci
, sizeof(struct atw_pci_softc
),
97 atw_pci_match
, atw_pci_attach
, NULL
, NULL
);
99 static const struct atw_pci_product
{
100 u_int32_t app_vendor
; /* PCI vendor ID */
101 u_int32_t app_product
; /* PCI product ID */
102 const char *app_product_name
;
103 } atw_pci_products
[] = {
104 { PCI_VENDOR_ADMTEK
, PCI_PRODUCT_ADMTEK_ADM8211
,
105 "ADMtek ADM8211 802.11 MAC/BBP" },
110 static const struct atw_pci_product
*
111 atw_pci_lookup(const struct pci_attach_args
*pa
)
113 const struct atw_pci_product
*app
;
115 for (app
= atw_pci_products
;
116 app
->app_product_name
!= NULL
;
118 if (PCI_VENDOR(pa
->pa_id
) == app
->app_vendor
&&
119 PCI_PRODUCT(pa
->pa_id
) == app
->app_product
)
126 atw_pci_match(device_t parent
, cfdata_t match
, void *aux
)
128 struct pci_attach_args
*pa
= aux
;
130 if (atw_pci_lookup(pa
) != NULL
)
137 atw_pci_resume(device_t self
, pmf_qual_t qual
)
139 struct atw_pci_softc
*psc
= device_private(self
);
140 struct atw_softc
*sc
= &psc
->psc_atw
;
142 /* Establish the interrupt. */
143 psc
->psc_intrcookie
= pci_intr_establish(psc
->psc_pc
, psc
->psc_ih
,
144 IPL_NET
, atw_intr
, sc
);
145 if (psc
->psc_intrcookie
== NULL
) {
146 aprint_error_dev(sc
->sc_dev
, "unable to establish interrupt\n");
154 atw_pci_suspend(device_t self
, pmf_qual_t qual
)
156 struct atw_pci_softc
*psc
= device_private(self
);
158 /* Unhook the interrupt handler. */
159 pci_intr_disestablish(psc
->psc_pc
, psc
->psc_intrcookie
);
160 psc
->psc_intrcookie
= NULL
;
162 return atw_suspend(self
, qual
);
166 atw_pci_attach(device_t parent
, device_t self
, void *aux
)
168 struct atw_pci_softc
*psc
= device_private(self
);
169 struct atw_softc
*sc
= &psc
->psc_atw
;
170 struct pci_attach_args
*pa
= aux
;
171 pci_chipset_tag_t pc
= pa
->pa_pc
;
172 const char *intrstr
= NULL
;
173 bus_space_tag_t iot
, memt
;
174 bus_space_handle_t ioh
, memh
;
175 int ioh_valid
, memh_valid
;
176 const struct atw_pci_product
*app
;
181 psc
->psc_pc
= pa
->pa_pc
;
182 psc
->psc_pcitag
= pa
->pa_tag
;
184 app
= atw_pci_lookup(pa
);
187 panic("atw_pci_attach: impossible");
191 * Get revision info, and set some chip-specific variables.
193 sc
->sc_rev
= PCI_REVISION(pa
->pa_class
);
194 printf(": %s, revision %d.%d\n", app
->app_product_name
,
195 (sc
->sc_rev
>> 4) & 0xf, sc
->sc_rev
& 0xf);
198 if ((error
= pci_activate(pa
->pa_pc
, pa
->pa_tag
, self
,
199 NULL
)) && error
!= EOPNOTSUPP
) {
200 aprint_error_dev(self
, "cannot activate %d\n", error
);
207 ioh_valid
= (pci_mapreg_map(pa
, ATW_PCI_IOBA
,
208 PCI_MAPREG_TYPE_IO
, 0,
209 &iot
, &ioh
, NULL
, NULL
) == 0);
210 memh_valid
= (pci_mapreg_map(pa
, ATW_PCI_MMBA
,
211 PCI_MAPREG_TYPE_MEM
|PCI_MAPREG_MEM_TYPE_32BIT
, 0,
212 &memt
, &memh
, NULL
, NULL
) == 0);
217 } else if (ioh_valid
) {
221 printf(": unable to map device registers\n");
225 sc
->sc_dmat
= pa
->pa_dmat
;
228 * Make sure bus mastering is enabled.
230 pci_conf_write(pc
, pa
->pa_tag
, PCI_COMMAND_STATUS_REG
,
231 pci_conf_read(pc
, pa
->pa_tag
, PCI_COMMAND_STATUS_REG
) |
232 PCI_COMMAND_MASTER_ENABLE
);
235 * Get the cacheline size.
237 sc
->sc_cacheline
= PCI_CACHELINE(pci_conf_read(pc
, pa
->pa_tag
,
241 * Get PCI data moving command info.
243 if (pa
->pa_flags
& PCI_FLAGS_MRL_OKAY
) /* read line */
244 sc
->sc_flags
|= ATWF_MRL
;
245 if (pa
->pa_flags
& PCI_FLAGS_MRM_OKAY
) /* read multiple */
246 sc
->sc_flags
|= ATWF_MRM
;
247 if (pa
->pa_flags
& PCI_FLAGS_MWI_OKAY
) /* write invalidate */
248 sc
->sc_flags
|= ATWF_MWI
;
251 * Map and establish our interrupt.
253 if (pci_intr_map(pa
, &psc
->psc_ih
)) {
254 aprint_error_dev(self
, "unable to map interrupt\n");
257 intrstr
= pci_intr_string(pc
, psc
->psc_ih
);
258 psc
->psc_intrcookie
= pci_intr_establish(pc
, psc
->psc_ih
, IPL_NET
,
260 if (psc
->psc_intrcookie
== NULL
) {
261 aprint_error_dev(self
, "unable to establish interrupt");
263 aprint_error(" at %s", intrstr
);
268 aprint_normal_dev(self
, "interrupting at %s\n", intrstr
);
271 * Bus-independent attach.
275 if (pmf_device_register1(sc
->sc_dev
, atw_pci_suspend
, atw_pci_resume
,
277 pmf_class_network_register(sc
->sc_dev
, &sc
->sc_if
);
279 aprint_error_dev(sc
->sc_dev
,
280 "couldn't establish power handler\n");
283 * Power down the socket.
285 pmf_device_suspend(sc
->sc_dev
, &sc
->sc_qual
);