sys/dev/pci/n8/common/irq.h

   1 /*-
   2  * Copyright (C) 2001-2003 by NBMK Encryption Technologies.
   3  * All rights reserved.
   4  *
   5  * NBMK Encryption Technologies provides no support of any kind for
   6  * this software.  Questions or concerns about it may be addressed to
   7  * the members of the relevant open-source community at
   8  * <tech-crypto@netbsd.org>.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions are
  12  * met:
  13  *
  14  * 1. Redistributions of source code must retain the above copyright
  15  *    notice, this list of conditions and the following disclaimer.
  16  *
  17  * 2. Redistributions in binary form must reproduce the above
  18  *    copyright notice, this list of conditions and the following
  19  *    disclaimer in the documentation and/or other materials provided
  20  *    with the distribution.
  21  *
  22  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  23  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  24  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  25  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  26  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  27  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  28  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  29  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  30  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  32  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33  */
  34
  35 /*****************************************************************************
  36  * @(#) irq.h 1.14@(#)
  37  *****************************************************************************/
  38
  39 /*****************************************************************************/
  40 /** @file irq.h
  41  *  @brief NSP2000 Device Driver interrupt handling functions
  42  *
  43  * This file contains all secondary interrupt handling routines for the
  44  * NSP2000 Device Driver.
  45  *
  46  *****************************************************************************/
  47
  48 /*****************************************************************************
  49  * Revision history:
  50  * 05/15/03 brr   Removed bit definitions which were also defined in each core
  51  *                specific .h file.
  52  * 03/18/03 brr   Correct bit definitions in Bridge Status Register.
  53  * 10/25/02 brr   Clean up function prototypes & include files.
  54  * 10/10/02 brr   Deleted prototype for N8_WaitOnInterrupt.
  55  * 05/30/02 brr   Added defines for command errors.
  56  * 04/11/02 brr   Pass parameter to waitOnInterrupt to indicate whether
  57  *                sleep should be interruptable.
  58  * 03/08/02 brr   Moved prototype of N8_BlockWithTimeout from helper.h.
  59  * 01/03/02 brr   Added Bridge timer reload constant.
  60  * 11/27/01 mmd   Eliminated N8_EnableInterrupts. Renamed from simon_irq.h.
  61  * 11/10/01 brr   Modified to support static allocations of persistant data
  62  *                by the driver.
  63  * 09/20/01 mmd   Implementation of N8_MainInterruptHandler.
  64  * 09/07/01 mmd   Cleanup and revision of prototypes.
  65  * 07/30/01 mmd   Creation.
  66  ****************************************************************************/
  67 /** @defgroup NSP2000Driver NSP2000 Device Driver
  68  */
  69
  70
  71 #ifndef IRQ_H
  72 #define IRQ_H
  73
  74 #include "n8_driver_main.h"
  75
  76
  77 /******************************************************************************
  78  * INTERRUPT HANDLER RESOURCES -                                              *
  79  *                                                                            *
  80  * These constants are bitmasks for the AMBA control/status registers, and    *
  81  * are used by the interrupt handler to determine the cause of an interrupt,  *
  82  * and to clear the corresponding bit to clear the interrupt.                 *
  83  ******************************************************************************/
  84
  85 /* AMBA IRQ REGISTER BITMASKS */
  86 #define AMBAIRQ_PKP         0x80000000  /* BIT 31 - PKP IRQ                  */
  87 #define AMBAIRQ_CCH         0x40000000  /* BIT 30 - CCH IRQ                  */
  88 #define AMBAIRQ_RNG         0x20000000  /* BIT 29 - RNG IRQ                  */
  89 #define AMBAIRQ_Bridge      0x10000000  /* BIT 28 - Bridge IRQ               */
  90 #define AMBAIRQ_Timer       0x08000000  /* BIT 27 - Bridge Timer IRQ         */
  91                                         /* BIT 26:25 - Reserved              */
  92 #define AMBACCH_Enable      0x01000000  /* BIT 24 - Mirror from E/A          */
  93 #define AMBACCH_Busy        0x00800000  /* BIT 23 - Mirror from E/A          */
  94 #define AMBACCH_Error       0x00400000  /* BIT 22 - Mirror from E/A          */
  95 #define AMBACCH_Rd_Pending  0x00200000  /* BIT 21 - Mirror from E/A          */
  96 #define AMBACCH_Wr_Pending  0x00100000  /* BIT 20 - Mirror from E/A          */
  97 #define AMBAPKH_Enable      0x00080000  /* BIT 19 - Mirror from PKH          */
  98 #define AMBAPKH_Busy        0x00040000  /* BIT 18 - Mirror from PKH          */
  99 #define AMBAPKH_Error       0x00020000  /* BIT 17 - Mirror from PKH          */
 100 #define AMBAPKH_SKS_Go_Busy 0x00010000  /* BIT 16 - Mirror from PKH          */
 101                                         /* BIT 15:14 - Reserved              */
 102 #define AMBAIRQ_HRESP       0x00002000  /* BIT 13 - AHB slave HRESP=ERROR    */
 103 #define AMBAIRQ_HBURST      0x00001000  /* BIT 12 - CCM illegal burst type   */
 104 #define AMBAIRQ_HSIZE       0x00000800  /* BIT 11 - CCM illegal data size    */
 105 #define AMBAIRQ_PCIACC      0x00000400  /* BIT 10 - Non-32 bit access        */
 106 #define AMBAIRQ_RSVMEM      0x00000200  /* BIT  9 - Bridge reserve mem space */
 107 #define AMBAIRQ_TRCV        0x00000100  /* BIT  8 - CS6464AF data parity err */
 108 #define AMBAIRQ_PCIPERR     0x00000080  /* BIT  7 - inSilicon parity error   */
 109 #define AMBA_Timer_Reload   0x00000001  /* BIT  0 - Bridge Timer Reload      */
 110
 111
 112
 113 /* INTERRUPT HANDLER */
 114 void n8_MainInterruptHandler( NspInstance_t   *NSPinstance_p );
 115
 116 /* INTERRUPT NOTIFICATION ROUTINES */
 117 int waitOnInterrupt ( N8_Unit_t        chip,
 118                       unsigned char    coretype,
 119                       unsigned long    bitmask,
 120                       unsigned long    timeout,
 121                       int              interruptable );
 122
 123 /*****************************************************************************
 124  * N8_BlockWithTimeout
 125  *****************************************************************************/
 126 /** @ingroup NSP2000Driver
 127  * @brief Block for notification or specified timeout.
 128  *
 129  * This routine abstracts the Linux system call to block until release or
 130  * timeout.
 131  *
 132  * @param *WaitQueue  RO:  Specifies the block element
 133  * @param  timeout    RO:  Specifies the timeout
 134  * @param  debug      RO:  Specifies whether to display debug messages
 135  *
 136  * @par Externals:
 137  *    N/A
 138  *
 139  * @return
 140  *    0 = success.
 141  *    1 = failure
 142  *
 143  * @par Errors:
 144  *    See return section for error information.
 145  *****************************************************************************/
 146
 147 unsigned char N8_BlockWithTimeout( wait_queue_head_t *WaitQueue,
 148                                    unsigned long      timeout,
 149                                    unsigned char      debug);
 150 void reload_AMBA_timer(void);
 151 void n8_DisplayIRQ(void);
 152
 153 #endif     /* IRQ_H */
 154
 155