sys/dev/pci/siisata_pci.c

   1 /* $NetBSD: siisata_pci.c,v 1.5 2009/10/19 18:41:16 bouyer Exp $ */
   2
   3 /*
   4  * Copyright (c) 2006 Manuel Bouyer.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25  *
  26  */
  27
  28 /*-
  29  * Copyright (c) 2007, 2008, 2009 Jonathan A. Kollasch.
  30  * All rights reserved.
  31  *
  32  * Redistribution and use in source and binary forms, with or without
  33  * modification, are permitted provided that the following conditions
  34  * are met:
  35  * 1. Redistributions of source code must retain the above copyright
  36  *    notice, this list of conditions and the following disclaimer.
  37  * 2. Redistributions in binary form must reproduce the above copyright
  38  *    notice, this list of conditions and the following disclaimer in the
  39  *    documentation and/or other materials provided with the distribution.
  40  *
  41  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  42  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  43  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  44  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  45  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  46  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  47  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  48  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  49  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  50  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  51  *
  52  */
  53
  54 #include <sys/cdefs.h>
  55
  56
  57 #include <sys/types.h>
  58 #include <sys/malloc.h>
  59 #include <sys/param.h>
  60 #include <sys/kernel.h>
  61 #include <sys/systm.h>
  62
  63 #include <uvm/uvm_extern.h>
  64
  65 #include <dev/pci/pcivar.h>
  66 #include <dev/pci/pcidevs.h>
  67 #include <dev/ic/siisatavar.h>
  68
  69 struct siisata_pci_softc {
  70         struct siisata_softc si_sc;
  71         pci_chipset_tag_t sc_pc;
  72         pcitag_t sc_pcitag;
  73         void * sc_ih;
  74 };
  75
  76 static int siisata_pci_match(device_t, cfdata_t, void *);
  77 static void siisata_pci_attach(device_t, device_t, void *);
  78 static int siisata_pci_detach(device_t, int);
  79 static bool siisata_pci_resume(device_t, pmf_qual_t);
  80
  81 struct siisata_pci_board {
  82         pci_vendor_id_t         spb_vend;
  83         pci_product_id_t        spb_prod;
  84         uint16_t                spb_port;
  85         uint16_t                spb_chip;
  86 };
  87
  88 static const struct siisata_pci_board siisata_pci_boards[] = {
  89         {
  90                 .spb_vend = PCI_VENDOR_CMDTECH,
  91                 .spb_prod = PCI_PRODUCT_CMDTECH_3124,
  92                 .spb_port = 4,
  93                 .spb_chip = 3124,
  94         },
  95         {
  96                 .spb_vend = PCI_VENDOR_CMDTECH,
  97                 .spb_prod = PCI_PRODUCT_CMDTECH_3132,
  98                 .spb_port = 2,
  99                 .spb_chip = 3132,
 100         },
 101         {
 102                 .spb_vend = PCI_VENDOR_CMDTECH,
 103                 .spb_prod = PCI_PRODUCT_CMDTECH_3531,
 104                 .spb_port = 1,
 105                 .spb_chip = 3531,
 106         },
 107 };
 108
 109 CFATTACH_DECL_NEW(siisata_pci, sizeof(struct siisata_pci_softc),
 110     siisata_pci_match, siisata_pci_attach, siisata_pci_detach, NULL);
 111
 112 static const struct siisata_pci_board *
 113 siisata_pci_lookup(const struct pci_attach_args * pa)
 114 {
 115         int i;
 116
 117         for (i = 0; i < __arraycount(siisata_pci_boards); i++) {
 118                 if (siisata_pci_boards[i].spb_vend != PCI_VENDOR(pa->pa_id))
 119                         continue;
 120                 if (siisata_pci_boards[i].spb_prod == PCI_PRODUCT(pa->pa_id))
 121                         return &siisata_pci_boards[i];
 122         }
 123
 124         return NULL;
 125 }
 126
 127 static int
 128 siisata_pci_match(device_t parent, cfdata_t match, void *aux)
 129 {
 130         struct pci_attach_args *pa = aux;
 131
 132         if (siisata_pci_lookup(pa) != NULL)
 133                 return 3;
 134
 135         return 0;
 136 }
 137
 138 static void
 139 siisata_pci_attach(device_t parent, device_t self, void *aux)
 140 {
 141         struct pci_attach_args *pa = aux;
 142         struct siisata_pci_softc *psc = device_private(self);
 143         struct siisata_softc *sc = &psc->si_sc;
 144         char devinfo[256];
 145         const char *intrstr;
 146         pcireg_t csr, memtype;
 147         const struct siisata_pci_board *spbp;
 148         pci_intr_handle_t intrhandle;
 149         bus_space_tag_t memt;
 150         bus_space_handle_t memh;
 151         uint32_t gcreg;
 152         int memh_valid;
 153         bus_size_t grsize, prsize;
 154
 155         sc->sc_atac.atac_dev = self;
 156
 157         psc->sc_pc = pa->pa_pc;
 158         psc->sc_pcitag = pa->pa_tag;
 159
 160         pci_devinfo(pa->pa_id, pa->pa_class, 1, devinfo, sizeof(devinfo));
 161         aprint_naive(": SATA-II HBA\n");
 162         aprint_normal(": %s\n", devinfo);
 163
 164         /* map BAR 0, global registers */
 165         memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, SIISATA_PCI_BAR0);
 166         switch (memtype) {
 167         case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT:
 168         case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT:
 169                 memh_valid = (pci_mapreg_map(pa, SIISATA_PCI_BAR0,
 170                         memtype, 0, &memt, &memh, NULL, &grsize) == 0);
 171                 break;
 172         default:
 173                 memh_valid = 0;
 174         }
 175         if (memh_valid) {
 176                 sc->sc_grt = memt;
 177                 sc->sc_grh = memh;
 178                 sc->sc_grs = grsize;
 179         } else {
 180                 aprint_error_dev(self, "couldn't map global registers\n");
 181                 return;
 182         }
 183
 184         /* map BAR 1, port registers */
 185         memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, SIISATA_PCI_BAR1);
 186         switch (memtype) {
 187         case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT:
 188         case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT:
 189                 memh_valid = (pci_mapreg_map(pa, SIISATA_PCI_BAR1,
 190                         memtype, 0, &memt, &memh, NULL, &prsize) == 0);
 191                 break;
 192         default:
 193                 memh_valid = 0;
 194         }
 195         if (memh_valid) {
 196                 sc->sc_prt = memt;
 197                 sc->sc_prh = memh;
 198                 sc->sc_prs = prsize;
 199         } else {
 200                 bus_space_unmap(sc->sc_grt, sc->sc_grh, grsize);
 201                 aprint_error_dev(self, "couldn't map port registers\n");
 202                 return;
 203         }
 204
 205         if (pci_dma64_available(pa))
 206                 sc->sc_dmat = pa->pa_dmat64;
 207         else
 208                 sc->sc_dmat = pa->pa_dmat;
 209
 210         /* map interrupt */
 211         if (pci_intr_map(pa, &intrhandle) != 0) {
 212                 bus_space_unmap(sc->sc_grt, sc->sc_grh, grsize);
 213                 bus_space_unmap(sc->sc_prt, sc->sc_prh, prsize);
 214                 aprint_error_dev(self, "couldn't map interrupt\n");
 215                 return;
 216         }
 217         intrstr = pci_intr_string(pa->pa_pc, intrhandle);
 218         psc->sc_ih = pci_intr_establish(pa->pa_pc, intrhandle,
 219             IPL_BIO, siisata_intr, sc);
 220         if (psc->sc_ih == NULL) {
 221                 bus_space_unmap(sc->sc_grt, sc->sc_grh, grsize);
 222                 bus_space_unmap(sc->sc_prt, sc->sc_prh, prsize);
 223                 aprint_error_dev(self, "couldn't establish interrupt at %s\n",
 224                         intrstr);
 225                 return;
 226         }
 227         aprint_normal_dev(self, "interrupting at %s\n",
 228                 intrstr ? intrstr : "unknown interrupt");
 229
 230         /* fill in number of ports on this device */
 231         spbp = siisata_pci_lookup(pa);
 232         KASSERT(spbp != NULL);
 233         sc->sc_atac.atac_nchannels = spbp->spb_port;
 234
 235         /* set the necessary bits in case the firmware didn't */
 236         csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
 237         csr |= PCI_COMMAND_MASTER_ENABLE;
 238         csr |= PCI_COMMAND_MEM_ENABLE;
 239         pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, csr);
 240
 241         gcreg = GRREAD(sc, GR_GC);
 242
 243         aprint_verbose_dev(self, "SiI%d, %sGb/s\n",
 244                 spbp->spb_chip, (gcreg & GR_GC_3GBPS) ? "3.0" : "1.5" );
 245         if (spbp->spb_chip == 3124) {
 246                 short width;
 247                 short speed;
 248                 char pcix = 1;
 249
 250                 width = (gcreg & GR_GC_REQ64) ? 64 : 32;
 251
 252                 switch (gcreg & (GR_GC_DEVSEL | GR_GC_STOP | GR_GC_TRDY)) {
 253                 case 0:
 254                         speed = (gcreg & GR_GC_M66EN) ? 66 : 33;
 255                         pcix = 0;
 256                         break;
 257                 case GR_GC_TRDY:
 258                         speed = 66;
 259                         break;
 260                 case GR_GC_STOP:
 261                         speed = 100;
 262                         break;
 263                 case GR_GC_STOP | GR_GC_TRDY:
 264                         speed = 133;
 265                         break;
 266                 default:
 267                         speed = -1;
 268                         break;
 269                 }
 270                 aprint_verbose_dev(self, "%hd-bit %hdMHz PCI%s\n",
 271                         width, speed, pcix ? "-X" : "");
 272         }
 273
 274         siisata_attach(sc);
 275
 276         if (!pmf_device_register(self, NULL, siisata_pci_resume))
 277                 aprint_error_dev(self, "couldn't establish power handler\n");
 278 }
 279
 280 static int
 281 siisata_pci_detach(device_t dv, int flags)
 282 {
 283         struct siisata_pci_softc *psc = device_private(dv);
 284         struct siisata_softc *sc = &psc->si_sc;
 285         int rv;
 286
 287         rv = siisata_detach(sc, flags);
 288         if (rv)
 289                 return rv;
 290
 291         if (psc->sc_ih != NULL) {
 292                 pci_intr_disestablish(psc->sc_pc, psc->sc_ih);
 293         }
 294
 295         bus_space_unmap(sc->sc_prt, sc->sc_prh, sc->sc_prs);
 296         bus_space_unmap(sc->sc_grt, sc->sc_grh, sc->sc_grs);
 297
 298         return 0;
 299 }
 300
 301 static bool
 302 siisata_pci_resume(device_t dv, pmf_qual_t qual)
 303 {
 304         struct siisata_pci_softc *psc = device_private(dv);
 305         struct siisata_softc *sc = &psc->si_sc;
 306         int s;
 307
 308         s = splbio();
 309         siisata_resume(sc);
 310         splx(s);
 311
 312         return true;
 313 }