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Expand PMF_FN_* macros.
[netbsd-mini2440.git] / sys / dev / pci / twe.c
blobfabe4292d0843eeda99d37128a4319ccd6f73eb6
1 /* $NetBSD: twe.c,v 1.89 2009/05/06 10:34:33 cegger Exp $ */
2
3 /*-
4 * Copyright (c) 2000, 2001, 2002, 2003, 2004 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Andrew Doran; and by Jason R. Thorpe of Wasabi Systems, Inc.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 /*-
33 * Copyright (c) 2000 Michael Smith
34 * Copyright (c) 2000 BSDi
35 * All rights reserved.
36 *
37 * Redistribution and use in source and binary forms, with or without
38 * modification, are permitted provided that the following conditions
39 * are met:
40 * 1. Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * 2. Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in the
44 * documentation and/or other materials provided with the distribution.
45 *
46 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
47 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
48 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
49 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
50 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
51 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
52 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
53 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
54 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
55 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
56 * SUCH DAMAGE.
57 *
58 * from FreeBSD: twe.c,v 1.1 2000/05/24 23:35:23 msmith Exp
59 */
60
61 /*
62 * Driver for the 3ware Escalade family of RAID controllers.
63 */
64
65 #include <sys/cdefs.h>
66 __KERNEL_RCSID(0, "$NetBSD: twe.c,v 1.89 2009/05/06 10:34:33 cegger Exp $");
67
68 #include <sys/param.h>
69 #include <sys/systm.h>
70 #include <sys/kernel.h>
71 #include <sys/device.h>
72 #include <sys/queue.h>
73 #include <sys/proc.h>
74 #include <sys/buf.h>
75 #include <sys/endian.h>
76 #include <sys/malloc.h>
77 #include <sys/conf.h>
78 #include <sys/disk.h>
79 #include <sys/sysctl.h>
80 #include <sys/syslog.h>
81 #include <sys/kauth.h>
82
83 #include <uvm/uvm_extern.h>
84
85 #include <sys/bswap.h>
86 #include <sys/bus.h>
87
88 #include <dev/pci/pcireg.h>
89 #include <dev/pci/pcivar.h>
90 #include <dev/pci/pcidevs.h>
91 #include <dev/pci/twereg.h>
92 #include <dev/pci/twevar.h>
93 #include <dev/pci/tweio.h>
94
95 #include "locators.h"
96
97 #define PCI_CBIO 0x10
98
99 static int twe_aen_get(struct twe_softc *, uint16_t *);
100 static void twe_aen_handler(struct twe_ccb *, int);
101 static void twe_aen_enqueue(struct twe_softc *sc, uint16_t, int);
102 static uint16_t twe_aen_dequeue(struct twe_softc *);
103
104 static void twe_attach(device_t, device_t, void *);
105 static int twe_init_connection(struct twe_softc *);
106 static int twe_intr(void *);
107 static int twe_match(device_t, cfdata_t, void *);
108 static int twe_param_set(struct twe_softc *, int, int, size_t, void *);
109 static void twe_poll(struct twe_softc *);
110 static int twe_print(void *, const char *);
111 static int twe_reset(struct twe_softc *);
112 static int twe_status_check(struct twe_softc *, u_int);
113 static int twe_status_wait(struct twe_softc *, u_int, int);
114 static void twe_describe_controller(struct twe_softc *);
115 static void twe_clear_pci_abort(struct twe_softc *sc);
116 static void twe_clear_pci_parity_error(struct twe_softc *sc);
117
118 static int twe_add_unit(struct twe_softc *, int);
119 static int twe_del_unit(struct twe_softc *, int);
120 static int twe_init_connection(struct twe_softc *);
121
122 static inline u_int32_t twe_inl(struct twe_softc *, int);
123 static inline void twe_outl(struct twe_softc *, int, u_int32_t);
124
125 extern struct cfdriver twe_cd;
126
127 CFATTACH_DECL(twe, sizeof(struct twe_softc),
128 twe_match, twe_attach, NULL, NULL);
129
130 /* FreeBSD driver revision for sysctl expected by the 3ware cli */
131 const char twever[] = "1.50.01.002";
132
133 /*
134 * Tables to convert numeric codes to strings.
135 */
136 const struct twe_code_table twe_table_status[] = {
137 { 0x00, "successful completion" },
138
139 /* info */
140 { 0x42, "command in progress" },
141 { 0x6c, "retrying interface CRC error from UDMA command" },
142
143 /* warning */
144 { 0x81, "redundant/inconsequential request ignored" },
145 { 0x8e, "failed to write zeroes to LBA 0" },
146 { 0x8f, "failed to profile TwinStor zones" },
147
148 /* fatal */
149 { 0xc1, "aborted due to system command or reconfiguration" },
150 { 0xc4, "aborted" },
151 { 0xc5, "access error" },
152 { 0xc6, "access violation" },
153 { 0xc7, "device failure" }, /* high byte may be port # */
154 { 0xc8, "controller error" },
155 { 0xc9, "timed out" },
156 { 0xcb, "invalid unit number" },
157 { 0xcf, "unit not available" },
158 { 0xd2, "undefined opcode" },
159 { 0xdb, "request incompatible with unit" },
160 { 0xdc, "invalid request" },
161 { 0xff, "firmware error, reset requested" },
162
163 { 0, NULL }
164 };
165
166 const struct twe_code_table twe_table_unitstate[] = {
167 { TWE_PARAM_UNITSTATUS_Normal, "Normal" },
168 { TWE_PARAM_UNITSTATUS_Initialising, "Initializing" },
169 { TWE_PARAM_UNITSTATUS_Degraded, "Degraded" },
170 { TWE_PARAM_UNITSTATUS_Rebuilding, "Rebuilding" },
171 { TWE_PARAM_UNITSTATUS_Verifying, "Verifying" },
172 { TWE_PARAM_UNITSTATUS_Corrupt, "Corrupt" },
173 { TWE_PARAM_UNITSTATUS_Missing, "Missing" },
174
175 { 0, NULL }
176 };
177
178 const struct twe_code_table twe_table_unittype[] = {
179 /* array descriptor configuration */
180 { TWE_AD_CONFIG_RAID0, "RAID0" },
181 { TWE_AD_CONFIG_RAID1, "RAID1" },
182 { TWE_AD_CONFIG_TwinStor, "TwinStor" },
183 { TWE_AD_CONFIG_RAID5, "RAID5" },
184 { TWE_AD_CONFIG_RAID10, "RAID10" },
185 { TWE_UD_CONFIG_JBOD, "JBOD" },
186
187 { 0, NULL }
188 };
189
190 const struct twe_code_table twe_table_stripedepth[] = {
191 { TWE_AD_STRIPE_4k, "4K" },
192 { TWE_AD_STRIPE_8k, "8K" },
193 { TWE_AD_STRIPE_16k, "16K" },
194 { TWE_AD_STRIPE_32k, "32K" },
195 { TWE_AD_STRIPE_64k, "64K" },
196 { TWE_AD_STRIPE_128k, "128K" },
197 { TWE_AD_STRIPE_256k, "256K" },
198 { TWE_AD_STRIPE_512k, "512K" },
199 { TWE_AD_STRIPE_1024k, "1024K" },
200
201 { 0, NULL }
202 };
203
204 /*
205 * Asynchronous event notification messages are qualified:
206 * a - not unit/port specific
207 * u - unit specific
208 * p - port specific
209 *
210 * They are further qualified with a severity:
211 * E - LOG_EMERG
212 * a - LOG_ALERT
213 * c - LOG_CRIT
214 * e - LOG_ERR
215 * w - LOG_WARNING
216 * n - LOG_NOTICE
217 * i - LOG_INFO
218 * d - LOG_DEBUG
219 * blank - just use printf
220 */
221 const struct twe_code_table twe_table_aen[] = {
222 { 0x00, "a queue empty" },
223 { 0x01, "a soft reset" },
224 { 0x02, "uc degraded mode" },
225 { 0x03, "aa controller error" },
226 { 0x04, "uE rebuild fail" },
227 { 0x05, "un rebuild done" },
228 { 0x06, "ue incomplete unit" },
229 { 0x07, "un initialization done" },
230 { 0x08, "uw unclean shutdown detected" },
231 { 0x09, "pe drive timeout" },
232 { 0x0a, "pc drive error" },
233 { 0x0b, "un rebuild started" },
234 { 0x0c, "un initialization started" },
235 { 0x0d, "ui logical unit deleted" },
236 { 0x0f, "pc SMART threshold exceeded" },
237 { 0x15, "a table undefined" }, /* XXX: Not in FreeBSD's table */
238 { 0x21, "pe ATA UDMA downgrade" },
239 { 0x22, "pi ATA UDMA upgrade" },
240 { 0x23, "pw sector repair occurred" },
241 { 0x24, "aa SBUF integrity check failure" },
242 { 0x25, "pa lost cached write" },
243 { 0x26, "pa drive ECC error detected" },
244 { 0x27, "pe DCB checksum error" },
245 { 0x28, "pn DCB unsupported version" },
246 { 0x29, "ui verify started" },
247 { 0x2a, "ua verify failed" },
248 { 0x2b, "ui verify complete" },
249 { 0x2c, "pw overwrote bad sector during rebuild" },
250 { 0x2d, "pa encountered bad sector during rebuild" },
251 { 0x2e, "pe replacement drive too small" },
252 { 0x2f, "ue array not previously initialized" },
253 { 0x30, "p drive not supported" },
254 { 0xff, "a aen queue full" },
255
256 { 0, NULL },
257 };
258
259 const char *
260 twe_describe_code(const struct twe_code_table *table, uint32_t code)
261 {
262
263 for (; table->string != NULL; table++) {
264 if (table->code == code)
265 return (table->string);
266 }
267 return (NULL);
268 }
269
270 static inline u_int32_t
271 twe_inl(struct twe_softc *sc, int off)
272 {
273
274 bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4,
275 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ);
276 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, off));
277 }
278
279 static inline void
280 twe_outl(struct twe_softc *sc, int off, u_int32_t val)
281 {
282
283 bus_space_write_4(sc->sc_iot, sc->sc_ioh, off, val);
284 bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4,
285 BUS_SPACE_BARRIER_WRITE);
286 }
287
288 /*
289 * Match a supported board.
290 */
291 static int
292 twe_match(device_t parent, cfdata_t cfdata, void *aux)
293 {
294 struct pci_attach_args *pa;
295
296 pa = aux;
297
298 return (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_3WARE &&
299 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE ||
300 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE_ASIC));
301 }
302
303 /*
304 * Attach a supported board.
305 *
306 * XXX This doesn't fail gracefully.
307 */
308 static void
309 twe_attach(device_t parent, device_t self, void *aux)
310 {
311 struct pci_attach_args *pa;
312 struct twe_softc *sc;
313 pci_chipset_tag_t pc;
314 pci_intr_handle_t ih;
315 pcireg_t csr;
316 const char *intrstr;
317 int s, size, i, rv, rseg;
318 size_t max_segs, max_xfer;
319 bus_dma_segment_t seg;
320 struct ctlname ctlnames[] = CTL_NAMES;
321 const struct sysctlnode *node;
322 struct twe_cmd *tc;
323 struct twe_ccb *ccb;
324
325 sc = device_private(self);
326 pa = aux;
327 pc = pa->pa_pc;
328 sc->sc_dmat = pa->pa_dmat;
329 SIMPLEQ_INIT(&sc->sc_ccb_queue);
330 SLIST_INIT(&sc->sc_ccb_freelist);
331
332 aprint_naive(": RAID controller\n");
333 aprint_normal(": 3ware Escalade\n");
334
335
336 if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0,
337 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) {
338 aprint_error_dev(&sc->sc_dv, "can't map i/o space\n");
339 return;
340 }
341
342 /* Enable the device. */
343 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
344 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
345 csr | PCI_COMMAND_MASTER_ENABLE);
346
347 /* Map and establish the interrupt. */
348 if (pci_intr_map(pa, &ih)) {
349 aprint_error_dev(&sc->sc_dv, "can't map interrupt\n");
350 return;
351 }
352
353 intrstr = pci_intr_string(pc, ih);
354 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, twe_intr, sc);
355 if (sc->sc_ih == NULL) {
356 aprint_error_dev(&sc->sc_dv, "can't establish interrupt%s%s\n",
357 (intrstr) ? " at " : "",
358 (intrstr) ? intrstr : "");
359 return;
360 }
361
362 if (intrstr != NULL)
363 aprint_normal_dev(&sc->sc_dv, "interrupting at %s\n",
364 intrstr);
365
366 /*
367 * Allocate and initialise the command blocks and CCBs.
368 */
369 size = sizeof(struct twe_cmd) * TWE_MAX_QUEUECNT;
370
371 if ((rv = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &seg, 1,
372 &rseg, BUS_DMA_NOWAIT)) != 0) {
373 aprint_error_dev(&sc->sc_dv, "unable to allocate commands, rv = %d\n", rv);
374 return;
375 }
376
377 if ((rv = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size,
378 (void **)&sc->sc_cmds,
379 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) {
380 aprint_error_dev(&sc->sc_dv, "unable to map commands, rv = %d\n", rv);
381 return;
382 }
383
384 if ((rv = bus_dmamap_create(sc->sc_dmat, size, size, 1, 0,
385 BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) {
386 aprint_error_dev(&sc->sc_dv, "unable to create command DMA map, rv = %d\n", rv);
387 return;
388 }
389
390 if ((rv = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_cmds,
391 size, NULL, BUS_DMA_NOWAIT)) != 0) {
392 aprint_error_dev(&sc->sc_dv, "unable to load command DMA map, rv = %d\n", rv);
393 return;
394 }
395
396 ccb = malloc(sizeof(*ccb) * TWE_MAX_QUEUECNT, M_DEVBUF, M_NOWAIT);
397 if (ccb == NULL) {
398 aprint_error_dev(&sc->sc_dv, "unable to allocate memory for ccbs\n");
399 return;
400 }
401
402 sc->sc_cmds_paddr = sc->sc_dmamap->dm_segs[0].ds_addr;
403 memset(sc->sc_cmds, 0, size);
404
405 sc->sc_ccbs = ccb;
406 tc = (struct twe_cmd *)sc->sc_cmds;
407 max_segs = twe_get_maxsegs();
408 max_xfer = twe_get_maxxfer(max_segs);
409
410 for (i = 0; i < TWE_MAX_QUEUECNT; i++, tc++, ccb++) {
411 ccb->ccb_cmd = tc;
412 ccb->ccb_cmdid = i;
413 ccb->ccb_flags = 0;
414 rv = bus_dmamap_create(sc->sc_dmat, max_xfer,
415 max_segs, PAGE_SIZE, 0,
416 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW,
417 &ccb->ccb_dmamap_xfer);
418 if (rv != 0) {
419 aprint_error_dev(&sc->sc_dv, "can't create dmamap, rv = %d\n", rv);
420 return;
421 }
422
423 /* Save the first CCB for AEN retrieval. */
424 if (i != 0)
425 SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb,
426 ccb_chain.slist);
427 }
428
429 /* Wait for the controller to become ready. */
430 if (twe_status_wait(sc, TWE_STS_MICROCONTROLLER_READY, 6)) {
431 aprint_error_dev(&sc->sc_dv, "microcontroller not ready\n");
432 return;
433 }
434
435 twe_outl(sc, TWE_REG_CTL, TWE_CTL_DISABLE_INTRS);
436
437 /* Reset the controller. */
438 s = splbio();
439 rv = twe_reset(sc);
440 splx(s);
441 if (rv) {
442 aprint_error_dev(&sc->sc_dv, "reset failed\n");
443 return;
444 }
445
446 /* Initialise connection with controller. */
447 twe_init_connection(sc);
448
449 twe_describe_controller(sc);
450
451 /* Find and attach RAID array units. */
452 sc->sc_nunits = 0;
453 for (i = 0; i < TWE_MAX_UNITS; i++)
454 (void) twe_add_unit(sc, i);
455
456 /* ...and finally, enable interrupts. */
457 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR |
458 TWE_CTL_UNMASK_RESP_INTR |
459 TWE_CTL_ENABLE_INTRS);
460
461 /* sysctl set-up for 3ware cli */
462 if (sysctl_createv(NULL, 0, NULL, NULL,
463 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw",
464 NULL, NULL, 0, NULL, 0,
465 CTL_HW, CTL_EOL) != 0) {
466 aprint_error_dev(&sc->sc_dv, "could not create %s sysctl node\n",
467 ctlnames[CTL_HW].ctl_name);
468 return;
469 }
470 if (sysctl_createv(NULL, 0, NULL, &node,
471 0, CTLTYPE_NODE, device_xname(&sc->sc_dv),
472 SYSCTL_DESCR("twe driver information"),
473 NULL, 0, NULL, 0,
474 CTL_HW, CTL_CREATE, CTL_EOL) != 0) {
475 aprint_error_dev(&sc->sc_dv, "could not create %s.%s sysctl node\n",
476 ctlnames[CTL_HW].ctl_name, device_xname(&sc->sc_dv));
477 return;
478 }
479 if ((i = sysctl_createv(NULL, 0, NULL, NULL,
480 0, CTLTYPE_STRING, "driver_version",
481 SYSCTL_DESCR("twe0 driver version"),
482 NULL, 0, &twever, 0,
483 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL))
484 != 0) {
485 aprint_error_dev(&sc->sc_dv, "could not create %s.%s.driver_version sysctl\n",
486 ctlnames[CTL_HW].ctl_name, device_xname(&sc->sc_dv));
487 return;
488 }
489 }
490
491 void
492 twe_register_callbacks(struct twe_softc *sc, int unit,
493 const struct twe_callbacks *tcb)
494 {
495
496 sc->sc_units[unit].td_callbacks = tcb;
497 }
498
499 static void
500 twe_recompute_openings(struct twe_softc *sc)
501 {
502 struct twe_drive *td;
503 int unit, openings;
504
505 if (sc->sc_nunits != 0)
506 openings = (TWE_MAX_QUEUECNT - 1) / sc->sc_nunits;
507 else
508 openings = 0;
509 if (openings == sc->sc_openings)
510 return;
511 sc->sc_openings = openings;
512
513 #ifdef TWE_DEBUG
514 printf("%s: %d array%s, %d openings per array\n",
515 device_xname(&sc->sc_dv), sc->sc_nunits,
516 sc->sc_nunits == 1 ? "" : "s", sc->sc_openings);
517 #endif
518
519 for (unit = 0; unit < TWE_MAX_UNITS; unit++) {
520 td = &sc->sc_units[unit];
521 if (td->td_dev != NULL)
522 (*td->td_callbacks->tcb_openings)(td->td_dev,
523 sc->sc_openings);
524 }
525 }
526
527 static int
528 twe_add_unit(struct twe_softc *sc, int unit)
529 {
530 struct twe_param *dtp, *atp;
531 struct twe_array_descriptor *ad;
532 struct twe_drive *td;
533 struct twe_attach_args twea;
534 uint32_t newsize;
535 int rv;
536 uint16_t dsize;
537 uint8_t newtype, newstripe;
538 int locs[TWECF_NLOCS];
539
540 if (unit < 0 || unit >= TWE_MAX_UNITS)
541 return (EINVAL);
542
543 /* Find attached units. */
544 rv = twe_param_get(sc, TWE_PARAM_UNITSUMMARY,
545 TWE_PARAM_UNITSUMMARY_Status, TWE_MAX_UNITS, NULL, &dtp);
546 if (rv != 0) {
547 aprint_error_dev(&sc->sc_dv, "error %d fetching unit summary\n",
548 rv);
549 return (rv);
550 }
551
552 /* For each detected unit, collect size and store in an array. */
553 td = &sc->sc_units[unit];
554
555 /* Unit present? */
556 if ((dtp->tp_data[unit] & TWE_PARAM_UNITSTATUS_Online) == 0) {
557 /*
558 * XXX Should we check to see if a device has been
559 * XXX attached at this index and detach it if it
560 * XXX has? ("rescan" semantics)
561 */
562 rv = 0;
563 goto out;
564 }
565
566 rv = twe_param_get_2(sc, TWE_PARAM_UNITINFO + unit,
567 TWE_PARAM_UNITINFO_DescriptorSize, &dsize);
568 if (rv != 0) {
569 aprint_error_dev(&sc->sc_dv, "error %d fetching descriptor size "
570 "for unit %d\n", rv, unit);
571 goto out;
572 }
573
574 rv = twe_param_get(sc, TWE_PARAM_UNITINFO + unit,
575 TWE_PARAM_UNITINFO_Descriptor, dsize - 3, NULL, &atp);
576 if (rv != 0) {
577 aprint_error_dev(&sc->sc_dv, "error %d fetching array descriptor "
578 "for unit %d\n", rv, unit);
579 goto out;
580 }
581
582 ad = (struct twe_array_descriptor *)atp->tp_data;
583 newtype = ad->configuration;
584 newstripe = ad->stripe_size;
585 free(atp, M_DEVBUF);
586
587 rv = twe_param_get_4(sc, TWE_PARAM_UNITINFO + unit,
588 TWE_PARAM_UNITINFO_Capacity, &newsize);
589 if (rv != 0) {
590 aprint_error_dev(&sc->sc_dv,
591 "error %d fetching capacity for unit %d\n",
592 rv, unit);
593 goto out;
594 }
595
596 /*
597 * Have a device, so we need to attach it. If there is currently
598 * something sitting at the slot, and the parameters are different,
599 * then we detach the old device before attaching the new one.
600 */
601 if (td->td_dev != NULL &&
602 td->td_size == newsize &&
603 td->td_type == newtype &&
604 td->td_stripe == newstripe) {
605 /* Same as the old device; just keep using it. */
606 rv = 0;
607 goto out;
608 } else if (td->td_dev != NULL) {
609 /* Detach the old device first. */
610 (void) config_detach(td->td_dev, DETACH_FORCE);
611 td->td_dev = NULL;
612 } else if (td->td_size == 0)
613 sc->sc_nunits++;
614
615 /*
616 * Committed to the new array unit; assign its parameters and
617 * recompute the number of available command openings.
618 */
619 td->td_size = newsize;
620 td->td_type = newtype;
621 td->td_stripe = newstripe;
622 twe_recompute_openings(sc);
623
624 twea.twea_unit = unit;
625
626 locs[TWECF_UNIT] = unit;
627
628 td->td_dev = config_found_sm_loc(&sc->sc_dv, "twe", locs, &twea,
629 twe_print, config_stdsubmatch);
630
631 rv = 0;
632 out:
633 free(dtp, M_DEVBUF);
634 return (rv);
635 }
636
637 static int
638 twe_del_unit(struct twe_softc *sc, int unit)
639 {
640 struct twe_drive *td;
641
642 if (unit < 0 || unit >= TWE_MAX_UNITS)
643 return (EINVAL);
644
645 td = &sc->sc_units[unit];
646 if (td->td_size != 0)
647 sc->sc_nunits--;
648 td->td_size = 0;
649 td->td_type = 0;
650 td->td_stripe = 0;
651 if (td->td_dev != NULL) {
652 (void) config_detach(td->td_dev, DETACH_FORCE);
653 td->td_dev = NULL;
654 }
655 twe_recompute_openings(sc);
656 return (0);
657 }
658
659 /*
660 * Reset the controller.
661 * MUST BE CALLED AT splbio()!
662 */
663 static int
664 twe_reset(struct twe_softc *sc)
665 {
666 uint16_t aen;
667 u_int status;
668 volatile u_int32_t junk;
669 int got, rv;
670
671 /* Issue a soft reset. */
672 twe_outl(sc, TWE_REG_CTL, TWE_CTL_ISSUE_SOFT_RESET |
673 TWE_CTL_CLEAR_HOST_INTR |
674 TWE_CTL_CLEAR_ATTN_INTR |
675 TWE_CTL_MASK_CMD_INTR |
676 TWE_CTL_MASK_RESP_INTR |
677 TWE_CTL_CLEAR_ERROR_STS |
678 TWE_CTL_DISABLE_INTRS);
679
680 /* Wait for attention... */
681 if (twe_status_wait(sc, TWE_STS_ATTN_INTR, 30)) {
682 aprint_error_dev(&sc->sc_dv, "timeout waiting for attention interrupt\n");
683 return (-1);
684 }
685
686 /* ...and ACK it. */
687 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR);
688
689 /*
690 * Pull AENs out of the controller; look for a soft reset AEN.
691 * Open code this, since we want to detect reset even if the
692 * queue for management tools is full.
693 *
694 * Note that since:
695 * - interrupts are blocked
696 * - we have reset the controller
697 * - acknowledged the pending ATTENTION
698 * that there is no way a pending asynchronous AEN fetch would
699 * finish, so clear the flag.
700 */
701 sc->sc_flags &= ~TWEF_AEN;
702 for (got = 0;;) {
703 rv = twe_aen_get(sc, &aen);
704 if (rv != 0)
705 printf("%s: error %d while draining event queue\n",
706 device_xname(&sc->sc_dv), rv);
707 if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY)
708 break;
709 if (TWE_AEN_CODE(aen) == TWE_AEN_SOFT_RESET)
710 got = 1;
711 twe_aen_enqueue(sc, aen, 1);
712 }
713
714 if (!got) {
715 printf("%s: reset not reported\n", device_xname(&sc->sc_dv));
716 return (-1);
717 }
718
719 /* Check controller status. */
720 status = twe_inl(sc, TWE_REG_STS);
721 if (twe_status_check(sc, status)) {
722 printf("%s: controller errors detected\n",
723 device_xname(&sc->sc_dv));
724 return (-1);
725 }
726
727 /* Drain the response queue. */
728 for (;;) {
729 status = twe_inl(sc, TWE_REG_STS);
730 if (twe_status_check(sc, status) != 0) {
731 aprint_error_dev(&sc->sc_dv, "can't drain response queue\n");
732 return (-1);
733 }
734 if ((status & TWE_STS_RESP_QUEUE_EMPTY) != 0)
735 break;
736 junk = twe_inl(sc, TWE_REG_RESP_QUEUE);
737 }
738
739 return (0);
740 }
741
742 /*
743 * Print autoconfiguration message for a sub-device.
744 */
745 static int
746 twe_print(void *aux, const char *pnp)
747 {
748 struct twe_attach_args *twea;
749
750 twea = aux;
751
752 if (pnp != NULL)
753 aprint_normal("block device at %s", pnp);
754 aprint_normal(" unit %d", twea->twea_unit);
755 return (UNCONF);
756 }
757
758 /*
759 * Interrupt service routine.
760 */
761 static int
762 twe_intr(void *arg)
763 {
764 struct twe_softc *sc;
765 u_int status;
766 int caught, rv;
767
768 sc = arg;
769 caught = 0;
770 status = twe_inl(sc, TWE_REG_STS);
771 twe_status_check(sc, status);
772
773 /* Host interrupts - purpose unknown. */
774 if ((status & TWE_STS_HOST_INTR) != 0) {
775 #ifdef DEBUG
776 printf("%s: host interrupt\n", device_xname(&sc->sc_dv));
777 #endif
778 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_HOST_INTR);
779 caught = 1;
780 }
781
782 /*
783 * Attention interrupts, signalled when a controller or child device
784 * state change has occurred.
785 */
786 if ((status & TWE_STS_ATTN_INTR) != 0) {
787 rv = twe_aen_get(sc, NULL);
788 if (rv != 0)
789 aprint_error_dev(&sc->sc_dv, "unable to retrieve AEN (%d)\n", rv);
790 else
791 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR);
792 caught = 1;
793 }
794
795 /*
796 * Command interrupts, signalled when the controller can accept more
797 * commands. We don't use this; instead, we try to submit commands
798 * when we receive them, and when other commands have completed.
799 * Mask it so we don't get another one.
800 */
801 if ((status & TWE_STS_CMD_INTR) != 0) {
802 #ifdef DEBUG
803 printf("%s: command interrupt\n", device_xname(&sc->sc_dv));
804 #endif
805 twe_outl(sc, TWE_REG_CTL, TWE_CTL_MASK_CMD_INTR);
806 caught = 1;
807 }
808
809 if ((status & TWE_STS_RESP_INTR) != 0) {
810 twe_poll(sc);
811 caught = 1;
812 }
813
814 return (caught);
815 }
816
817 /*
818 * Fetch an AEN. Even though this is really like parameter
819 * retrieval, we handle this specially, because we issue this
820 * AEN retrieval command from interrupt context, and thus
821 * reserve a CCB for it to avoid resource shortage.
822 *
823 * XXX There are still potential resource shortages we could
824 * XXX encounter. Consider pre-allocating all AEN-related
825 * XXX resources.
826 *
827 * MUST BE CALLED AT splbio()!
828 */
829 static int
830 twe_aen_get(struct twe_softc *sc, uint16_t *aenp)
831 {
832 struct twe_ccb *ccb;
833 struct twe_cmd *tc;
834 struct twe_param *tp;
835 int rv;
836
837 /*
838 * If we're already retrieving an AEN, just wait; another
839 * retrieval will be chained after the current one completes.
840 */
841 if (sc->sc_flags & TWEF_AEN) {
842 /*
843 * It is a fatal software programming error to attempt
844 * to fetch an AEN synchronously when an AEN fetch is
845 * already pending.
846 */
847 KASSERT(aenp == NULL);
848 return (0);
849 }
850
851 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT);
852 if (tp == NULL)
853 return (ENOMEM);
854
855 ccb = twe_ccb_alloc(sc,
856 TWE_CCB_AEN | TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT);
857 KASSERT(ccb != NULL);
858
859 ccb->ccb_data = tp;
860 ccb->ccb_datasize = TWE_SECTOR_SIZE;
861 ccb->ccb_tx.tx_handler = (aenp == NULL) ? twe_aen_handler : NULL;
862 ccb->ccb_tx.tx_context = tp;
863 ccb->ccb_tx.tx_dv = &sc->sc_dv;
864
865 tc = ccb->ccb_cmd;
866 tc->tc_size = 2;
867 tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5);
868 tc->tc_unit = 0;
869 tc->tc_count = htole16(1);
870
871 /* Fill in the outbound parameter data. */
872 tp->tp_table_id = htole16(TWE_PARAM_AEN);
873 tp->tp_param_id = TWE_PARAM_AEN_UnitCode;
874 tp->tp_param_size = 2;
875
876 /* Map the transfer. */
877 if ((rv = twe_ccb_map(sc, ccb)) != 0) {
878 twe_ccb_free(sc, ccb);
879 goto done;
880 }
881
882 /* Enqueue the command and wait. */
883 if (aenp != NULL) {
884 rv = twe_ccb_poll(sc, ccb, 5);
885 twe_ccb_unmap(sc, ccb);
886 twe_ccb_free(sc, ccb);
887 if (rv == 0)
888 *aenp = le16toh(*(uint16_t *)tp->tp_data);
889 free(tp, M_DEVBUF);
890 } else {
891 sc->sc_flags |= TWEF_AEN;
892 twe_ccb_enqueue(sc, ccb);
893 rv = 0;
894 }
895
896 done:
897 return (rv);
898 }
899
900 /*
901 * Handle an AEN returned by the controller.
902 * MUST BE CALLED AT splbio()!
903 */
904 static void
905 twe_aen_handler(struct twe_ccb *ccb, int error)
906 {
907 struct twe_softc *sc;
908 struct twe_param *tp;
909 uint16_t aen;
910 int rv;
911
912 sc = device_private(ccb->ccb_tx.tx_dv);
913 tp = ccb->ccb_tx.tx_context;
914 twe_ccb_unmap(sc, ccb);
915
916 sc->sc_flags &= ~TWEF_AEN;
917
918 if (error) {
919 aprint_error_dev(&sc->sc_dv, "error retrieving AEN\n");
920 aen = TWE_AEN_QUEUE_EMPTY;
921 } else
922 aen = le16toh(*(u_int16_t *)tp->tp_data);
923 free(tp, M_DEVBUF);
924 twe_ccb_free(sc, ccb);
925
926 if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY) {
927 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR);
928 return;
929 }
930
931 twe_aen_enqueue(sc, aen, 0);
932
933 /*
934 * Chain another retrieval in case interrupts have been
935 * coalesced.
936 */
937 rv = twe_aen_get(sc, NULL);
938 if (rv != 0)
939 aprint_error_dev(&sc->sc_dv, "unable to retrieve AEN (%d)\n", rv);
940 }
941
942 static void
943 twe_aen_enqueue(struct twe_softc *sc, uint16_t aen, int quiet)
944 {
945 const char *str, *msg;
946 int s, next, nextnext, level;
947
948 /*
949 * First report the AEN on the console. Maybe.
950 */
951 if (! quiet) {
952 str = twe_describe_code(twe_table_aen, TWE_AEN_CODE(aen));
953 if (str == NULL) {
954 aprint_error_dev(&sc->sc_dv, "unknown AEN 0x%04x\n", aen);
955 } else {
956 msg = str + 3;
957 switch (str[1]) {
958 case 'E': level = LOG_EMERG; break;
959 case 'a': level = LOG_ALERT; break;
960 case 'c': level = LOG_CRIT; break;
961 case 'e': level = LOG_ERR; break;
962 case 'w': level = LOG_WARNING; break;
963 case 'n': level = LOG_NOTICE; break;
964 case 'i': level = LOG_INFO; break;
965 case 'd': level = LOG_DEBUG; break;
966 default:
967 /* Don't use syslog. */
968 level = -1;
969 }
970
971 if (level < 0) {
972 switch (str[0]) {
973 case 'u':
974 case 'p':
975 printf("%s: %s %d: %s\n",
976 device_xname(&sc->sc_dv),
977 str[0] == 'u' ? "unit" : "port",
978 TWE_AEN_UNIT(aen), msg);
979 break;
980
981 default:
982 printf("%s: %s\n",
983 device_xname(&sc->sc_dv), msg);
984 }
985 } else {
986 switch (str[0]) {
987 case 'u':
988 case 'p':
989 log(level, "%s: %s %d: %s\n",
990 device_xname(&sc->sc_dv),
991 str[0] == 'u' ? "unit" : "port",
992 TWE_AEN_UNIT(aen), msg);
993 break;
994
995 default:
996 log(level, "%s: %s\n",
997 device_xname(&sc->sc_dv), msg);
998 }
999 }
1000 }
1001 }
1002
1003 /* Now enqueue the AEN for mangement tools. */
1004 s = splbio();
1005
1006 next = (sc->sc_aen_head + 1) % TWE_AEN_Q_LENGTH;
1007 nextnext = (sc->sc_aen_head + 2) % TWE_AEN_Q_LENGTH;
1008
1009 /*
1010 * If this is the last free slot, then queue up a "queue
1011 * full" message.
1012 */
1013 if (nextnext == sc->sc_aen_tail)
1014 aen = TWE_AEN_QUEUE_FULL;
1015
1016 if (next != sc->sc_aen_tail) {
1017 sc->sc_aen_queue[sc->sc_aen_head] = aen;
1018 sc->sc_aen_head = next;
1019 }
1020
1021 if (sc->sc_flags & TWEF_AENQ_WAIT) {
1022 sc->sc_flags &= ~TWEF_AENQ_WAIT;
1023 wakeup(&sc->sc_aen_queue);
1024 }
1025
1026 splx(s);
1027 }
1028
1029 /* NOTE: Must be called at splbio(). */
1030 static uint16_t
1031 twe_aen_dequeue(struct twe_softc *sc)
1032 {
1033 uint16_t aen;
1034
1035 if (sc->sc_aen_tail == sc->sc_aen_head)
1036 aen = TWE_AEN_QUEUE_EMPTY;
1037 else {
1038 aen = sc->sc_aen_queue[sc->sc_aen_tail];
1039 sc->sc_aen_tail = (sc->sc_aen_tail + 1) % TWE_AEN_Q_LENGTH;
1040 }
1041
1042 return (aen);
1043 }
1044
1045 /*
1046 * These are short-hand functions that execute TWE_OP_GET_PARAM to
1047 * fetch 1, 2, and 4 byte parameter values, respectively.
1048 */
1049 int
1050 twe_param_get_1(struct twe_softc *sc, int table_id, int param_id,
1051 uint8_t *valp)
1052 {
1053 struct twe_param *tp;
1054 int rv;
1055
1056 rv = twe_param_get(sc, table_id, param_id, 1, NULL, &tp);
1057 if (rv != 0)
1058 return (rv);
1059 *valp = *(uint8_t *)tp->tp_data;
1060 free(tp, M_DEVBUF);
1061 return (0);
1062 }
1063
1064 int
1065 twe_param_get_2(struct twe_softc *sc, int table_id, int param_id,
1066 uint16_t *valp)
1067 {
1068 struct twe_param *tp;
1069 int rv;
1070
1071 rv = twe_param_get(sc, table_id, param_id, 2, NULL, &tp);
1072 if (rv != 0)
1073 return (rv);
1074 *valp = le16toh(*(uint16_t *)tp->tp_data);
1075 free(tp, M_DEVBUF);
1076 return (0);
1077 }
1078
1079 int
1080 twe_param_get_4(struct twe_softc *sc, int table_id, int param_id,
1081 uint32_t *valp)
1082 {
1083 struct twe_param *tp;
1084 int rv;
1085
1086 rv = twe_param_get(sc, table_id, param_id, 4, NULL, &tp);
1087 if (rv != 0)
1088 return (rv);
1089 *valp = le32toh(*(uint32_t *)tp->tp_data);
1090 free(tp, M_DEVBUF);
1091 return (0);
1092 }
1093
1094 /*
1095 * Execute a TWE_OP_GET_PARAM command. If a callback function is provided,
1096 * it will be called with generated context when the command has completed.
1097 * If no callback is provided, the command will be executed synchronously
1098 * and a pointer to a buffer containing the data returned.
1099 *
1100 * The caller or callback is responsible for freeing the buffer.
1101 *
1102 * NOTE: We assume we can sleep here to wait for a CCB to become available.
1103 */
1104 int
1105 twe_param_get(struct twe_softc *sc, int table_id, int param_id, size_t size,
1106 void (*func)(struct twe_ccb *, int), struct twe_param **pbuf)
1107 {
1108 struct twe_ccb *ccb;
1109 struct twe_cmd *tc;
1110 struct twe_param *tp;
1111 int rv, s;
1112
1113 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT);
1114 if (tp == NULL)
1115 return ENOMEM;
1116
1117 ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT);
1118 KASSERT(ccb != NULL);
1119
1120 ccb->ccb_data = tp;
1121 ccb->ccb_datasize = TWE_SECTOR_SIZE;
1122 ccb->ccb_tx.tx_handler = func;
1123 ccb->ccb_tx.tx_context = tp;
1124 ccb->ccb_tx.tx_dv = &sc->sc_dv;
1125
1126 tc = ccb->ccb_cmd;
1127 tc->tc_size = 2;
1128 tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5);
1129 tc->tc_unit = 0;
1130 tc->tc_count = htole16(1);
1131
1132 /* Fill in the outbound parameter data. */
1133 tp->tp_table_id = htole16(table_id);
1134 tp->tp_param_id = param_id;
1135 tp->tp_param_size = size;
1136
1137 /* Map the transfer. */
1138 if ((rv = twe_ccb_map(sc, ccb)) != 0) {
1139 twe_ccb_free(sc, ccb);
1140 goto done;
1141 }
1142
1143 /* Submit the command and either wait or let the callback handle it. */
1144 if (func == NULL) {
1145 s = splbio();
1146 rv = twe_ccb_poll(sc, ccb, 5);
1147 twe_ccb_unmap(sc, ccb);
1148 twe_ccb_free(sc, ccb);
1149 splx(s);
1150 } else {
1151 #ifdef DEBUG
1152 if (pbuf != NULL)
1153 panic("both func and pbuf defined");
1154 #endif
1155 twe_ccb_enqueue(sc, ccb);
1156 return 0;
1157 }
1158
1159 done:
1160 if (pbuf == NULL || rv != 0)
1161 free(tp, M_DEVBUF);
1162 else if (pbuf != NULL && rv == 0)
1163 *pbuf = tp;
1164 return rv;
1165 }
1166
1167 /*
1168 * Execute a TWE_OP_SET_PARAM command.
1169 *
1170 * NOTE: We assume we can sleep here to wait for a CCB to become available.
1171 */
1172 static int
1173 twe_param_set(struct twe_softc *sc, int table_id, int param_id, size_t size,
1174 void *sbuf)
1175 {
1176 struct twe_ccb *ccb;
1177 struct twe_cmd *tc;
1178 struct twe_param *tp;
1179 int rv, s;
1180
1181 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT);
1182 if (tp == NULL)
1183 return ENOMEM;
1184
1185 ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT);
1186 KASSERT(ccb != NULL);
1187
1188 ccb->ccb_data = tp;
1189 ccb->ccb_datasize = TWE_SECTOR_SIZE;
1190 ccb->ccb_tx.tx_handler = 0;
1191 ccb->ccb_tx.tx_context = tp;
1192 ccb->ccb_tx.tx_dv = &sc->sc_dv;
1193
1194 tc = ccb->ccb_cmd;
1195 tc->tc_size = 2;
1196 tc->tc_opcode = TWE_OP_SET_PARAM | (tc->tc_size << 5);
1197 tc->tc_unit = 0;
1198 tc->tc_count = htole16(1);
1199
1200 /* Fill in the outbound parameter data. */
1201 tp->tp_table_id = htole16(table_id);
1202 tp->tp_param_id = param_id;
1203 tp->tp_param_size = size;
1204 memcpy(tp->tp_data, sbuf, size);
1205
1206 /* Map the transfer. */
1207 if ((rv = twe_ccb_map(sc, ccb)) != 0) {
1208 twe_ccb_free(sc, ccb);
1209 goto done;
1210 }
1211
1212 /* Submit the command and wait. */
1213 s = splbio();
1214 rv = twe_ccb_poll(sc, ccb, 5);
1215 twe_ccb_unmap(sc, ccb);
1216 twe_ccb_free(sc, ccb);
1217 splx(s);
1218 done:
1219 free(tp, M_DEVBUF);
1220 return (rv);
1221 }
1222
1223 /*
1224 * Execute a TWE_OP_INIT_CONNECTION command. Return non-zero on error.
1225 * Must be called with interrupts blocked.
1226 */
1227 static int
1228 twe_init_connection(struct twe_softc *sc)
1229 {
1230 struct twe_ccb *ccb;
1231 struct twe_cmd *tc;
1232 int rv;
1233
1234 if ((ccb = twe_ccb_alloc(sc, 0)) == NULL)
1235 return (EAGAIN);
1236
1237 /* Build the command. */
1238 tc = ccb->ccb_cmd;
1239 tc->tc_size = 3;
1240 tc->tc_opcode = TWE_OP_INIT_CONNECTION;
1241 tc->tc_unit = 0;
1242 tc->tc_count = htole16(TWE_MAX_CMDS);
1243 tc->tc_args.init_connection.response_queue_pointer = 0;
1244
1245 /* Submit the command for immediate execution. */
1246 rv = twe_ccb_poll(sc, ccb, 5);
1247 twe_ccb_free(sc, ccb);
1248 return (rv);
1249 }
1250
1251 /*
1252 * Poll the controller for completed commands. Must be called with
1253 * interrupts blocked.
1254 */
1255 static void
1256 twe_poll(struct twe_softc *sc)
1257 {
1258 struct twe_ccb *ccb;
1259 int found;
1260 u_int status, cmdid;
1261
1262 found = 0;
1263
1264 for (;;) {
1265 status = twe_inl(sc, TWE_REG_STS);
1266 twe_status_check(sc, status);
1267
1268 if ((status & TWE_STS_RESP_QUEUE_EMPTY))
1269 break;
1270
1271 found = 1;
1272 cmdid = twe_inl(sc, TWE_REG_RESP_QUEUE);
1273 cmdid = (cmdid & TWE_RESP_MASK) >> TWE_RESP_SHIFT;
1274 if (cmdid >= TWE_MAX_QUEUECNT) {
1275 aprint_error_dev(&sc->sc_dv, "bad cmdid %d\n", cmdid);
1276 continue;
1277 }
1278
1279 ccb = sc->sc_ccbs + cmdid;
1280 if ((ccb->ccb_flags & TWE_CCB_ACTIVE) == 0) {
1281 printf("%s: CCB for cmdid %d not active\n",
1282 device_xname(&sc->sc_dv), cmdid);
1283 continue;
1284 }
1285 ccb->ccb_flags ^= TWE_CCB_COMPLETE | TWE_CCB_ACTIVE;
1286
1287 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap,
1288 (char *)ccb->ccb_cmd - (char *)sc->sc_cmds,
1289 sizeof(struct twe_cmd),
1290 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1291
1292 /* Pass notification to upper layers. */
1293 if (ccb->ccb_tx.tx_handler != NULL)
1294 (*ccb->ccb_tx.tx_handler)(ccb,
1295 ccb->ccb_cmd->tc_status != 0 ? EIO : 0);
1296 }
1297
1298 /* If any commands have completed, run the software queue. */
1299 if (found)
1300 twe_ccb_enqueue(sc, NULL);
1301 }
1302
1303 /*
1304 * Wait for `status' to be set in the controller status register. Return
1305 * zero if found, non-zero if the operation timed out.
1306 */
1307 static int
1308 twe_status_wait(struct twe_softc *sc, u_int32_t status, int timo)
1309 {
1310
1311 for (timo *= 10; timo != 0; timo--) {
1312 if ((twe_inl(sc, TWE_REG_STS) & status) == status)
1313 break;
1314 delay(100000);
1315 }
1316
1317 return (timo == 0);
1318 }
1319
1320 /*
1321 * Clear a PCI parity error.
1322 */
1323 static void
1324 twe_clear_pci_parity_error(struct twe_softc *sc)
1325 {
1326 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 0x0, TWE_CTL_CLEAR_PARITY_ERROR);
1327
1328 //FreeBSD: pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PARITY_ERROR, 2);
1329 }
1330
1331
1332 /*
1333 * Clear a PCI abort.
1334 */
1335 static void
1336 twe_clear_pci_abort(struct twe_softc *sc)
1337 {
1338 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 0x0, TWE_CTL_CLEAR_PCI_ABORT);
1339
1340 //FreeBSD: pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PCI_ABORT, 2);
1341 }
1342
1343 /*
1344 * Complain if the status bits aren't what we expect.
1345 */
1346 static int
1347 twe_status_check(struct twe_softc *sc, u_int status)
1348 {
1349 int rv;
1350
1351 rv = 0;
1352
1353 if ((status & TWE_STS_EXPECTED_BITS) != TWE_STS_EXPECTED_BITS) {
1354 aprint_error_dev(&sc->sc_dv, "missing status bits: 0x%08x\n",
1355 status & ~TWE_STS_EXPECTED_BITS);
1356 rv = -1;
1357 }
1358
1359 if ((status & TWE_STS_UNEXPECTED_BITS) != 0) {
1360 aprint_error_dev(&sc->sc_dv, "unexpected status bits: 0x%08x\n",
1361 status & TWE_STS_UNEXPECTED_BITS);
1362 rv = -1;
1363 if (status & TWE_STS_PCI_PARITY_ERROR) {
1364 aprint_error_dev(&sc->sc_dv, "PCI parity error: Reseat card, move card "
1365 "or buggy device present.\n");
1366 twe_clear_pci_parity_error(sc);
1367 }
1368 if (status & TWE_STS_PCI_ABORT) {
1369 aprint_error_dev(&sc->sc_dv, "PCI abort, clearing.\n");
1370 twe_clear_pci_abort(sc);
1371 }
1372 }
1373
1374 return (rv);
1375 }
1376
1377 /*
1378 * Allocate and initialise a CCB.
1379 */
1380 static inline void
1381 twe_ccb_init(struct twe_softc *sc, struct twe_ccb *ccb, int flags)
1382 {
1383 struct twe_cmd *tc;
1384
1385 ccb->ccb_tx.tx_handler = NULL;
1386 ccb->ccb_flags = flags;
1387 tc = ccb->ccb_cmd;
1388 tc->tc_status = 0;
1389 tc->tc_flags = 0;
1390 tc->tc_cmdid = ccb->ccb_cmdid;
1391 }
1392
1393 struct twe_ccb *
1394 twe_ccb_alloc(struct twe_softc *sc, int flags)
1395 {
1396 struct twe_ccb *ccb;
1397 int s;
1398
1399 s = splbio();
1400 if (__predict_false((flags & TWE_CCB_AEN) != 0)) {
1401 /* Use the reserved CCB. */
1402 ccb = sc->sc_ccbs;
1403 } else {
1404 /* Allocate a CCB and command block. */
1405 if (__predict_false((ccb =
1406 SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) {
1407 splx(s);
1408 return (NULL);
1409 }
1410 SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist);
1411 }
1412 #ifdef DIAGNOSTIC
1413 if ((long)(ccb - sc->sc_ccbs) == 0 && (flags & TWE_CCB_AEN) == 0)
1414 panic("twe_ccb_alloc: got reserved CCB for non-AEN");
1415 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0)
1416 panic("twe_ccb_alloc: CCB %ld already allocated",
1417 (long)(ccb - sc->sc_ccbs));
1418 flags |= TWE_CCB_ALLOCED;
1419 #endif
1420 splx(s);
1421
1422 twe_ccb_init(sc, ccb, flags);
1423 return (ccb);
1424 }
1425
1426 struct twe_ccb *
1427 twe_ccb_alloc_wait(struct twe_softc *sc, int flags)
1428 {
1429 struct twe_ccb *ccb;
1430 int s;
1431
1432 KASSERT((flags & TWE_CCB_AEN) == 0);
1433
1434 s = splbio();
1435 while (__predict_false((ccb =
1436 SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) {
1437 sc->sc_flags |= TWEF_WAIT_CCB;
1438 (void) tsleep(&sc->sc_ccb_freelist, PRIBIO, "tweccb", 0);
1439 }
1440 SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist);
1441 #ifdef DIAGNOSTIC
1442 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0)
1443 panic("twe_ccb_alloc_wait: CCB %ld already allocated",
1444 (long)(ccb - sc->sc_ccbs));
1445 flags |= TWE_CCB_ALLOCED;
1446 #endif
1447 splx(s);
1448
1449 twe_ccb_init(sc, ccb, flags);
1450 return (ccb);
1451 }
1452
1453 /*
1454 * Free a CCB.
1455 */
1456 void
1457 twe_ccb_free(struct twe_softc *sc, struct twe_ccb *ccb)
1458 {
1459 int s;
1460
1461 s = splbio();
1462 if ((ccb->ccb_flags & TWE_CCB_AEN) == 0) {
1463 SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb, ccb_chain.slist);
1464 if (__predict_false((sc->sc_flags & TWEF_WAIT_CCB) != 0)) {
1465 sc->sc_flags &= ~TWEF_WAIT_CCB;
1466 wakeup(&sc->sc_ccb_freelist);
1467 }
1468 }
1469 ccb->ccb_flags = 0;
1470 splx(s);
1471 }
1472
1473 /*
1474 * Map the specified CCB's command block and data buffer (if any) into
1475 * controller visible space. Perform DMA synchronisation.
1476 */
1477 int
1478 twe_ccb_map(struct twe_softc *sc, struct twe_ccb *ccb)
1479 {
1480 struct twe_cmd *tc;
1481 int flags, nsegs, i, s, rv;
1482 void *data;
1483
1484 /*
1485 * The data as a whole must be 512-byte aligned.
1486 */
1487 if (((u_long)ccb->ccb_data & (TWE_ALIGNMENT - 1)) != 0) {
1488 s = splvm();
1489 /* XXX */
1490 ccb->ccb_abuf = uvm_km_alloc(kmem_map,
1491 ccb->ccb_datasize, 0, UVM_KMF_NOWAIT|UVM_KMF_WIRED);
1492 splx(s);
1493 data = (void *)ccb->ccb_abuf;
1494 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0)
1495 memcpy(data, ccb->ccb_data, ccb->ccb_datasize);
1496 } else {
1497 ccb->ccb_abuf = (vaddr_t)0;
1498 data = ccb->ccb_data;
1499 }
1500
1501 /*
1502 * Map the data buffer into bus space and build the S/G list.
1503 */
1504 rv = bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap_xfer, data,
1505 ccb->ccb_datasize, NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING |
1506 ((ccb->ccb_flags & TWE_CCB_DATA_IN) ?
1507 BUS_DMA_READ : BUS_DMA_WRITE));
1508 if (rv != 0) {
1509 if (ccb->ccb_abuf != (vaddr_t)0) {
1510 s = splvm();
1511 /* XXX */
1512 uvm_km_free(kmem_map, ccb->ccb_abuf,
1513 ccb->ccb_datasize, UVM_KMF_WIRED);
1514 splx(s);
1515 }
1516 return (rv);
1517 }
1518
1519 nsegs = ccb->ccb_dmamap_xfer->dm_nsegs;
1520 tc = ccb->ccb_cmd;
1521 tc->tc_size += 2 * nsegs;
1522
1523 /* The location of the S/G list is dependant upon command type. */
1524 switch (tc->tc_opcode >> 5) {
1525 case 2:
1526 for (i = 0; i < nsegs; i++) {
1527 tc->tc_args.param.sgl[i].tsg_address =
1528 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr);
1529 tc->tc_args.param.sgl[i].tsg_length =
1530 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len);
1531 }
1532 /* XXX Needed? */
1533 for (; i < TWE_SG_SIZE; i++) {
1534 tc->tc_args.param.sgl[i].tsg_address = 0;
1535 tc->tc_args.param.sgl[i].tsg_length = 0;
1536 }
1537 break;
1538 case 3:
1539 for (i = 0; i < nsegs; i++) {
1540 tc->tc_args.io.sgl[i].tsg_address =
1541 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr);
1542 tc->tc_args.io.sgl[i].tsg_length =
1543 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len);
1544 }
1545 /* XXX Needed? */
1546 for (; i < TWE_SG_SIZE; i++) {
1547 tc->tc_args.io.sgl[i].tsg_address = 0;
1548 tc->tc_args.io.sgl[i].tsg_length = 0;
1549 }
1550 break;
1551 default:
1552 /*
1553 * In all likelihood, this is a command passed from
1554 * management tools in userspace where no S/G list is
1555 * necessary because no data is being passed.
1556 */
1557 break;
1558 }
1559
1560 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0)
1561 flags = BUS_DMASYNC_PREREAD;
1562 else
1563 flags = 0;
1564 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0)
1565 flags |= BUS_DMASYNC_PREWRITE;
1566
1567 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0,
1568 ccb->ccb_datasize, flags);
1569 return (0);
1570 }
1571
1572 /*
1573 * Unmap the specified CCB's command block and data buffer (if any) and
1574 * perform DMA synchronisation.
1575 */
1576 void
1577 twe_ccb_unmap(struct twe_softc *sc, struct twe_ccb *ccb)
1578 {
1579 int flags, s;
1580
1581 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0)
1582 flags = BUS_DMASYNC_POSTREAD;
1583 else
1584 flags = 0;
1585 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0)
1586 flags |= BUS_DMASYNC_POSTWRITE;
1587
1588 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0,
1589 ccb->ccb_datasize, flags);
1590 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap_xfer);
1591
1592 if (ccb->ccb_abuf != (vaddr_t)0) {
1593 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0)
1594 memcpy(ccb->ccb_data, (void *)ccb->ccb_abuf,
1595 ccb->ccb_datasize);
1596 s = splvm();
1597 /* XXX */
1598 uvm_km_free(kmem_map, ccb->ccb_abuf, ccb->ccb_datasize,
1599 UVM_KMF_WIRED);
1600 splx(s);
1601 }
1602 }
1603
1604 /*
1605 * Submit a command to the controller and poll on completion. Return
1606 * non-zero on timeout (but don't check status, as some command types don't
1607 * return status). Must be called with interrupts blocked.
1608 */
1609 int
1610 twe_ccb_poll(struct twe_softc *sc, struct twe_ccb *ccb, int timo)
1611 {
1612 int rv;
1613
1614 if ((rv = twe_ccb_submit(sc, ccb)) != 0)
1615 return (rv);
1616
1617 for (timo *= 1000; timo != 0; timo--) {
1618 twe_poll(sc);
1619 if ((ccb->ccb_flags & TWE_CCB_COMPLETE) != 0)
1620 break;
1621 DELAY(100);
1622 }
1623
1624 return (timo == 0);
1625 }
1626
1627 /*
1628 * If a CCB is specified, enqueue it. Pull CCBs off the software queue in
1629 * the order that they were enqueued and try to submit their command blocks
1630 * to the controller for execution.
1631 */
1632 void
1633 twe_ccb_enqueue(struct twe_softc *sc, struct twe_ccb *ccb)
1634 {
1635 int s;
1636
1637 s = splbio();
1638
1639 if (ccb != NULL)
1640 SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_queue, ccb, ccb_chain.simpleq);
1641
1642 while ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_queue)) != NULL) {
1643 if (twe_ccb_submit(sc, ccb))
1644 break;
1645 SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_queue, ccb_chain.simpleq);
1646 }
1647
1648 splx(s);
1649 }
1650
1651 /*
1652 * Submit the command block associated with the specified CCB to the
1653 * controller for execution. Must be called with interrupts blocked.
1654 */
1655 int
1656 twe_ccb_submit(struct twe_softc *sc, struct twe_ccb *ccb)
1657 {
1658 bus_addr_t pa;
1659 int rv;
1660 u_int status;
1661
1662 /* Check to see if we can post a command. */
1663 status = twe_inl(sc, TWE_REG_STS);
1664 twe_status_check(sc, status);
1665
1666 if ((status & TWE_STS_CMD_QUEUE_FULL) == 0) {
1667 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap,
1668 (char *)ccb->ccb_cmd - (char *)sc->sc_cmds,
1669 sizeof(struct twe_cmd),
1670 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1671 #ifdef DIAGNOSTIC
1672 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) == 0)
1673 panic("%s: CCB %ld not ALLOCED\n",
1674 device_xname(&sc->sc_dv), (long)(ccb - sc->sc_ccbs));
1675 #endif
1676 ccb->ccb_flags |= TWE_CCB_ACTIVE;
1677 pa = sc->sc_cmds_paddr +
1678 ccb->ccb_cmdid * sizeof(struct twe_cmd);
1679 twe_outl(sc, TWE_REG_CMD_QUEUE, (u_int32_t)pa);
1680 rv = 0;
1681 } else
1682 rv = EBUSY;
1683
1684 return (rv);
1685 }
1686
1687
1688 /*
1689 * Accept an open operation on the control device.
1690 */
1691 static int
1692 tweopen(dev_t dev, int flag, int mode, struct lwp *l)
1693 {
1694 struct twe_softc *twe;
1695
1696 if ((twe = device_lookup_private(&twe_cd, minor(dev))) == NULL)
1697 return (ENXIO);
1698 if ((twe->sc_flags & TWEF_OPEN) != 0)
1699 return (EBUSY);
1700
1701 twe->sc_flags |= TWEF_OPEN;
1702 return (0);
1703 }
1704
1705 /*
1706 * Accept the last close on the control device.
1707 */
1708 static int
1709 tweclose(dev_t dev, int flag, int mode,
1710 struct lwp *l)
1711 {
1712 struct twe_softc *twe;
1713
1714 twe = device_lookup_private(&twe_cd, minor(dev));
1715 twe->sc_flags &= ~TWEF_OPEN;
1716 return (0);
1717 }
1718
1719 void
1720 twe_ccb_wait_handler(struct twe_ccb *ccb, int error)
1721 {
1722
1723 /* Just wake up the sleeper. */
1724 wakeup(ccb);
1725 }
1726
1727 /*
1728 * Handle control operations.
1729 */
1730 static int
1731 tweioctl(dev_t dev, u_long cmd, void *data, int flag,
1732 struct lwp *l)
1733 {
1734 struct twe_softc *twe;
1735 struct twe_ccb *ccb;
1736 struct twe_param *param;
1737 struct twe_usercommand *tu;
1738 struct twe_paramcommand *tp;
1739 struct twe_drivecommand *td;
1740 void *pdata = NULL;
1741 int s, error = 0;
1742 u_int8_t cmdid;
1743
1744 twe = device_lookup_private(&twe_cd, minor(dev));
1745 tu = (struct twe_usercommand *)data;
1746 tp = (struct twe_paramcommand *)data;
1747 td = (struct twe_drivecommand *)data;
1748
1749 /* This is intended to be compatible with the FreeBSD interface. */
1750 switch (cmd) {
1751 case TWEIO_COMMAND:
1752 error = kauth_authorize_device_passthru(l->l_cred, dev,
1753 KAUTH_REQ_DEVICE_RAWIO_PASSTHRU_ALL, data);
1754 if (error)
1755 return (error);
1756
1757 /* XXX mutex */
1758 if (tu->tu_size > 0) {
1759 /*
1760 * XXX Handle > TWE_SECTOR_SIZE? Let's see if
1761 * it's really necessary, first.
1762 */
1763 if (tu->tu_size > TWE_SECTOR_SIZE) {
1764 #ifdef TWE_DEBUG
1765 printf("%s: TWEIO_COMMAND: tu_size = %d\n",
1766 device_xname(&twe->sc_dv), tu->tu_size);
1767 #endif
1768 return EINVAL;
1769 }
1770 pdata = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_WAITOK);
1771 error = copyin(tu->tu_data, pdata, tu->tu_size);
1772 if (error != 0)
1773 goto done;
1774 ccb = twe_ccb_alloc_wait(twe,
1775 TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT);
1776 KASSERT(ccb != NULL);
1777 ccb->ccb_data = pdata;
1778 ccb->ccb_datasize = TWE_SECTOR_SIZE;
1779 } else {
1780 ccb = twe_ccb_alloc_wait(twe, 0);
1781 KASSERT(ccb != NULL);
1782 }
1783
1784 ccb->ccb_tx.tx_handler = twe_ccb_wait_handler;
1785 ccb->ccb_tx.tx_context = NULL;
1786 ccb->ccb_tx.tx_dv = &twe->sc_dv;
1787
1788 cmdid = ccb->ccb_cmdid;
1789 memcpy(ccb->ccb_cmd, &tu->tu_cmd, sizeof(struct twe_cmd));
1790 ccb->ccb_cmd->tc_cmdid = cmdid;
1791
1792 /* Map the transfer. */
1793 if ((error = twe_ccb_map(twe, ccb)) != 0) {
1794 twe_ccb_free(twe, ccb);
1795 goto done;
1796 }
1797
1798 /* Submit the command and wait up to 1 minute. */
1799 error = 0;
1800 twe_ccb_enqueue(twe, ccb);
1801 s = splbio();
1802 while ((ccb->ccb_flags & TWE_CCB_COMPLETE) == 0)
1803 if ((error = tsleep(ccb, PRIBIO, "tweioctl",
1804 60 * hz)) != 0)
1805 break;
1806 splx(s);
1807
1808 /* Copy the command back to the ioctl argument. */
1809 memcpy(&tu->tu_cmd, ccb->ccb_cmd, sizeof(struct twe_cmd));
1810 #ifdef TWE_DEBUG
1811 printf("%s: TWEIO_COMMAND: tc_opcode = 0x%02x, "
1812 "tc_status = 0x%02x\n", device_xname(&twe->sc_dv),
1813 tu->tu_cmd.tc_opcode, tu->tu_cmd.tc_status);
1814 #endif
1815
1816 s = splbio();
1817 twe_ccb_free(twe, ccb);
1818 splx(s);
1819
1820 if (tu->tu_size > 0)
1821 error = copyout(pdata, tu->tu_data, tu->tu_size);
1822 goto done;
1823
1824 case TWEIO_STATS:
1825 return (ENOENT);
1826
1827 case TWEIO_AEN_POLL:
1828 s = splbio();
1829 *(u_int *)data = twe_aen_dequeue(twe);
1830 splx(s);
1831 return (0);
1832
1833 case TWEIO_AEN_WAIT:
1834 s = splbio();
1835 while ((*(u_int *)data =
1836 twe_aen_dequeue(twe)) == TWE_AEN_QUEUE_EMPTY) {
1837 twe->sc_flags |= TWEF_AENQ_WAIT;
1838 error = tsleep(&twe->sc_aen_queue, PRIBIO | PCATCH,
1839 "tweaen", 0);
1840 if (error == EINTR) {
1841 splx(s);
1842 return (error);
1843 }
1844 }
1845 splx(s);
1846 return (0);
1847
1848 case TWEIO_GET_PARAM:
1849 error = twe_param_get(twe, tp->tp_table_id, tp->tp_param_id,
1850 tp->tp_size, 0, &param);
1851 if (error != 0)
1852 return (error);
1853 if (param->tp_param_size > tp->tp_size) {
1854 error = EFAULT;
1855 goto done;
1856 }
1857 error = copyout(param->tp_data, tp->tp_data,
1858 param->tp_param_size);
1859 free(param, M_DEVBUF);
1860 goto done;
1861
1862 case TWEIO_SET_PARAM:
1863 pdata = malloc(tp->tp_size, M_DEVBUF, M_WAITOK);
1864 if ((error = copyin(tp->tp_data, pdata, tp->tp_size)) != 0)
1865 goto done;
1866 error = twe_param_set(twe, tp->tp_table_id, tp->tp_param_id,
1867 tp->tp_size, pdata);
1868 goto done;
1869
1870 case TWEIO_RESET:
1871 s = splbio();
1872 twe_reset(twe);
1873 splx(s);
1874 return (0);
1875
1876 case TWEIO_ADD_UNIT:
1877 /* XXX mutex */
1878 return (twe_add_unit(twe, td->td_unit));
1879
1880 case TWEIO_DEL_UNIT:
1881 /* XXX mutex */
1882 return (twe_del_unit(twe, td->td_unit));
1883
1884 default:
1885 return EINVAL;
1886 }
1887 done:
1888 if (pdata)
1889 free(pdata, M_DEVBUF);
1890 return error;
1891 }
1892
1893 const struct cdevsw twe_cdevsw = {
1894 tweopen, tweclose, noread, nowrite, tweioctl,
1895 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER,
1896 };
1897
1898 /*
1899 * Print some information about the controller
1900 */
1901 static void
1902 twe_describe_controller(struct twe_softc *sc)
1903 {
1904 struct twe_param *p[6];
1905 int i, rv = 0;
1906 uint32_t dsize;
1907 uint8_t ports;
1908
1909 ports = 0;
1910
1911 /* get the port count */
1912 rv |= twe_param_get_1(sc, TWE_PARAM_CONTROLLER,
1913 TWE_PARAM_CONTROLLER_PortCount, &ports);
1914
1915 /* get version strings */
1916 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_Mon,
1917 16, NULL, &p[0]);
1918 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_FW,
1919 16, NULL, &p[1]);
1920 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_BIOS,
1921 16, NULL, &p[2]);
1922 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCB,
1923 8, NULL, &p[3]);
1924 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_ATA,
1925 8, NULL, &p[4]);
1926 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCI,
1927 8, NULL, &p[5]);
1928
1929 if (rv) {
1930 /* some error occurred */
1931 aprint_error_dev(&sc->sc_dv, "failed to fetch version information\n");
1932 return;
1933 }
1934
1935 aprint_normal_dev(&sc->sc_dv, "%d ports, Firmware %.16s, BIOS %.16s\n",
1936 ports, p[1]->tp_data, p[2]->tp_data);
1937
1938 aprint_verbose_dev(&sc->sc_dv, "Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n",
1939 p[0]->tp_data, p[3]->tp_data,
1940 p[4]->tp_data, p[5]->tp_data);
1941
1942 free(p[0], M_DEVBUF);
1943 free(p[1], M_DEVBUF);
1944 free(p[2], M_DEVBUF);
1945 free(p[3], M_DEVBUF);
1946 free(p[4], M_DEVBUF);
1947 free(p[5], M_DEVBUF);
1948
1949 rv = twe_param_get(sc, TWE_PARAM_DRIVESUMMARY,
1950 TWE_PARAM_DRIVESUMMARY_Status, 16, NULL, &p[0]);
1951 if (rv) {
1952 aprint_error_dev(&sc->sc_dv, "failed to get drive status summary\n");
1953 return;
1954 }
1955 for (i = 0; i < ports; i++) {
1956 if (p[0]->tp_data[i] != TWE_PARAM_DRIVESTATUS_Present)
1957 continue;
1958 rv = twe_param_get_4(sc, TWE_PARAM_DRIVEINFO + i,
1959 TWE_PARAM_DRIVEINFO_Size, &dsize);
1960 if (rv) {
1961 aprint_error_dev(&sc->sc_dv,
1962 "unable to get drive size for port %d\n", i);
1963 continue;
1964 }
1965 rv = twe_param_get(sc, TWE_PARAM_DRIVEINFO + i,
1966 TWE_PARAM_DRIVEINFO_Model, 40, NULL, &p[1]);
1967 if (rv) {
1968 aprint_error_dev(&sc->sc_dv,
1969 "unable to get drive model for port %d\n", i);
1970 continue;
1971 }
1972 aprint_verbose_dev(&sc->sc_dv, "port %d: %.40s %d MB\n",
1973 i, p[1]->tp_data, dsize / 2048);
1974 free(p[1], M_DEVBUF);
1975 }
1976 free(p[0], M_DEVBUF);
1977 }
NetBSD on the FriendlyARM MINI2440