Expand PMF_FN_* macros.
[netbsd-mini2440.git] / sys / arch / arm / ofw / ofw_irqhandler.c
blobd99325fb3b06e681749b6dba88e052904c7b7014
1 /* $NetBSD: ofw_irqhandler.c,v 1.16 2009/03/16 23:11:10 dsl Exp $ */
3 /*
4 * Copyright (c) 1994-1998 Mark Brinicombe.
5 * Copyright (c) 1994 Brini.
6 * All rights reserved.
8 * This code is derived from software written for Brini by Mark Brinicombe
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Mark Brinicombe
21 * for the NetBSD Project.
22 * 4. The name of the company nor the name of the author may be used to
23 * endorse or promote products derived from this software without specific
24 * prior written permission.
26 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
27 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
28 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
29 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
30 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
31 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
35 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 * from: irqhandler.c
39 * IRQ/FIQ initialisation, claim, release and handler routines
41 * Created : 30/09/94
44 #include <sys/cdefs.h>
45 __KERNEL_RCSID(0, "$NetBSD: ofw_irqhandler.c,v 1.16 2009/03/16 23:11:10 dsl Exp $");
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/syslog.h>
50 #include <sys/malloc.h>
52 #include <uvm/uvm_extern.h>
54 #include <machine/intr.h>
55 #include <machine/irqhandler.h>
56 #include <machine/cpu.h>
58 irqhandler_t *irqhandlers[NIRQS];
60 u_int current_mask;
61 u_int actual_mask;
62 u_int disabled_mask;
63 u_int irqmasks[IPL_LEVELS];
64 extern u_int intrcnt[];
66 extern char *_intrnames;
68 /* Prototypes */
70 int podule_irqhandler(void);
71 extern void set_spl_masks(void);
74 * void irq_init(void)
76 * Initialise the IRQ/FIQ sub system
79 void
80 irq_init(void)
82 int loop;
84 /* Clear all the IRQ handlers and the irq block masks */
85 for (loop = 0; loop < NIRQS; ++loop) {
86 irqhandlers[loop] = NULL;
90 * Setup the irqmasks for the different Interrupt Priority Levels
91 * We will start with no bits set and these will be updated as handlers
92 * are installed at different IPL's.
94 for (loop = 0; loop < IPL_LEVELS; ++loop)
95 irqmasks[loop] = 0;
97 current_mask = 0x00000000;
98 disabled_mask = 0x00000000;
99 actual_mask = 0x00000000;
101 set_spl_masks();
103 /* Enable IRQ's and FIQ's */
104 enable_interrupts(I32_bit | F32_bit);
109 * int irq_claim(int irq, irqhandler_t *handler)
111 * Enable an IRQ and install a handler for it.
115 irq_claim(int irq, irqhandler_t *handler, const char *group, const char *name)
117 int level;
119 #ifdef DIAGNOSTIC
120 /* Sanity check */
121 if (handler == NULL)
122 panic("NULL interrupt handler");
123 if (handler->ih_func == NULL)
124 panic("Interrupt handler does not have a function");
125 #endif /* DIAGNOSTIC */
128 * IRQ_INSTRUCT indicates that we should get the irq number
129 * from the irq structure
131 if (irq == IRQ_INSTRUCT)
132 irq = handler->ih_num;
134 /* Make sure the irq number is valid */
135 if (irq < 0 || irq >= NIRQS)
136 return(-1);
138 /* Make sure the level is valid */
139 if (handler->ih_level < 0 || handler->ih_level >= IPL_LEVELS)
140 return(-1);
142 evcnt_attach_dynamic(&handler->ih_ev, EVCNT_TYPE_INTR, NULL,
143 group, name);
145 /* Attach handler at top of chain */
146 handler->ih_next = irqhandlers[irq];
147 irqhandlers[irq] = handler;
150 * Reset the flags for this handler.
151 * As the handler is now in the chain mark it as active.
153 handler->ih_flags = 0 | IRQ_FLAG_ACTIVE;
156 * Record the interrupt number for accounting.
157 * Done here as the accounting number may not be the same as the
158 * IRQ number though for the moment they are
160 handler->ih_num = irq;
163 * Update the irq masks.
164 * Find the lowest interrupt priority on the irq chain.
165 * Interrupt is allowable at priorities lower than this.
166 * If ih_level is out of range then don't bother to update
167 * the masks.
169 if (handler->ih_level >= 0 && handler->ih_level < IPL_LEVELS) {
170 irqhandler_t *ptr;
173 * Find the lowest interrupt priority on the irq chain.
174 * Interrupt is allowable at priorities lower than this.
176 ptr = irqhandlers[irq];
177 if (ptr) {
178 level = ptr->ih_level - 1;
179 while (ptr) {
180 if (ptr->ih_level - 1 < level)
181 level = ptr->ih_level - 1;
182 ptr = ptr->ih_next;
184 while (level >= 0) {
185 irqmasks[level] |= (1 << irq);
186 --level;
190 #include "sl.h"
191 #include "ppp.h"
192 #if NSL > 0 || NPPP > 0
193 /* In the presence of SLIP or PPP, splimp > spltty. */
194 irqmasks[IPL_NET] &= irqmasks[IPL_TTY];
195 #endif
198 enable_irq(irq);
199 set_spl_masks();
201 return(0);
206 * int irq_release(int irq, irqhandler_t *handler)
208 * Disable an IRQ and remove a handler for it.
212 irq_release(int irq, irqhandler_t *handler)
214 int level;
215 irqhandler_t *irqhand;
216 irqhandler_t **prehand;
219 * IRQ_INSTRUCT indicates that we should get the irq number
220 * from the irq structure
222 if (irq == IRQ_INSTRUCT)
223 irq = handler->ih_num;
225 /* Make sure the irq number is valid */
226 if (irq < 0 || irq >= NIRQS)
227 return(-1);
229 /* Locate the handler */
230 irqhand = irqhandlers[irq];
231 prehand = &irqhandlers[irq];
233 while (irqhand && handler != irqhand) {
234 prehand = &irqhand;
235 irqhand = irqhand->ih_next;
238 /* Remove the handler if located */
239 if (irqhand)
240 *prehand = irqhand->ih_next;
241 else
242 return(-1);
244 /* Now the handler has been removed from the chain mark is as inactive */
245 irqhand->ih_flags &= ~IRQ_FLAG_ACTIVE;
247 /* Make sure the head of the handler list is active */
248 if (irqhandlers[irq])
249 irqhandlers[irq]->ih_flags |= IRQ_FLAG_ACTIVE;
252 * Update the irq masks.
253 * If ih_level is out of range then don't bother to update
254 * the masks.
256 if (handler->ih_level >= 0 && handler->ih_level < IPL_LEVELS) {
257 irqhandler_t *ptr;
259 /* Clean the bit from all the masks */
260 for (level = 0; level < IPL_LEVELS; ++level)
261 irqmasks[level] &= ~(1 << irq);
264 * Find the lowest interrupt priority on the irq chain.
265 * Interrupt is allowable at priorities lower than this.
267 ptr = irqhandlers[irq];
268 if (ptr) {
269 level = ptr->ih_level - 1;
270 while (ptr) {
271 if (ptr->ih_level - 1 < level)
272 level = ptr->ih_level - 1;
273 ptr = ptr->ih_next;
275 while (level >= 0) {
276 irqmasks[level] |= (1 << irq);
277 --level;
283 * Disable the appropriate mask bit if there are no handlers left for
284 * this IRQ.
286 if (irqhandlers[irq] == NULL)
287 disable_irq(irq);
289 set_spl_masks();
291 return(0);
295 void *
296 intr_claim(int irq, int level, int (*ih_func)(void *), void *ih_arg, const char *group, const char *name)
298 irqhandler_t *ih;
300 ih = malloc(sizeof(*ih), M_DEVBUF, M_NOWAIT|M_ZERO);
301 if (!ih)
302 panic("intr_claim(): Cannot malloc handler memory");
304 ih->ih_level = level;
305 ih->ih_func = ih_func;
306 ih->ih_arg = ih_arg;
307 ih->ih_flags = 0;
309 if (irq_claim(irq, ih, group, name) != 0)
310 return(NULL);
311 return(ih);
316 intr_release(void *arg)
318 irqhandler_t *ih = (irqhandler_t *)arg;
320 if (irq_release(ih->ih_num, ih) == 0) {
321 free(ih, M_DEVBUF);
322 return(0);
324 return(1);
329 * void disable_irq(int irq)
331 * Disables a specific irq. The irq is removed from the master irq mask
334 void
335 disable_irq(int irq)
337 register int oldirqstate;
339 oldirqstate = disable_interrupts(I32_bit);
340 current_mask &= ~(1 << irq);
341 irq_setmasks();
342 restore_interrupts(oldirqstate);
347 * void enable_irq(int irq)
349 * Enables a specific irq. The irq is added to the master irq mask
350 * This routine should be used with caution. A handler should already
351 * be installed.
354 void
355 enable_irq(int irq)
357 register u_int oldirqstate;
359 oldirqstate = disable_interrupts(I32_bit);
360 current_mask |= (1 << irq);
361 irq_setmasks();
362 restore_interrupts(oldirqstate);
367 * void stray_irqhandler(u_int mask)
369 * Handler for stray interrupts. This gets called if a handler cannot be
370 * found for an interrupt.
373 void stray_irqhandler(u_int); /* called from assembly */
375 void
376 stray_irqhandler(u_int mask)
378 static u_int stray_irqs = 0;
380 if (++stray_irqs <= 8)
381 log(LOG_ERR, "Stray interrupt %08x%s\n", mask,
382 stray_irqs >= 8 ? ": stopped logging" : "");