1 /* $NetBSD: intr.h,v 1.12 2007/12/03 15:33:45 ad Exp $ */
4 * Copyright (c) 2002 The NetBSD Foundation, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
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17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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29 #ifndef _HPCSH_INTR_H_
30 #define _HPCSH_INTR_H_
35 * See sys/arch/sh3/sh3/interrupt.c
36 * This was 8 for TMU0, TMU1, TMU2, SCIF * 4, HD6446x.
38 * For now bump this to 16 so that it's possible to do experiments
39 * with new drivers without hitting this limit.
45 #define IPL_HIGH 15 /* everything */
47 #include <hpcsh/dev/hd6446x/hd6446xintcvar.h>
49 typedef uint8_t ipl_t
;
54 static inline ipl_cookie_t
55 makeiplcookie(ipl_t ipl
)
58 return (ipl_cookie_t
){._ipl
= ipl
<< 4};
62 splraiseipl(ipl_cookie_t icookie
)
65 return hd6446x_intr_raise(icookie
._ipl
);
70 #define spl0() hd6446x_intr_resume(0)
71 #define splx(x) hd6446x_intr_resume(x)
73 #endif /* !_HPCSH_INTR_H_ */