sys/arch/i386/pci/opti82c700reg.h

   1 /*      $NetBSD: opti82c700reg.h,v 1.1 1999/11/17 01:21:20 thorpej Exp $        */
   2
   3 /*
   4  * Copyright (c) 1999, by UCHIYAMA Yasushi
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. The name of the developer may NOT be used to endorse or promote products
  13  *    derived from this software without specific prior written permission.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  25  * SUCH DAMAGE.
  26  */
  27
  28 /*
  29  * Register definitions for the Opti 82c700 PCI-ISA bridge interrupt
  30  * controller.
  31  */
  32
  33 #define FIRESTAR_CFG_INTR_IRQ   0xb0    /* PCI configuration space */
  34 #define FIRESTAR_CFG_INTR_PIRQ  0xb8    /* PCI configuration space */
  35
  36 #define FIRESTAR_PIRQ_NONE      0
  37 #define FIRESTAR_PIRQ_MASK      0xdffa
  38 #define FIRESTAR_LEGAL_IRQ(irq) ((irq) >= 0 && (irq) <= 15 &&           \
  39                                  ((1 << (irq)) & FIRESTAR_PIRQ_MASK) != 0)
  40
  41 #define FIRESTAR_CFG_PIRQ_MASK  0x0f
  42
  43 #define FIRESTAR_TRIGGER_MASK   0x01
  44 #define FIRESTAR_TRIGGER_SHIFT  4
  45
  46 /*
  47  * Opti's suggested Link values.
  48  */
  49 #define FIRESTAR_PIR_REGOFS_MASK        0x07
  50 #define FIRESTAR_PIR_REGOFS_SHIFT       4
  51 #define FIRESTAR_PIR_REGOFS(link)                                       \
  52         (((link) >> FIRESTAR_PIR_REGOFS_SHIFT) & FIRESTAR_PIR_REGOFS_MASK)
  53
  54 #define FIRESTAR_PIR_SELECTSRC_MASK     0x07
  55 #define FIRESTAR_PIR_SELECTSRC_SHIFT    0
  56 #define FIRESTAR_PIR_SELECTSRC(link)                                    \
  57         (((link) >> FIRESTAR_PIR_SELECTSRC_SHIFT) & FIRESTAR_PIR_SELECTSRC_MASK)
  58
  59 #define FIRESTAR_PIR_SELECT_NONE        0
  60 #define FIRESTAR_PIR_SELECT_IRQ         1
  61 #define FIRESTAR_PIR_SELECT_PIRQ        2
  62 #define FIRESTAR_PIR_SELECT_BRIDGE      3
  63
  64 #define FIRESTAR_PIR_MAKELINK(src, ofs)                                 \
  65         (((src) << FIRESTAR_PIR_SELECTSRC_SHIFT) |                      \
  66          ((ofs) << FIRESTAR_PIR_REGOFS_SHIFT))