sys/arch/mips/atheros/include/arbusvar.h

   1 /* $Id: arbusvar.h,v 1.2 2006/09/04 05:17:26 gdamore Exp $ */
   2 /*
   3  * Copyright (c) 2006 Urbana-Champaign Independent Media Center.
   4  * Copyright (c) 2006 Garrett D'Amore.
   5  * All rights reserved.
   6  *
   7  * This code was written by Garrett D'Amore for the Champaign-Urbana
   8  * Community Wireless Network Project.
   9  *
  10  * Redistribution and use in source and binary forms, with or
  11  * without modification, are permitted provided that the following
  12  * conditions are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above
  16  *    copyright notice, this list of conditions and the following
  17  *    disclaimer in the documentation and/or other materials provided
  18  *    with the distribution.
  19  * 3. All advertising materials mentioning features or use of this
  20  *    software must display the following acknowledgements:
  21  *      This product includes software developed by the Urbana-Champaign
  22  *      Independent Media Center.
  23  *      This product includes software developed by Garrett D'Amore.
  24  * 4. Urbana-Champaign Independent Media Center's name and Garrett
  25  *    D'Amore's name may not be used to endorse or promote products
  26  *    derived from this software without specific prior written permission.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
  29  * MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
  30  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  31  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  32  * ARE DISCLAIMED.  IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
  33  * MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
  34  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  35  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  36  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  37  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  38  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  39  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
  40  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  41  */
  42
  43 #ifndef _MIPS_ATHEROS_ARBUSVAR_H_
  44 #define _MIPS_ATHEROS_ARBUSVAR_H_
  45
  46 #include <machine/bus.h>
  47
  48 struct arbus_attach_args {
  49         const char      *aa_name;
  50         bus_space_tag_t aa_bst;
  51         bus_dma_tag_t   aa_dmat;
  52
  53         bus_addr_t      aa_addr;
  54         bus_size_t      aa_size;
  55         int             aa_cirq;        /* cpu irq */
  56         int             aa_mirq;        /* misc irq */
  57 };
  58
  59 void arbus_init(void);
  60 bus_space_tag_t arbus_get_bus_space_tag(void);
  61 bus_dma_tag_t arbus_get_bus_dma_tag(void);
  62
  63 void *arbus_intr_establish(int, int, int (*)(void *), void *);
  64 void arbus_intr_disestablish(void *);
  65
  66 void com_arbus_cnattach(bus_addr_t, uint32_t);
  67
  68 /*
  69  * These definitions are "funny".  To distinquish between
  70  * miscellaneous IRQs and global processor interrupts, we encode the
  71  * IRQ as (cpuirq) | ((miscirq) << 4).
  72  *
  73  * Note that these IRQs seem to be general on all AR531X based parts.
  74  */
  75
  76 #define ARBUS_IRQ_CPU_M         0xf
  77 #define ARBUS_IRQ_CPU_S         0
  78 #define ARBUS_IRQ_MISC_M        0xf0
  79 #define ARBUS_IRQ_MISC_S        4
  80 #define ARBUS_IRQ_CPU(x)        (((x) & ARBUS_IRQ_CPU_M) >> ARBUS_IRQ_CPU_S)
  81 #define ARBUS_IRQ_MISC(x)       (((x) & ARBUS_IRQ_MISC_M) >> ARBUS_IRQ_MISC_S)
  82 #define ARBUS_MAKE_IRQ(c,m)     \
  83         (((c) << ARBUS_IRQ_CPU_S) | ((m) << ARBUS_IRQ_MISC_S))
  84
  85 #define ARBUS_IRQ_WLAN0         ARBUS_MAKE_IRQ(0,0)
  86 #define ARBUS_IRQ_ENET0         ARBUS_MAKE_IRQ(1,0)
  87 #define ARBUS_IRQ_ENET1         ARBUS_MAKE_IRQ(2,0)
  88 #define ARBUS_IRQ_WLAN1         ARBUS_MAKE_IRQ(3,0)
  89 #define ARBUS_IRQ_TIMER         ARBUS_MAKE_IRQ(4,0)
  90 #define ARBUS_IRQ_AHBPERR       ARBUS_MAKE_IRQ(4,1)
  91 #define ARBUS_IRQ_AHBDMAE       ARBUS_MAKE_IRQ(4,2)
  92 #define ARBUS_IRQ_GPIO          ARBUS_MAKE_IRQ(4,3)
  93 #define ARBUS_IRQ_UART0         ARBUS_MAKE_IRQ(4,4)
  94 #define ARBUS_IRQ_UART0_DMA     ARBUS_MAKE_IRQ(4,5)
  95 #define ARBUS_IRQ_WDOG          ARBUS_MAKE_IRQ(4,6)
  96
  97 #endif /* _MIPS_ATHEROS_ARBUSVAR_H_ */