sys/dev/cardbus/cardbusreg.h

   1 /*      $NetBSD: cardbusreg.h,v 1.2 2007/08/30 02:39:11 dyoung Exp $ */
   2
   3 /*
   4  * Copyright (c) 2001
   5  *       HAYAKAWA Koichi.  All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  18  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  25  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  26  * POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 #ifndef _DEV_CARDBUS_CARDBUSREG_H_
  30 #define _DEV_CARDBUS_CARDBUSREG_H_
  31
  32 #include <dev/pci/pcivar.h>     /* for pcitag_t */
  33
  34 typedef u_int32_t cardbusreg_t;
  35 typedef pcitag_t cardbustag_t;
  36 typedef int cardbus_intr_line_t;
  37
  38 #define CARDBUS_ID_REG          0x00
  39
  40 typedef u_int16_t cardbus_vendor_id_t;
  41 typedef u_int16_t cardbus_product_id_t;
  42
  43 #  define CARDBUS_VENDOR_SHIFT  0
  44 #  define CARDBUS_VENDOR_MASK   0xffff
  45 #  define CARDBUS_VENDOR(id) \
  46             (((id) >> CARDBUS_VENDOR_SHIFT) & CARDBUS_VENDOR_MASK)
  47
  48 #  define CARDBUS_PRODUCT_SHIFT  16
  49 #  define CARDBUS_PRODUCT_MASK   0xffff
  50 #  define CARDBUS_PRODUCT(id) \
  51             (((id) >> CARDBUS_PRODUCT_SHIFT) & CARDBUS_PRODUCT_MASK)
  52
  53
  54 #define CARDBUS_COMMAND_STATUS_REG  0x04
  55
  56 #  define CARDBUS_COMMAND_IO_ENABLE          0x00000001
  57 #  define CARDBUS_COMMAND_MEM_ENABLE         0x00000002
  58 #  define CARDBUS_COMMAND_MASTER_ENABLE      0x00000004
  59 #  define CARDBUS_COMMAND_SPECIAL_ENABLE     0x00000008
  60 #  define CARDBUS_COMMAND_INVALIDATE_ENABLE  0x00000010
  61 #  define CARDBUS_COMMAND_PALETTE_ENABLE     0x00000020
  62 #  define CARDBUS_COMMAND_PARITY_ENABLE      0x00000040
  63 #  define CARDBUS_COMMAND_STEPPING_ENABLE    0x00000080
  64 #  define CARDBUS_COMMAND_SERR_ENABLE        0x00000100
  65 #  define CARDBUS_COMMAND_BACKTOBACK_ENABLE  0x00000200
  66
  67
  68 #define CARDBUS_CLASS_REG       0x08
  69
  70 #define CARDBUS_CLASS_SHIFT                             24
  71 #define CARDBUS_CLASS_MASK                              0xff
  72 #define CARDBUS_CLASS(cr) \
  73             (((cr) >> CARDBUS_CLASS_SHIFT) & CARDBUS_CLASS_MASK)
  74
  75 #define CARDBUS_SUBCLASS_SHIFT                  16
  76 #define CARDBUS_SUBCLASS_MASK                   0xff
  77 #define CARDBUS_SUBCLASS(cr) \
  78             (((cr) >> CARDBUS_SUBCLASS_SHIFT) & CARDBUS_SUBCLASS_MASK)
  79
  80 #define CARDBUS_INTERFACE_SHIFT                 8
  81 #define CARDBUS_INTERFACE_MASK                  0xff
  82 #define CARDBUS_INTERFACE(cr) \
  83             (((cr) >> CARDBUS_INTERFACE_SHIFT) & CARDBUS_INTERFACE_MASK)
  84
  85 #define CARDBUS_REVISION_SHIFT                  0
  86 #define CARDBUS_REVISION_MASK                   0xff
  87 #define CARDBUS_REVISION(cr) \
  88             (((cr) >> CARDBUS_REVISION_SHIFT) & CARDBUS_REVISION_MASK)
  89
  90 /* base classes */
  91 #define CARDBUS_CLASS_PREHISTORIC               0x00
  92 #define CARDBUS_CLASS_MASS_STORAGE              0x01
  93 #define CARDBUS_CLASS_NETWORK                   0x02
  94 #define CARDBUS_CLASS_DISPLAY                   0x03
  95 #define CARDBUS_CLASS_MULTIMEDIA                0x04
  96 #define CARDBUS_CLASS_MEMORY                    0x05
  97 #define CARDBUS_CLASS_BRIDGE                    0x06
  98 #define CARDBUS_CLASS_COMMUNICATIONS            0x07
  99 #define CARDBUS_CLASS_SYSTEM                    0x08
 100 #define CARDBUS_CLASS_INPUT                     0x09
 101 #define CARDBUS_CLASS_DOCK                      0x0a
 102 #define CARDBUS_CLASS_PROCESSOR                 0x0b
 103 #define CARDBUS_CLASS_SERIALBUS                 0x0c
 104 #define CARDBUS_CLASS_UNDEFINED                 0xff
 105
 106 /* 0x07 serial bus subclasses */
 107 #define CARDBUS_SUBCLASS_COMMUNICATIONS_SERIAL  0x00
 108
 109 /* 0x0c serial bus subclasses */
 110 #define CARDBUS_SUBCLASS_SERIALBUS_FIREWIRE     0x00
 111 #define CARDBUS_SUBCLASS_SERIALBUS_ACCESS       0x01
 112 #define CARDBUS_SUBCLASS_SERIALBUS_SSA          0x02
 113 #define CARDBUS_SUBCLASS_SERIALBUS_USB          0x03
 114 #define CARDBUS_SUBCLASS_SERIALBUS_FIBER        0x04
 115
 116 /* BIST, Header Type, Latency Timer, Cache Line Size */
 117 #define CARDBUS_BHLC_REG        0x0c
 118
 119 #define CARDBUS_BIST_SHIFT        24
 120 #define CARDBUS_BIST_MASK       0xff
 121 #define CARDBUS_BIST(bhlcr) \
 122             (((bhlcr) >> CARDBUS_BIST_SHIFT) & CARDBUS_BIST_MASK)
 123
 124 #define CARDBUS_HDRTYPE_SHIFT     16
 125 #define CARDBUS_HDRTYPE_MASK    0xff
 126 #define CARDBUS_HDRTYPE(bhlcr) \
 127             (((bhlcr) >> CARDBUS_HDRTYPE_SHIFT) & CARDBUS_HDRTYPE_MASK)
 128
 129 #define CARDBUS_HDRTYPE_TYPE(bhlcr) \
 130             (CARDBUS_HDRTYPE(bhlcr) & 0x7f)
 131 #define CARDBUS_HDRTYPE_MULTIFN(bhlcr) \
 132             ((CARDBUS_HDRTYPE(bhlcr) & 0x80) != 0)
 133
 134 #define CARDBUS_LATTIMER_SHIFT      8
 135 #define CARDBUS_LATTIMER_MASK    0xff
 136 #define CARDBUS_LATTIMER(bhlcr) \
 137             (((bhlcr) >> CARDBUS_LATTIMER_SHIFT) & CARDBUS_LATTIMER_MASK)
 138
 139 #define CARDBUS_CACHELINE_SHIFT     0
 140 #define CARDBUS_CACHELINE_MASK   0xff
 141 #define CARDBUS_CACHELINE(bhlcr) \
 142             (((bhlcr) >> CARDBUS_CACHELINE_SHIFT) & CARDBUS_CACHELINE_MASK)
 143
 144
 145 /* Base Resisters */
 146 #define CARDBUS_BASE0_REG  0x10
 147 #define CARDBUS_BASE1_REG  0x14
 148 #define CARDBUS_BASE2_REG  0x18
 149 #define CARDBUS_BASE3_REG  0x1C
 150 #define CARDBUS_BASE4_REG  0x20
 151 #define CARDBUS_BASE5_REG  0x24
 152 #define CARDBUS_CIS_REG    0x28
 153 #define CARDBUS_ROM_REG    0x30
 154 #  define CARDBUS_CIS_ASIMASK 0x07
 155 #    define CARDBUS_CIS_ASI(x) (CARDBUS_CIS_ASIMASK & (x))
 156 #  define CARDBUS_CIS_ASI_TUPLE 0x00
 157 #  define CARDBUS_CIS_ASI_BAR0  0x01
 158 #  define CARDBUS_CIS_ASI_BAR1  0x02
 159 #  define CARDBUS_CIS_ASI_BAR2  0x03
 160 #  define CARDBUS_CIS_ASI_BAR3  0x04
 161 #  define CARDBUS_CIS_ASI_BAR4  0x05
 162 #  define CARDBUS_CIS_ASI_BAR5  0x06
 163 #  define CARDBUS_CIS_ASI_ROM   0x07
 164 #  define CARDBUS_CIS_ADDRMASK 0x0ffffff8
 165 #    define CARDBUS_CIS_ADDR(x) (CARDBUS_CIS_ADDRMASK & (x))
 166 #    define CARDBUS_CIS_ASI_BAR(x) (((CARDBUS_CIS_ASIMASK & (x))-1)*4+CARDBUS_BASE0_REG)
 167 #    define CARDBUS_CIS_ASI_ROM_IMAGE(x) (((x) >> 28) & 0xf)
 168
 169 #define CARDBUS_INTERRUPT_REG   0x3c
 170
 171 #define CARDBUS_MAPREG_TYPE_MEM         0x00000000
 172 #define CARDBUS_MAPREG_TYPE_IO          0x00000001
 173
 174 #endif /* !_DEV_CARDBUS_CARDBUSREG_H_ */