1 /* $NetBSD: if_atw_cardbus.c,v 1.27 2009/09/16 16:34:50 dyoung Exp $ */
4 * Copyright (c) 1999, 2000, 2003 The NetBSD Foundation, Inc.
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center. This code was adapted for the ADMtek ADM8211
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
35 * CardBus bus front-end for the ADMtek ADM8211 802.11 MAC/BBP driver.
38 #include <sys/cdefs.h>
39 __KERNEL_RCSID(0, "$NetBSD: if_atw_cardbus.c,v 1.27 2009/09/16 16:34:50 dyoung Exp $");
44 #include <sys/param.h>
45 #include <sys/systm.h>
47 #include <sys/malloc.h>
48 #include <sys/kernel.h>
49 #include <sys/socket.h>
50 #include <sys/ioctl.h>
51 #include <sys/errno.h>
52 #include <sys/device.h>
54 #include <machine/endian.h>
57 #include <net/if_dl.h>
58 #include <net/if_media.h>
59 #include <net/if_ether.h>
61 #include <net80211/ieee80211_netbsd.h>
62 #include <net80211/ieee80211_radiotap.h>
63 #include <net80211/ieee80211_var.h>
70 #include <netinet/in.h>
71 #include <netinet/if_inarp.h>
78 #include <dev/ic/atwreg.h>
79 #include <dev/ic/rf3000reg.h>
80 #include <dev/ic/si4136reg.h>
81 #include <dev/ic/atwvar.h>
83 #include <dev/pci/pcivar.h>
84 #include <dev/pci/pcireg.h>
85 #include <dev/pci/pcidevs.h>
87 #include <dev/cardbus/cardbusvar.h>
88 #include <dev/pci/pcidevs.h>
91 * PCI configuration space registers used by the ADM8211.
93 #define ATW_PCI_IOBA 0x10 /* i/o mapped base */
94 #define ATW_PCI_MMBA 0x14 /* memory mapped base */
96 struct atw_cardbus_softc
{
97 struct atw_softc sc_atw
;
99 /* CardBus-specific goo. */
100 void *sc_ih
; /* interrupt handle */
101 cardbus_devfunc_t sc_ct
; /* our CardBus devfuncs */
102 cardbustag_t sc_tag
; /* our CardBus tag */
103 cardbusreg_t sc_csr
; /* CSR bits */
104 bus_size_t sc_mapsize
; /* the size of mapped bus space
108 int sc_cben
; /* CardBus enables */
109 int sc_bar_reg
; /* which BAR to use */
110 cardbusreg_t sc_bar_val
; /* value of the BAR */
112 cardbus_intr_line_t sc_intrline
; /* interrupt line */
115 static int atw_cardbus_match(device_t
, cfdata_t
, void *);
116 static void atw_cardbus_attach(device_t
, device_t
, void *);
117 static int atw_cardbus_detach(device_t
, int);
119 CFATTACH_DECL3_NEW(atw_cardbus
, sizeof(struct atw_cardbus_softc
),
120 atw_cardbus_match
, atw_cardbus_attach
, atw_cardbus_detach
, atw_activate
,
121 NULL
, NULL
, DVF_DETACH_SHUTDOWN
);
123 static void atw_cardbus_setup(struct atw_cardbus_softc
*);
125 static bool atw_cardbus_suspend(device_t
, pmf_qual_t
);
126 static bool atw_cardbus_resume(device_t
, pmf_qual_t
);
128 static const struct atw_cardbus_product
*atw_cardbus_lookup
129 (const struct cardbus_attach_args
*);
131 static const struct atw_cardbus_product
{
132 u_int32_t acp_vendor
; /* PCI vendor ID */
133 u_int32_t acp_product
; /* PCI product ID */
134 const char *acp_product_name
;
135 } atw_cardbus_products
[] = {
136 { PCI_VENDOR_ADMTEK
, PCI_PRODUCT_ADMTEK_ADM8211
,
137 "ADMtek ADM8211 802.11 MAC/BBP" },
142 static const struct atw_cardbus_product
*
143 atw_cardbus_lookup(const struct cardbus_attach_args
*ca
)
145 const struct atw_cardbus_product
*acp
;
147 for (acp
= atw_cardbus_products
; acp
->acp_product_name
!= NULL
; acp
++) {
148 if (PCI_VENDOR(ca
->ca_id
) == acp
->acp_vendor
&&
149 PCI_PRODUCT(ca
->ca_id
) == acp
->acp_product
)
156 atw_cardbus_match(device_t parent
, cfdata_t match
, void *aux
)
158 struct cardbus_attach_args
*ca
= aux
;
160 if (atw_cardbus_lookup(ca
) != NULL
)
167 atw_cardbus_attach(device_t parent
, device_t self
, void *aux
)
169 struct atw_cardbus_softc
*csc
= device_private(self
);
170 struct atw_softc
*sc
= &csc
->sc_atw
;
171 struct cardbus_attach_args
*ca
= aux
;
172 cardbus_devfunc_t ct
= ca
->ca_ct
;
173 const struct atw_cardbus_product
*acp
;
176 #define FUNCREG(__x) {#__x, (__x)}
181 FUNCREG(ATW_FER
), FUNCREG(ATW_FEMR
), FUNCREG(ATW_FPSR
),
189 sc
->sc_dmat
= ca
->ca_dmat
;
191 csc
->sc_tag
= ca
->ca_tag
;
193 acp
= atw_cardbus_lookup(ca
);
196 panic("atw_cardbus_attach: impossible");
199 /* Get revision info. */
200 sc
->sc_rev
= PCI_REVISION(ca
->ca_class
);
202 printf(": %s, revision %d.%d\n", acp
->acp_product_name
,
203 (sc
->sc_rev
>> 4) & 0xf, sc
->sc_rev
& 0xf);
206 printf("%s: signature %08x\n", device_xname(self
),
207 (rev
>> 4) & 0xf, rev
& 0xf,
208 cardbus_conf_read(ct
->ct_cc
, ct
->ct_cf
, csc
->sc_tag
, 0x80));
214 csc
->sc_csr
= CARDBUS_COMMAND_MASTER_ENABLE
;
215 if (Cardbus_mapreg_map(ct
, ATW_PCI_MMBA
,
216 CARDBUS_MAPREG_TYPE_MEM
, 0, &sc
->sc_st
, &sc
->sc_sh
, &adr
,
217 &csc
->sc_mapsize
) == 0) {
219 printf("%s: atw_cardbus_attach mapped %d bytes mem space\n",
220 device_xname(self
), csc
->sc_mapsize
);
224 (*ct
->ct_cf
->cardbus_mem_open
)(cc
, 0, adr
, adr
+csc
->sc_mapsize
);
226 csc
->sc_cben
= CARDBUS_MEM_ENABLE
;
227 csc
->sc_csr
|= CARDBUS_COMMAND_MEM_ENABLE
;
228 csc
->sc_bar_reg
= ATW_PCI_MMBA
;
229 csc
->sc_bar_val
= adr
| CARDBUS_MAPREG_TYPE_MEM
;
230 } else if (Cardbus_mapreg_map(ct
, ATW_PCI_IOBA
,
231 CARDBUS_MAPREG_TYPE_IO
, 0, &sc
->sc_st
, &sc
->sc_sh
, &adr
,
232 &csc
->sc_mapsize
) == 0) {
234 printf("%s: atw_cardbus_attach mapped %d bytes I/O space\n",
235 device_xname(self
), csc
->sc_mapsize
);
239 (*ct
->ct_cf
->cardbus_io_open
)(cc
, 0, adr
, adr
+csc
->sc_mapsize
);
241 csc
->sc_cben
= CARDBUS_IO_ENABLE
;
242 csc
->sc_csr
|= CARDBUS_COMMAND_IO_ENABLE
;
243 csc
->sc_bar_reg
= ATW_PCI_IOBA
;
244 csc
->sc_bar_val
= adr
| CARDBUS_MAPREG_TYPE_IO
;
246 aprint_error_dev(self
, "unable to map device registers\n");
251 * Bring the chip out of powersave mode and initialize the
252 * configuration registers.
254 atw_cardbus_setup(csc
);
256 /* Remember which interrupt line. */
257 csc
->sc_intrline
= ca
->ca_intrline
;
261 * The CardBus cards will make it to store-and-forward mode as
262 * soon as you put them under any kind of load, so just start
265 sc
->sc_txthresh
= 3; /* TBD name constant */
269 for (i
= 0; i
< __arraycount(funcregs
); i
++) {
270 aprint_error_dev(sc
->sc_dev
, "%s %" PRIx32
"\n",
271 funcregs
[i
].name
, ATW_READ(sc
, funcregs
[i
].ofs
));
275 ATW_WRITE(sc
, ATW_FEMR
, 0);
276 ATW_WRITE(sc
, ATW_FER
, ATW_READ(sc
, ATW_FER
));
279 * Bus-independent attach.
283 if (pmf_device_register1(sc
->sc_dev
, atw_cardbus_suspend
,
284 atw_cardbus_resume
, atw_shutdown
))
285 pmf_class_network_register(sc
->sc_dev
, &sc
->sc_if
);
287 aprint_error_dev(sc
->sc_dev
,
288 "couldn't establish power handler\n");
291 * Power down the socket.
293 pmf_device_suspend(sc
->sc_dev
, &sc
->sc_qual
);
297 atw_cardbus_detach(device_t self
, int flags
)
299 struct atw_cardbus_softc
*csc
= device_private(self
);
300 struct atw_softc
*sc
= &csc
->sc_atw
;
301 struct cardbus_devfunc
*ct
= csc
->sc_ct
;
304 #if defined(DIAGNOSTIC)
306 panic("%s: data structure lacks", device_xname(self
));
314 * Unhook the interrupt handler.
316 if (csc
->sc_ih
!= NULL
)
317 cardbus_intr_disestablish(ct
->ct_cc
, ct
->ct_cf
, csc
->sc_ih
);
320 * Release bus space and close window.
322 if (csc
->sc_bar_reg
!= 0)
323 Cardbus_mapreg_unmap(ct
, csc
->sc_bar_reg
,
324 sc
->sc_st
, sc
->sc_sh
, csc
->sc_mapsize
);
330 atw_cardbus_resume(device_t self
, pmf_qual_t qual
)
332 struct atw_cardbus_softc
*csc
= device_private(self
);
333 struct atw_softc
*sc
= &csc
->sc_atw
;
334 cardbus_devfunc_t ct
= csc
->sc_ct
;
335 cardbus_chipset_tag_t cc
= ct
->ct_cc
;
336 cardbus_function_tag_t cf
= ct
->ct_cf
;
339 * Map and establish the interrupt.
341 csc
->sc_ih
= cardbus_intr_establish(cc
, cf
, csc
->sc_intrline
, IPL_NET
,
343 if (csc
->sc_ih
== NULL
) {
344 aprint_error_dev(sc
->sc_dev
, "unable to establish interrupt\n");
352 atw_cardbus_suspend(device_t self
, pmf_qual_t qual
)
354 struct atw_cardbus_softc
*csc
= device_private(self
);
355 cardbus_devfunc_t ct
= csc
->sc_ct
;
356 cardbus_chipset_tag_t cc
= ct
->ct_cc
;
357 cardbus_function_tag_t cf
= ct
->ct_cf
;
359 /* Unhook the interrupt handler. */
360 cardbus_intr_disestablish(cc
, cf
, csc
->sc_ih
);
363 return atw_suspend(self
, qual
);
367 atw_cardbus_setup(struct atw_cardbus_softc
*csc
)
369 cardbus_devfunc_t ct
= csc
->sc_ct
;
370 cardbus_chipset_tag_t cc
= ct
->ct_cc
;
371 cardbus_function_tag_t cf
= ct
->ct_cf
;
375 if ((rc
= cardbus_set_powerstate(ct
, csc
->sc_tag
, PCI_PWR_D0
)) != 0)
376 aprint_debug("%s: cardbus_set_powerstate %d\n", __func__
, rc
);
378 /* Program the BAR. */
379 cardbus_conf_write(cc
, cf
, csc
->sc_tag
, csc
->sc_bar_reg
,
382 /* Make sure the right access type is on the CardBus bridge. */
383 (*ct
->ct_cf
->cardbus_ctrl
)(cc
, csc
->sc_cben
);
384 (*ct
->ct_cf
->cardbus_ctrl
)(cc
, CARDBUS_BM_ENABLE
);
386 /* Enable the appropriate bits in the PCI CSR. */
387 csr
= cardbus_conf_read(cc
, cf
, csc
->sc_tag
,
388 CARDBUS_COMMAND_STATUS_REG
);
389 csr
&= ~(CARDBUS_COMMAND_IO_ENABLE
|CARDBUS_COMMAND_MEM_ENABLE
);
391 cardbus_conf_write(cc
, cf
, csc
->sc_tag
, CARDBUS_COMMAND_STATUS_REG
,